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Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774b1.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774b1.dtsi80
1 files changed, 62 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index d541b48c7e38..c9857ea944ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -10,12 +10,11 @@
#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
#include <dt-bindings/power/r8a774b1-sysc.h>
-#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
-
/ {
compatible = "renesas,r8a774b1";
#address-cells = <2>;
#size-cells = <2>;
+ interrupt-parent = <&gic>;
/*
* The external audio clocks are configured as 0 Hz fixed frequency
@@ -110,6 +109,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
extalr_clk: extalr {
@@ -117,6 +117,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
/* External PCIe clock - can be overridden by the board */
@@ -128,8 +129,8 @@
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>, <&a57_1>;
};
@@ -147,7 +148,8 @@
soc {
compatible = "simple-bus";
- interrupt-parent = <&gic>;
+ bootph-all;
+
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -286,6 +288,7 @@
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a774b1";
reg = <0 0xe6060000 0 0x50c>;
+ bootph-all;
};
cmt0: timer@e60f0000 {
@@ -366,11 +369,13 @@
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
+ bootph-all;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a774b1-rst";
reg = <0 0xe6160000 0 0x0200>;
+ bootph-all;
};
sysc: system-controller@e6180000 {
@@ -415,6 +420,7 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
@@ -427,7 +433,9 @@
reg = <0 0xe6fc0000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
@@ -440,7 +448,9 @@
reg = <0 0xe6fd0000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 123>;
clock-names = "fck";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
@@ -454,6 +464,7 @@
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
@@ -467,6 +478,7 @@
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
@@ -1058,7 +1070,7 @@
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ assigned-clock-rates = <80000000>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 914>;
status = "disabled";
@@ -1562,7 +1574,7 @@
rcar_sound: sound@ec500000 {
/*
- * #sound-dai-cells is required
+ * #sound-dai-cells is required if simple-card
*
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
@@ -1597,7 +1609,7 @@
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>,
<&audio_clk_c>,
- <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
+ <&cpg CPG_MOD 922>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
@@ -1999,6 +2011,14 @@
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <16>;
+ iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
+ <&ipmmu_mp 2>, <&ipmmu_mp 3>,
+ <&ipmmu_mp 4>, <&ipmmu_mp 5>,
+ <&ipmmu_mp 6>, <&ipmmu_mp 7>,
+ <&ipmmu_mp 8>, <&ipmmu_mp 9>,
+ <&ipmmu_mp 10>, <&ipmmu_mp 11>,
+ <&ipmmu_mp 12>, <&ipmmu_mp 13>,
+ <&ipmmu_mp 14>, <&ipmmu_mp 15>;
};
audma1: dma-controller@ec720000 {
@@ -2033,6 +2053,14 @@
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <16>;
+ iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
+ <&ipmmu_mp 18>, <&ipmmu_mp 19>,
+ <&ipmmu_mp 20>, <&ipmmu_mp 21>,
+ <&ipmmu_mp 22>, <&ipmmu_mp 23>,
+ <&ipmmu_mp 24>, <&ipmmu_mp 25>,
+ <&ipmmu_mp 26>, <&ipmmu_mp 27>,
+ <&ipmmu_mp 28>, <&ipmmu_mp 29>,
+ <&ipmmu_mp 30>, <&ipmmu_mp 31>;
};
xhci0: usb@ee000000 {
@@ -2140,6 +2168,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 314>;
+ iommus = <&ipmmu_ds1 32>;
status = "disabled";
};
@@ -2153,6 +2182,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 313>;
+ iommus = <&ipmmu_ds1 33>;
status = "disabled";
};
@@ -2166,6 +2196,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 312>;
+ iommus = <&ipmmu_ds1 34>;
status = "disabled";
};
@@ -2179,6 +2210,7 @@
max-frequency = <200000000>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 311>;
+ iommus = <&ipmmu_ds1 35>;
status = "disabled";
};
@@ -2206,6 +2238,7 @@
clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 815>;
+ iommus = <&ipmmu_hc 2>;
status = "disabled";
};
@@ -2238,8 +2271,8 @@
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ /* Map all possible DDR/IOMMU as inbound ranges */
+ dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@@ -2250,6 +2283,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 319>;
+ iommu-map = <0 &ipmmu_hc 0 1>;
+ iommu-map-mask = <0>;
status = "disabled";
};
@@ -2265,8 +2300,8 @@
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
- /* Map all possible DDR as inbound ranges */
- dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+ /* Map all possible DDR/IOMMU as inbound ranges */
+ dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
@@ -2277,6 +2312,8 @@
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 318>;
+ iommu-map = <0 &ipmmu_hc 1 1>;
+ iommu-map-mask = <0>;
status = "disabled";
};
@@ -2334,6 +2371,7 @@
clocks = <&cpg CPG_MOD 615>;
power-domains = <&sysc R8A774B1_PD_A3VP>;
resets = <&cpg 615>;
+ iommus = <&ipmmu_vp0 0>;
};
vspb: vsp@fe960000 {
@@ -2386,6 +2424,7 @@
clocks = <&cpg CPG_MOD 607>;
power-domains = <&sysc R8A774B1_PD_A3VP>;
resets = <&cpg 607>;
+ iommus = <&ipmmu_vp0 5>;
};
fcpvd0: fcp@fea27000 {
@@ -2394,6 +2433,7 @@
clocks = <&cpg CPG_MOD 603>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 603>;
+ iommus = <&ipmmu_vi0 8>;
};
fcpvd1: fcp@fea2f000 {
@@ -2402,6 +2442,7 @@
clocks = <&cpg CPG_MOD 602>;
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 602>;
+ iommus = <&ipmmu_vi0 9>;
};
fcpvi0: fcp@fe9af000 {
@@ -2410,6 +2451,7 @@
clocks = <&cpg CPG_MOD 611>;
power-domains = <&sysc R8A774B1_PD_A3VP>;
resets = <&cpg 611>;
+ iommus = <&ipmmu_vp0 8>;
};
csi20: csi2@fea80000 {
@@ -2626,6 +2668,7 @@
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
+ bootph-all;
};
};
@@ -2691,10 +2734,11 @@
timer {
compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
};
/* External USB clocks - can be overridden by the board */
generated by cgit (git 2.34.1) at 2025-12-31 23:39:46 +0000