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Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77951.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a77951.dtsi61
1 files changed, 42 insertions, 19 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77951.dtsi b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
index 6d15229d25ab..9ad700bde4ba 100644
--- a/arch/arm64/boot/dts/renesas/r8a77951.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77951.dtsi
@@ -9,8 +9,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a7795-sysc.h>
-#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4
-
#define SOC_HAS_HDMI1
#define SOC_HAS_SATA
#define SOC_HAS_USB2_CH2
@@ -20,6 +18,7 @@
compatible = "renesas,r8a7795";
#address-cells = <2>;
#size-cells = <2>;
+ interrupt-parent = <&gic>;
/*
* The external audio clocks are configured as 0 Hz fixed frequency
@@ -294,6 +293,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
extalr_clk: extalr {
@@ -301,6 +301,7 @@
#clock-cells = <0>;
/* This value must be overridden by the board */
clock-frequency = <0>;
+ bootph-all;
};
/* External PCIe clock - can be overridden by the board */
@@ -312,10 +313,10 @@
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
- interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a53_0>,
<&a53_1>,
<&a53_2>,
@@ -324,10 +325,10 @@
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
<&a57_1>,
<&a57_2>,
@@ -348,7 +349,7 @@
soc: soc {
compatible = "simple-bus";
- interrupt-parent = <&gic>;
+ bootph-all;
#address-cells = <2>;
#size-cells = <2>;
@@ -364,6 +365,16 @@
status = "disabled";
};
+ swdt: watchdog@e6030000 {
+ compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
+ reg = <0 0xe6030000 0 0x0c>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_CORE R8A7795_CLK_OSC>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 401>;
+ status = "disabled";
+ };
+
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7795",
"renesas,rcar-gen3-gpio";
@@ -487,6 +498,7 @@
pfc: pinctrl@e6060000 {
compatible = "renesas,pfc-r8a7795";
reg = <0 0xe6060000 0 0x50c>;
+ bootph-all;
};
cmt0: timer@e60f0000 {
@@ -567,11 +579,13 @@
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
+ bootph-all;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7795-rst";
reg = <0 0xe6160000 0 0x0200>;
+ bootph-all;
};
sysc: system-controller@e6180000 {
@@ -616,6 +630,7 @@
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 125>;
clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -628,7 +643,9 @@
reg = <0 0xe6fc0000 0 0x30>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -641,7 +658,9 @@
reg = <0 0xe6fd0000 0 0x30>;
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
clocks = <&cpg CPG_MOD 123>;
clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -655,6 +674,7 @@
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 122>;
clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -668,6 +688,7 @@
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tuni0", "tuni1", "tuni2";
clocks = <&cpg CPG_MOD 121>;
clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -1362,7 +1383,7 @@
<&can_clk>;
clock-names = "fck", "canfd", "can_clk";
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ assigned-clock-rates = <80000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 914>;
status = "disabled";
@@ -2032,7 +2053,7 @@
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>,
<&audio_clk_c>,
- <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+ <&cpg CPG_MOD 922>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
@@ -3393,6 +3414,7 @@
prr: chipid@fff00044 {
compatible = "renesas,prr";
reg = <0 0xfff00044 0 4>;
+ bootph-all;
};
};
@@ -3464,10 +3486,11 @@
timer {
compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys";
};
/* External USB clocks - can be overridden by the board */