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Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3328-rock64.dts')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-rock64.dts12
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
index 229fe9da9c2d..5367e5fa9232 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts
@@ -27,7 +27,7 @@
#clock-cells = <0>;
};
- vcc_sd: sdmmc-regulator {
+ vcc_sd: regulator-sdmmc {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -39,7 +39,7 @@
};
/* Common enable line for all of the rails mentioned in the labels */
- vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator {
+ vcc_host_5v: vcc_host1_5v: vcc_otg_5v: regulator-vcc-host-5v {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
@@ -50,7 +50,7 @@
vin-supply = <&vcc_sys>;
};
- vcc_sys: vcc-sys {
+ vcc_sys: regulator-vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
@@ -144,7 +144,6 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
- snps,force_thresh_dma_mode;
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
@@ -154,6 +153,8 @@
};
&hdmi {
+ avdd-0v9-supply = <&vdd_10>;
+ avdd-1v8-supply = <&vcc_18>;
status = "okay";
};
@@ -179,7 +180,7 @@
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
- rockchip,system-power-controller;
+ system-power-controller;
wakeup-source;
vcc1-supply = <&vcc_sys>;
@@ -342,6 +343,7 @@
/* maximum speed for Rockchip SPI */
spi-max-frequency = <50000000>;
+ vcc-supply = <&vcc_io>;
};
};