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Diffstat (limited to 'arch/arm64/boot/dts/sprd/sc9860.dtsi')
-rw-r--r--arch/arm64/boot/dts/sprd/sc9860.dtsi143
1 files changed, 26 insertions, 117 deletions
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
index 5f57bf055cde..864ef0a17425 100644
--- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Spreadtrum SC9860 SoC
*
* Copyright (C) 2016, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -50,7 +49,7 @@
CPU0: cpu@530000 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530000>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -58,7 +57,7 @@
CPU1: cpu@530001 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530001>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -66,7 +65,7 @@
CPU2: cpu@530002 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530002>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -74,7 +73,7 @@
CPU3: cpu@530003 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530003>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -82,7 +81,7 @@
CPU4: cpu@530100 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530100>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -90,7 +89,7 @@
CPU5: cpu@530101 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530101>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -98,7 +97,7 @@
CPU6: cpu@530102 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530102>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
@@ -106,14 +105,14 @@
CPU7: cpu@530103 {
device_type = "cpu";
- compatible = "arm,cortex-a53", "arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x530103>;
enable-method = "psci";
cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
};
};
- idle-states{
+ idle-states {
entry-method = "psci";
CORE_PD: core_pd {
@@ -135,18 +134,6 @@
};
};
- gic: interrupt-controller@12001000 {
- compatible = "arm,gic-400";
- reg = <0 0x12001000 0 0x1000>,
- <0 0x12002000 0 0x2000>,
- <0 0x12004000 0 0x2000>,
- <0 0x12006000 0 0x2000>;
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
- | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
psci {
compatible = "arm,psci-0.2";
method = "smc";
@@ -165,7 +152,7 @@
};
pmu {
- compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
@@ -185,18 +172,16 @@
};
soc {
- pmu_gate: pmu-gate {
- compatible = "sprd,sc9860-pmu-gate";
- sprd,syscon = <&pmu_regs>; /* 0x402b0000 */
- clocks = <&ext_26m>;
- #clock-cells = <1>;
- };
-
- pll: pll {
- compatible = "sprd,sc9860-pll";
- sprd,syscon = <&ana_regs>; /* 0x40400000 */
- clocks = <&pmu_gate 0>;
- #clock-cells = <1>;
+ gic: interrupt-controller@12001000 {
+ compatible = "arm,gic-400";
+ reg = <0 0x12001000 0 0x1000>,
+ <0 0x12002000 0 0x2000>,
+ <0 0x12004000 0 0x2000>,
+ <0 0x12006000 0 0x2000>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
+ | IRQ_TYPE_LEVEL_HIGH)>;
};
ap_clk: clock-controller@20000000 {
@@ -207,7 +192,7 @@
#clock-cells = <1>;
};
- aon_prediv: aon-prediv {
+ aon_prediv: aon-prediv@402d0000 {
compatible = "sprd,sc9860-aon-prediv";
reg = <0 0x402d0000 0 0x400>;
clocks = <&ext_26m>, <&pll 0>,
@@ -215,19 +200,6 @@
#clock-cells = <1>;
};
- apahb_gate: apahb-gate {
- compatible = "sprd,sc9860-apahb-gate";
- sprd,syscon = <&ap_ahb_regs>; /* 0x20210000 */
- clocks = <&aon_prediv 0>;
- #clock-cells = <1>;
- };
-
- aon_gate: aon-gate {
- compatible = "sprd,sc9860-aon-gate";
- sprd,syscon = <&aon_regs>; /* 0x402e0000 */
- clocks = <&aon_prediv 0>;
- #clock-cells = <1>;
- };
aonsecure_clk: clock-controller@40880000 {
compatible = "sprd,sc9860-aonsecure-clk";
@@ -236,13 +208,6 @@
#clock-cells = <1>;
};
- agcp_gate: agcp-gate {
- compatible = "sprd,sc9860-agcp-gate";
- sprd,syscon = <&agcp_regs>; /* 0x415e0000 */
- clocks = <&aon_prediv 0>;
- #clock-cells = <1>;
- };
-
gpu_clk: clock-controller@60200000 {
compatible = "sprd,sc9860-gpu-clk";
reg = <0 0x60200000 0 0x400>;
@@ -257,13 +222,6 @@
#clock-cells = <1>;
};
- vsp_gate: vsp-gate {
- compatible = "sprd,sc9860-vsp-gate";
- sprd,syscon = <&vsp_regs>; /* 0x61100000 */
- clocks = <&vsp_clk 0>;
- #clock-cells = <1>;
- };
-
cam_clk: clock-controller@62000000 {
compatible = "sprd,sc9860-cam-clk";
reg = <0 0x62000000 0 0x4000>;
@@ -271,13 +229,6 @@
#clock-cells = <1>;
};
- cam_gate: cam-gate {
- compatible = "sprd,sc9860-cam-gate";
- sprd,syscon = <&cam_regs>; /* 0x62100000 */
- clocks = <&cam_clk 0>;
- #clock-cells = <1>;
- };
-
disp_clk: clock-controller@63000000 {
compatible = "sprd,sc9860-disp-clk";
reg = <0 0x63000000 0 0x400>;
@@ -285,22 +236,8 @@
#clock-cells = <1>;
};
- disp_gate: disp-gate {
- compatible = "sprd,sc9860-disp-gate";
- sprd,syscon = <&disp_regs>; /* 0x63100000 */
- clocks = <&disp_clk 0>;
- #clock-cells = <1>;
- };
-
- apapb_gate: apapb-gate {
- compatible = "sprd,sc9860-apapb-gate";
- sprd,syscon = <&ap_apb_regs>; /* 0x70b00000 */
- clocks = <&ap_clk 0>;
- #clock-cells = <1>;
- };
-
funnel@10001000 { /* SoC Funnel */
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x10001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
@@ -367,7 +304,7 @@
};
funnel@11001000 { /* Cluster0 Funnel */
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x11001000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
@@ -415,7 +352,7 @@
};
funnel@11002000 { /* Cluster1 Funnel */
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x11002000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
@@ -513,7 +450,7 @@
};
funnel@11005000 { /* Main Funnel */
- compatible = "arm,coresight-funnel", "arm,primecell";
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0 0x11005000 0 0x1000>;
clocks = <&ext_26m>;
clock-names = "apb_pclk";
@@ -684,33 +621,5 @@
};
};
};
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key-volumedown {
- label = "Volume Down Key";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&eic_debounce 2 GPIO_ACTIVE_LOW>;
- debounce-interval = <2>;
- wakeup-source;
- };
-
- key-volumeup {
- label = "Volume Up Key";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pmic_eic 10 GPIO_ACTIVE_HIGH>;
- debounce-interval = <2>;
- wakeup-source;
- };
-
- key-power {
- label = "Power Key";
- linux,code = <KEY_POWER>;
- gpios = <&pmic_eic 1 GPIO_ACTIVE_HIGH>;
- debounce-interval = <2>;
- wakeup-source;
- };
- };
};
};
generated by cgit (git 2.34.1) at 2025-12-30 06:05:21 +0000