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-rw-r--r--arch/arm64/boot/dts/sprd/sc2731.dtsi9
-rw-r--r--arch/arm64/boot/dts/sprd/sc9836-openphone.dts3
-rw-r--r--arch/arm64/boot/dts/sprd/sc9836.dtsi3
-rw-r--r--arch/arm64/boot/dts/sprd/sc9860.dtsi61
-rw-r--r--arch/arm64/boot/dts/sprd/sc9863a.dtsi24
-rw-r--r--arch/arm64/boot/dts/sprd/sharkl3.dtsi18
-rw-r--r--arch/arm64/boot/dts/sprd/sharkl64.dtsi3
-rw-r--r--arch/arm64/boot/dts/sprd/sp9860g-1h10.dts42
-rw-r--r--arch/arm64/boot/dts/sprd/ums512.dtsi18
-rw-r--r--arch/arm64/boot/dts/sprd/ums9620.dtsi14
-rw-r--r--arch/arm64/boot/dts/sprd/whale2.dtsi45
11 files changed, 127 insertions, 113 deletions
diff --git a/arch/arm64/boot/dts/sprd/sc2731.dtsi b/arch/arm64/boot/dts/sprd/sc2731.dtsi
index e15409f55f43..458685b82462 100644
--- a/arch/arm64/boot/dts/sprd/sc2731.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc2731.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Spreadtrum SC2731 PMIC dts file
*
* Copyright (C) 2018, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
&adi_bus {
@@ -95,17 +94,17 @@
nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
};
- fgu@a00 {
+ pmic_fgu: fuel-gauge@a00 {
compatible = "sprd,sc2731-fgu";
reg = <0xa00>;
- bat-detect-gpio = <&pmic_eic 9 GPIO_ACTIVE_HIGH>;
+ battery-detect-gpios = <&pmic_eic 9 GPIO_ACTIVE_HIGH>;
io-channels = <&pmic_adc 3>, <&pmic_adc 6>;
io-channel-names = "bat-temp", "charge-vol";
- monitored-battery = <&bat>;
nvmem-cell-names = "fgu_calib";
nvmem-cells = <&fgu_calib>;
interrupt-parent = <&sc2731_pmic>;
interrupts = <4>;
+ status = "disabled";
};
vibrator@ec8 {
diff --git a/arch/arm64/boot/dts/sprd/sc9836-openphone.dts b/arch/arm64/boot/dts/sprd/sc9836-openphone.dts
index e5657c35cd10..b98589ea5ac2 100644
--- a/arch/arm64/boot/dts/sprd/sc9836-openphone.dts
+++ b/arch/arm64/boot/dts/sprd/sc9836-openphone.dts
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Spreadtrum SC9836 openphone board DTS file
*
* Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
*/
/dts-v1/;
diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/sprd/sc9836.dtsi
index 8bb8a70966d2..bc3fc9fc3d90 100644
--- a/arch/arm64/boot/dts/sprd/sc9836.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Spreadtrum SC9836 SoC DTS file
*
* Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
*/
#include "sharkl64.dtsi"
diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/sprd/sc9860.dtsi
index e27eb3ed1d47..d2456d633c39 100644
--- a/arch/arm64/boot/dts/sprd/sc9860.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Spreadtrum SC9860 SoC
*
* Copyright (C) 2016, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -113,7 +112,7 @@
};
};
- idle-states{
+ idle-states {
entry-method = "psci";
CORE_PD: core_pd {
@@ -135,18 +134,6 @@
};
};
- gic: interrupt-controller@12001000 {
- compatible = "arm,gic-400";
- reg = <0 0x12001000 0 0x1000>,
- <0 0x12002000 0 0x2000>,
- <0 0x12004000 0 0x2000>,
- <0 0x12006000 0 0x2000>;
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
- | IRQ_TYPE_LEVEL_HIGH)>;
- };
-
psci {
compatible = "arm,psci-0.2";
method = "smc";
@@ -165,7 +152,7 @@
};
pmu {
- compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
@@ -185,6 +172,18 @@
};
soc {
+ gic: interrupt-controller@12001000 {
+ compatible = "arm,gic-400";
+ reg = <0 0x12001000 0 0x1000>,
+ <0 0x12002000 0 0x2000>,
+ <0 0x12004000 0 0x2000>,
+ <0 0x12006000 0 0x2000>;
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8)
+ | IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
pmu_gate: pmu-gate {
compatible = "sprd,sc9860-pmu-gate";
sprd,syscon = <&pmu_regs>; /* 0x402b0000 */
@@ -207,7 +206,7 @@
#clock-cells = <1>;
};
- aon_prediv: aon-prediv {
+ aon_prediv: aon-prediv@402d0000 {
compatible = "sprd,sc9860-aon-prediv";
reg = <0 0x402d0000 0 0x400>;
clocks = <&ext_26m>, <&pll 0>,
@@ -684,33 +683,5 @@
};
};
};
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key-volumedown {
- label = "Volume Down Key";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&eic_debounce 2 GPIO_ACTIVE_LOW>;
- debounce-interval = <2>;
- wakeup-source;
- };
-
- key-volumeup {
- label = "Volume Up Key";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&pmic_eic 10 GPIO_ACTIVE_HIGH>;
- debounce-interval = <2>;
- wakeup-source;
- };
-
- key-power {
- label = "Power Key";
- linux,code = <KEY_POWER>;
- gpios = <&pmic_eic 1 GPIO_ACTIVE_HIGH>;
- debounce-interval = <2>;
- wakeup-source;
- };
- };
};
};
diff --git a/arch/arm64/boot/dts/sprd/sc9863a.dtsi b/arch/arm64/boot/dts/sprd/sc9863a.dtsi
index 22d81ace740a..e97000e560e7 100644
--- a/arch/arm64/boot/dts/sprd/sc9863a.dtsi
+++ b/arch/arm64/boot/dts/sprd/sc9863a.dtsi
@@ -134,7 +134,7 @@
};
pmu {
- compatible = "arm,armv8-pmuv3";
+ compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
@@ -163,18 +163,18 @@
ap_clk: clock-controller@21500000 {
compatible = "sprd,sc9863a-ap-clk";
reg = <0 0x21500000 0 0x1000>;
- clocks = <&ext_32k>, <&ext_26m>;
- clock-names = "ext-32k", "ext-26m";
+ clocks = <&ext_26m>, <&ext_32k>;
+ clock-names = "ext-26m", "ext-32k";
#clock-cells = <1>;
};
aon_clk: clock-controller@402d0000 {
compatible = "sprd,sc9863a-aon-clk";
reg = <0 0x402d0000 0 0x1000>;
- clocks = <&ext_26m>, <&rco_100m>,
- <&ext_32k>, <&ext_4m>;
- clock-names = "ext-26m", "rco-100m",
- "ext-32k", "ext-4m";
+ clocks = <&ext_26m>, <&ext_32k>,
+ <&ext_4m>, <&rco_100m>;
+ clock-names = "ext-26m", "ext-32k",
+ "ext-4m", "rco-100m";
#clock-cells = <1>;
};
@@ -288,7 +288,7 @@
};
};
- in-port {
+ in-ports {
port {
etf_little_in: endpoint {
remote-endpoint =
@@ -551,14 +551,14 @@
#size-cells = <2>;
ranges;
- sdio0: sdio@20300000 {
+ sdio0: mmc@20300000 {
compatible = "sprd,sdhci-r11";
reg = <0 0x20300000 0 0x1000>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "sdio", "enable";
clocks = <&aon_clk CLK_SDIO0_2X>,
<&apahb_gate CLK_SDIO0_EB>;
+ clock-names = "sdio", "enable";
assigned-clocks = <&aon_clk CLK_SDIO0_2X>;
assigned-clock-parents = <&rpll CLK_RPLL_390M>;
@@ -567,14 +567,14 @@
no-mmc;
};
- sdio3: sdio@20600000 {
+ sdio3: mmc@20600000 {
compatible = "sprd,sdhci-r11";
reg = <0 0x20600000 0 0x1000>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "sdio", "enable";
clocks = <&aon_clk CLK_EMMC_2X>,
<&apahb_gate CLK_EMMC_EB>;
+ clock-names = "sdio", "enable";
assigned-clocks = <&aon_clk CLK_EMMC_2X>;
assigned-clock-parents = <&rpll CLK_RPLL_390M>;
diff --git a/arch/arm64/boot/dts/sprd/sharkl3.dtsi b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
index 206a4afdab1c..9b4ee0bdd69f 100644
--- a/arch/arm64/boot/dts/sprd/sharkl3.dtsi
+++ b/arch/arm64/boot/dts/sprd/sharkl3.dtsi
@@ -24,7 +24,7 @@
#size-cells = <1>;
ranges = <0 0 0x20e00000 0x4000>;
- apahb_gate: apahb-gate {
+ apahb_gate: apahb-gate@0 {
compatible = "sprd,sc9863a-apahb-gate";
reg = <0x0 0x1020>;
#clock-cells = <1>;
@@ -39,7 +39,7 @@
#size-cells = <1>;
ranges = <0 0 0x402b0000 0x4000>;
- pmu_gate: pmu-gate {
+ pmu_gate: pmu-gate@0 {
compatible = "sprd,sc9863a-pmu-gate";
reg = <0 0x1200>;
clocks = <&ext_26m>;
@@ -56,7 +56,7 @@
#size-cells = <1>;
ranges = <0 0 0x402e0000 0x4000>;
- aonapb_gate: aonapb-gate {
+ aonapb_gate: aonapb-gate@0 {
compatible = "sprd,sc9863a-aonapb-gate";
reg = <0 0x1100>;
#clock-cells = <1>;
@@ -71,7 +71,7 @@
#size-cells = <1>;
ranges = <0 0 0x40353000 0x3000>;
- pll: pll {
+ pll: pll@0 {
compatible = "sprd,sc9863a-pll";
reg = <0 0x100>;
clocks = <&ext_26m>;
@@ -88,7 +88,7 @@
#size-cells = <1>;
ranges = <0 0 0x40359000 0x3000>;
- mpll: mpll {
+ mpll: mpll@0 {
compatible = "sprd,sc9863a-mpll";
reg = <0 0x100>;
#clock-cells = <1>;
@@ -103,7 +103,7 @@
#size-cells = <1>;
ranges = <0 0 0x4035c000 0x3000>;
- rpll: rpll {
+ rpll: rpll@0 {
compatible = "sprd,sc9863a-rpll";
reg = <0 0x100>;
clocks = <&ext_26m>;
@@ -120,7 +120,7 @@
#size-cells = <1>;
ranges = <0 0 0x40363000 0x3000>;
- dpll: dpll {
+ dpll: dpll@0 {
compatible = "sprd,sc9863a-dpll";
reg = <0 0x100>;
#clock-cells = <1>;
@@ -135,7 +135,7 @@
#size-cells = <1>;
ranges = <0 0 0x60800000 0x3000>;
- mm_gate: mm-gate {
+ mm_gate: mm-gate@0 {
compatible = "sprd,sc9863a-mm-gate";
reg = <0 0x1100>;
#clock-cells = <1>;
@@ -150,7 +150,7 @@
#size-cells = <1>;
ranges = <0 0 0x71300000 0x4000>;
- apapb_gate: apapb-gate {
+ apapb_gate: apapb-gate@0 {
compatible = "sprd,sc9863a-apapb-gate";
reg = <0 0x1000>;
clocks = <&ext_26m>;
diff --git a/arch/arm64/boot/dts/sprd/sharkl64.dtsi b/arch/arm64/boot/dts/sprd/sharkl64.dtsi
index 69f64e7fce7c..bf58702c4e07 100644
--- a/arch/arm64/boot/dts/sprd/sharkl64.dtsi
+++ b/arch/arm64/boot/dts/sprd/sharkl64.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Spreadtrum Sharkl64 platform DTS file
*
* Copyright (C) 2014, Spreadtrum Communications Inc.
- *
- * This file is licensed under a dual GPLv2 or X11 license.
*/
/ {
diff --git a/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts b/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts
index 6b95fd94cee3..b1fa817ece1e 100644
--- a/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts
+++ b/arch/arm64/boot/dts/sprd/sp9860g-1h10.dts
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Spreadtrum SP9860g board
*
* Copyright (C) 2017, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
@@ -24,7 +23,7 @@
spi0 = &adi_bus;
};
- memory{
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0 0x60000000>,
<0x1 0x80000000 0 0x60000000>;
@@ -34,6 +33,34 @@
stdout-path = "serial1:115200n8";
};
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ key-volumedown {
+ label = "Volume Down Key";
+ linux,code = <KEY_VOLUMEDOWN>;
+ gpios = <&eic_debounce 2 GPIO_ACTIVE_LOW>;
+ debounce-interval = <2>;
+ wakeup-source;
+ };
+
+ key-volumeup {
+ label = "Volume Up Key";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&pmic_eic 10 GPIO_ACTIVE_HIGH>;
+ debounce-interval = <2>;
+ wakeup-source;
+ };
+
+ key-power {
+ label = "Power Key";
+ linux,code = <KEY_POWER>;
+ gpios = <&pmic_eic 1 GPIO_ACTIVE_HIGH>;
+ debounce-interval = <2>;
+ wakeup-source;
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -44,8 +71,8 @@
compatible = "simple-battery";
charge-full-design-microamp-hours = <1900000>;
charge-term-current-microamp = <120000>;
- constant_charge_voltage_max_microvolt = <4350000>;
- internal-resistance-micro-ohms = <250000>;
+ constant-charge-voltage-max-microvolt = <4350000>;
+ factory-internal-resistance-micro-ohms = <250000>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
<4022000 85>, <3983000 80>, <3949000 75>,
@@ -57,6 +84,11 @@
};
};
+&pmic_fgu {
+ monitored-battery = <&bat>;
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/sprd/ums512.dtsi b/arch/arm64/boot/dts/sprd/ums512.dtsi
index dbdb79f8e959..efa14309cc4e 100644
--- a/arch/arm64/boot/dts/sprd/ums512.dtsi
+++ b/arch/arm64/boot/dts/sprd/ums512.dtsi
@@ -136,16 +136,22 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */
};
- pmu {
- compatible = "arm,armv8-pmuv3";
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>, <&CPU4>, <&CPU5>;
+ };
+
+ pmu-a75 {
+ compatible = "arm,cortex-a75-pmu";
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CPU6>, <&CPU7>;
};
soc: soc {
@@ -843,9 +849,9 @@
compatible = "sprd,sdhci-r11";
reg = <0x1100000 0x1000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "sdio", "enable";
clocks = <&ap_clk CLK_SDIO0_2X>,
<&apapb_gate CLK_SDIO0_EB>;
+ clock-names = "sdio", "enable";
assigned-clocks = <&ap_clk CLK_SDIO0_2X>;
assigned-clock-parents = <&pll1 CLK_RPLL>;
status = "disabled";
@@ -855,9 +861,9 @@
compatible = "sprd,sdhci-r11";
reg = <0x1400000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "sdio", "enable";
clocks = <&ap_clk CLK_EMMC_2X>,
<&apapb_gate CLK_EMMC_EB>;
+ clock-names = "sdio", "enable";
assigned-clocks = <&ap_clk CLK_EMMC_2X>;
assigned-clock-parents = <&pll1 CLK_RPLL>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/sprd/ums9620.dtsi b/arch/arm64/boot/dts/sprd/ums9620.dtsi
index 2191f0a4811b..2458071320c9 100644
--- a/arch/arm64/boot/dts/sprd/ums9620.dtsi
+++ b/arch/arm64/boot/dts/sprd/ums9620.dtsi
@@ -144,16 +144,22 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; /* Hipervisor PPI */
};
- pmu {
- compatible = "arm,armv8-pmuv3";
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CPU0>, <&CPU1>, <&CPU2>, <&CPU3>;
+ };
+
+ pmu-a76 {
+ compatible = "arm,cortex-a76-pmu";
+ interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CPU4>, <&CPU5>, <&CPU6>, <&CPU7>;
};
soc: soc {
diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi
index fece49704b5c..a551e14ce826 100644
--- a/arch/arm64/boot/dts/sprd/whale2.dtsi
+++ b/arch/arm64/boot/dts/sprd/whale2.dtsi
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Spreadtrum Whale2 platform peripherals
*
* Copyright (C) 2016, Spreadtrum Communications Inc.
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
#include <dt-bindings/clock/sprd,sc9860-clk.h>
@@ -64,7 +63,7 @@
reg = <0 0x70b00000 0 0x40000>;
};
- ap-apb {
+ ap-apb@70000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -75,9 +74,10 @@
"sprd,sc9836-uart";
reg = <0x0 0x100>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "enable", "uart", "source";
clocks = <&apapb_gate CLK_UART0_EB>,
- <&ap_clk CLK_UART0>, <&ext_26m>;
+ <&ap_clk CLK_UART0>,
+ <&ext_26m>;
+ clock-names = "enable", "uart", "source";
status = "disabled";
};
@@ -86,9 +86,10 @@
"sprd,sc9836-uart";
reg = <0x100000 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "enable", "uart", "source";
clocks = <&apapb_gate CLK_UART1_EB>,
- <&ap_clk CLK_UART1>, <&ext_26m>;
+ <&ap_clk CLK_UART1>,
+ <&ext_26m>;
+ clock-names = "enable", "uart", "source";
status = "disabled";
};
@@ -97,9 +98,10 @@
"sprd,sc9836-uart";
reg = <0x200000 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "enable", "uart", "source";
clocks = <&apapb_gate CLK_UART2_EB>,
- <&ap_clk CLK_UART2>, <&ext_26m>;
+ <&ap_clk CLK_UART2>,
+ <&ext_26m>;
+ clock-names = "enable", "uart", "source";
status = "disabled";
};
@@ -108,9 +110,10 @@
"sprd,sc9836-uart";
reg = <0x300000 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "enable", "uart", "source";
clocks = <&apapb_gate CLK_UART3_EB>,
- <&ap_clk CLK_UART3>, <&ext_26m>;
+ <&ap_clk CLK_UART3>,
+ <&ext_26m>;
+ clock-names = "enable", "uart", "source";
status = "disabled";
};
};
@@ -129,19 +132,19 @@
/* For backwards compatibility: */
#dma-channels = <32>;
dma-channels = <32>;
- clock-names = "enable";
clocks = <&apahb_gate CLK_DMA_EB>;
+ clock-names = "enable";
};
- sdio3: sdio@50430000 {
+ sdio3: mmc@50430000 {
compatible = "sprd,sdhci-r11";
reg = <0 0x50430000 0 0x1000>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "sdio", "enable", "2x_enable";
clocks = <&aon_prediv CLK_EMMC_2X>,
- <&apahb_gate CLK_EMMC_EB>,
- <&aon_gate CLK_EMMC_2X_EN>;
+ <&apahb_gate CLK_EMMC_EB>,
+ <&aon_gate CLK_EMMC_2X_EN>;
+ clock-names = "sdio", "enable", "2x_enable";
assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
assigned-clock-parents = <&clk_l0_409m6>;
@@ -194,8 +197,8 @@
compatible = "sprd,hwspinlock-r3p0";
reg = <0 0x40500000 0 0x1000>;
#hwlock-cells = <1>;
- clock-names = "enable";
clocks = <&aon_gate CLK_SPLK_EB>;
+ clock-names = "enable";
};
eic_debounce: gpio@40210000 {
@@ -258,9 +261,9 @@
reg = <0 0x40310000 0 0x1000>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
timeout-sec = <12>;
- clock-names = "enable", "rtc_enable";
clocks = <&aon_gate CLK_APCPU_WDG_EB>,
- <&aon_gate CLK_AP_WDG_RTC_EB>;
+ <&aon_gate CLK_AP_WDG_RTC_EB>;
+ clock-names = "enable", "rtc_enable";
};
};
@@ -277,9 +280,9 @@
/* For backwards compatibility: */
#dma-channels = <32>;
dma-channels = <32>;
- clock-names = "enable", "ashb_eb";
clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
- <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+ <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
+ clock-names = "enable", "ashb_eb";
};
};
};
generated by cgit (git 2.34.1) at 2025-07-23 23:26:43 +0000