diff options
Diffstat (limited to 'arch/m68k/Kconfig.cpu')
| -rw-r--r-- | arch/m68k/Kconfig.cpu | 149 |
1 files changed, 101 insertions, 48 deletions
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 694c4fca9f5d..c9a7e602d8a4 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -2,7 +2,7 @@ comment "Processor Type" choice - prompt "CPU family support" + prompt "CPU/machine family support" default M68KCLASSIC if MMU default COLDFIRE if !MMU help @@ -19,30 +19,46 @@ choice processor, select COLDFIRE. config M68KCLASSIC - bool "Classic M68K CPU family support" + bool "Classic M68K CPU/machine family support" + select HAVE_ARCH_PFN_VALID + select M68020 if MMU && !(M68030 || M68040 || M68060) config COLDFIRE bool "Coldfire CPU family support" - select ARCH_HAVE_CUSTOM_GPIO_H select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_CAS select CPU_HAS_NO_MULDIV64 select GENERIC_CSUM select GPIOLIB select HAVE_LEGACY_CLK + select HAVE_PAGE_SIZE_8KB if !MMU -endchoice +config SUN3 + bool "Sun3 machine support" + depends on MMU + select HAVE_ARCH_PFN_VALID + select LEGACY_TIMER_TICK + select NO_DMA + select M68020 + help + This option enables support for the Sun 3 series of workstations + (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU + but the custom memory management unit makes them incompatible with + all other classic m68k machines, including Sun 3x. -if M68KCLASSIC +endchoice config M68000 - bool "MC68000" - depends on !MMU + def_bool M68KCLASSIC && !MMU select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_CAS select CPU_HAS_NO_MULDIV64 select CPU_HAS_NO_UNALIGNED select GENERIC_CSUM select CPU_NO_EFFICIENT_FFS select HAVE_ARCH_HASH + select HAVE_PAGE_SIZE_4KB + select LEGACY_TIMER_TICK help The Freescale (was Motorola) 68000 CPU is the first generation of the well known M68K family of processors. The CPU core as well as @@ -50,18 +66,8 @@ config M68000 System-On-Chip devices (eg 68328, 68302, etc). It does not contain a paging MMU. -config MCPU32 - bool - select CPU_HAS_NO_BITFIELDS - select CPU_HAS_NO_UNALIGNED - select CPU_NO_EFFICIENT_FFS - help - The Freescale (was then Motorola) CPU32 is a CPU core that is - based on the 68020 processor. For the most part it is used in - System-On-Chip parts, and does not contain a paging MMU. - config M68020 - bool "68020 support" + bool "68020 support" if M68KCLASSIC depends on MMU select FPU select CPU_HAS_ADDRESS_SPACES @@ -71,9 +77,10 @@ config M68020 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the Sun 3, which provides its own version. +if M68KCLASSIC && MMU + config M68030 bool "68030 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help @@ -83,7 +90,6 @@ config M68030 config M68040 bool "68040 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help @@ -94,36 +100,35 @@ config M68040 config M68060 bool "68060 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68060 processor, say Y. Otherwise, say N. +endif # M68KCLASSIC + config M68328 - bool "MC68328" + bool depends on !MMU select M68000 help Motorola 68328 processor support. config M68EZ328 - bool "MC68EZ328" + bool depends on !MMU select M68000 help Motorola 68EX328 processor support. config M68VZ328 - bool "MC68VZ328" + bool depends on !MMU select M68000 help Motorola 68VZ328 processor support. -endif # M68KCLASSIC - if COLDFIRE choice @@ -137,6 +142,7 @@ config M5206 bool "MCF5206" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_MBAR select CPU_NO_EFFICIENT_FFS help @@ -146,6 +152,7 @@ config M5206e bool "MCF5206e" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_MBAR select CPU_NO_EFFICIENT_FFS help @@ -154,15 +161,15 @@ config M5206e config M520x bool "MCF520x" depends on !MMU - select GENERIC_CLOCKEVENTS + select COLDFIRE_PIT_TIMER select HAVE_CACHE_SPLIT help - Freescale Coldfire 5207/5208 processor support. + Freescale Coldfire 5207/5208 processor support. config M523x bool "MCF523x" depends on !MMU - select GENERIC_CLOCKEVENTS + select COLDFIRE_PIT_TIMER select HAVE_CACHE_SPLIT select HAVE_IPSBAR help @@ -172,6 +179,7 @@ config M5249 bool "MCF5249" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_MBAR select CPU_NO_EFFICIENT_FFS help @@ -181,6 +189,7 @@ config M525x bool "MCF525x" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_MBAR select CPU_NO_EFFICIENT_FFS help @@ -189,10 +198,10 @@ config M525x config M5271 bool "MCF5271" depends on !MMU + select COLDFIRE_PIT_TIMER select M527x select HAVE_CACHE_SPLIT select HAVE_IPSBAR - select GENERIC_CLOCKEVENTS help Freescale (Motorola) ColdFire 5270/5271 processor support. @@ -200,6 +209,7 @@ config M5272 bool "MCF5272" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_MBAR select CPU_NO_EFFICIENT_FFS help @@ -208,17 +218,17 @@ config M5272 config M5275 bool "MCF5275" depends on !MMU + select COLDFIRE_PIT_TIMER select M527x select HAVE_CACHE_SPLIT select HAVE_IPSBAR - select GENERIC_CLOCKEVENTS help Freescale (Motorola) ColdFire 5274/5275 processor support. config M528x bool "MCF528x" depends on !MMU - select GENERIC_CLOCKEVENTS + select COLDFIRE_PIT_TIMER select HAVE_CACHE_SPLIT select HAVE_IPSBAR help @@ -227,6 +237,7 @@ config M528x config M5307 bool "MCF5307" depends on !MMU + select COLDFIRE_TIMERS select COLDFIRE_SW_A7 select HAVE_CACHE_CB select HAVE_MBAR @@ -237,6 +248,7 @@ config M5307 config M532x bool "MCF532x" depends on !MMU + select COLDFIRE_TIMERS select M53xx select HAVE_CACHE_CB help @@ -245,6 +257,7 @@ config M532x config M537x bool "MCF537x" depends on !MMU + select COLDFIRE_TIMERS select M53xx select HAVE_CACHE_CB help @@ -254,6 +267,7 @@ config M5407 bool "MCF5407" depends on !MMU select COLDFIRE_SW_A7 + select COLDFIRE_TIMERS select HAVE_CACHE_CB select HAVE_MBAR select CPU_NO_EFFICIENT_FFS @@ -263,6 +277,7 @@ config M5407 config M547x bool "MCF547x" select M54xx + select COLDFIRE_SLTIMERS select MMU_COLDFIRE if MMU select FPU if MMU select HAVE_CACHE_CB @@ -273,6 +288,7 @@ config M547x config M548x bool "MCF548x" + select COLDFIRE_SLTIMERS select MMU_COLDFIRE if MMU select FPU if MMU select M54xx @@ -284,8 +300,8 @@ config M548x config M5441x bool "MCF5441x" + select COLDFIRE_PIT_TIMER select MMU_COLDFIRE if MMU - select GENERIC_CLOCKEVENTS select HAVE_CACHE_CB help Freescale Coldfire 54410/54415/54416/54417/54418 processor support. @@ -302,14 +318,24 @@ config M54xx select HAVE_PCI bool -endif # COLDFIRE +config COLDFIRE_PIT_TIMER + bool +config COLDFIRE_TIMERS + bool + select LEGACY_TIMER_TICK + +config COLDFIRE_SLTIMERS + bool + select LEGACY_TIMER_TICK + +endif # COLDFIRE comment "Processor Specific Options" config M68KFPU_EMU bool "Math emulation support" - depends on MMU + depends on (M68KCLASSIC || SUN3) && FPU help At some point in the future, this will cause floating-point math instructions to be emulated by the kernel on machines that lack a @@ -357,7 +383,7 @@ config ADVANCED config RMW_INSNS bool "Use read-modify-write instructions" - depends on ADVANCED + depends on ADVANCED && !CPU_HAS_NO_CAS help This allows to use certain instructions that work with indivisible read-modify-write bus cycles. While this is faster than the @@ -373,15 +399,32 @@ config RMW_INSNS config SINGLE_MEMORY_CHUNK bool "Use one physical chunk of memory only" if ADVANCED && !SUN3 depends on MMU - default y if SUN3 - select NEED_MULTIPLE_NODES + default y if SUN3 || MMU_COLDFIRE help Ignore all but the first contiguous chunk of physical memory for VM purposes. This will save a few bytes kernel size and may speed up - some operations. Say N if not sure. + some operations. + When this option os set to N, you may want to lower "Maximum zone + order" to save memory that could be wasted for unused memory map. + Say N if not sure. + +config ARCH_FORCE_MAX_ORDER + int "Order of maximal physically contiguous allocations" if ADVANCED + depends on !SINGLE_MEMORY_CHUNK + default "10" + help + The kernel page allocator limits the size of maximal physically + contiguous allocations. The limit is called MAX_PAGE_ORDER and it + defines the maximal power of two of number of pages that can be + allocated as a single contiguous block. This option allows + overriding the default setting when ability to allocate very + large blocks of physically contiguous memory is required. + + For systems that have holes in their physical address space this + value also defines the minimal size of the hole that allows + freeing unused memory map. -config ARCH_DISCONTIGMEM_ENABLE - def_bool MMU && !SINGLE_MEMORY_CHUNK + Don't change if unsure. config 060_WRITETHROUGH bool "Use write-through caching for 68060 supervisor accesses" @@ -403,14 +446,12 @@ config M68K_L2_CACHE depends on MAC default y -config NODES_SHIFT - int - default "3" - depends on !SINGLE_MEMORY_CHUNK - config CPU_HAS_NO_BITFIELDS bool +config CPU_HAS_NO_CAS + bool + config CPU_HAS_NO_MULDIV64 bool @@ -419,6 +460,7 @@ config CPU_HAS_NO_UNALIGNED config CPU_HAS_ADDRESS_SPACES bool + select ALTERNATE_USER_ADDRESS_SPACE config FPU bool @@ -487,7 +529,7 @@ config CACHE_BOTH Split the ColdFire CPU cache, and use half as an instruction cache and half as a data cache. endchoice -endif +endif # HAVE_CACHE_SPLIT if HAVE_CACHE_CB choice @@ -504,5 +546,16 @@ config CACHE_COPYBACK help The ColdFire CPU cache is set into Copy-back mode. endchoice -endif +endif # HAVE_CACHE_CB + +# Coldfire cores that do not have a data cache configured can do coherent DMA. +config COLDFIRE_COHERENT_DMA + bool + default y + depends on COLDFIRE + depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH +config M68K_NONCOHERENT_DMA + bool + default y + depends on HAS_DMA && !COLDFIRE_COHERENT_DMA |