diff options
Diffstat (limited to 'arch/m68k/Kconfig.cpu')
| -rw-r--r-- | arch/m68k/Kconfig.cpu | 101 |
1 files changed, 58 insertions, 43 deletions
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu index 29e946394fdb..c9a7e602d8a4 100644 --- a/arch/m68k/Kconfig.cpu +++ b/arch/m68k/Kconfig.cpu @@ -2,7 +2,7 @@ comment "Processor Type" choice - prompt "CPU family support" + prompt "CPU/machine family support" default M68KCLASSIC if MMU default COLDFIRE if !MMU help @@ -19,31 +19,46 @@ choice processor, select COLDFIRE. config M68KCLASSIC - bool "Classic M68K CPU family support" + bool "Classic M68K CPU/machine family support" select HAVE_ARCH_PFN_VALID + select M68020 if MMU && !(M68030 || M68040 || M68060) config COLDFIRE bool "Coldfire CPU family support" - select ARCH_HAVE_CUSTOM_GPIO_H select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_CAS select CPU_HAS_NO_MULDIV64 select GENERIC_CSUM select GPIOLIB select HAVE_LEGACY_CLK + select HAVE_PAGE_SIZE_8KB if !MMU -endchoice +config SUN3 + bool "Sun3 machine support" + depends on MMU + select HAVE_ARCH_PFN_VALID + select LEGACY_TIMER_TICK + select NO_DMA + select M68020 + help + This option enables support for the Sun 3 series of workstations + (3/50, 3/60, 3/1xx, 3/2xx systems). These use a classic 68020 CPU + but the custom memory management unit makes them incompatible with + all other classic m68k machines, including Sun 3x. -if M68KCLASSIC +endchoice config M68000 - bool - depends on !MMU + def_bool M68KCLASSIC && !MMU select CPU_HAS_NO_BITFIELDS + select CPU_HAS_NO_CAS select CPU_HAS_NO_MULDIV64 select CPU_HAS_NO_UNALIGNED select GENERIC_CSUM select CPU_NO_EFFICIENT_FFS select HAVE_ARCH_HASH + select HAVE_PAGE_SIZE_4KB + select LEGACY_TIMER_TICK help The Freescale (was Motorola) 68000 CPU is the first generation of the well known M68K family of processors. The CPU core as well as @@ -51,18 +66,8 @@ config M68000 System-On-Chip devices (eg 68328, 68302, etc). It does not contain a paging MMU. -config MCPU32 - bool - select CPU_HAS_NO_BITFIELDS - select CPU_HAS_NO_UNALIGNED - select CPU_NO_EFFICIENT_FFS - help - The Freescale (was then Motorola) CPU32 is a CPU core that is - based on the 68020 processor. For the most part it is used in - System-On-Chip parts, and does not contain a paging MMU. - config M68020 - bool "68020 support" + bool "68020 support" if M68KCLASSIC depends on MMU select FPU select CPU_HAS_ADDRESS_SPACES @@ -72,9 +77,10 @@ config M68020 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the Sun 3, which provides its own version. +if M68KCLASSIC && MMU + config M68030 bool "68030 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help @@ -84,7 +90,6 @@ config M68030 config M68040 bool "68040 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help @@ -95,17 +100,17 @@ config M68040 config M68060 bool "68060 support" - depends on MMU && !MMU_SUN3 select FPU select CPU_HAS_ADDRESS_SPACES help If you anticipate running this kernel on a computer with a MC68060 processor, say Y. Otherwise, say N. +endif # M68KCLASSIC + config M68328 bool depends on !MMU - select LEGACY_TIMER_TICK select M68000 help Motorola 68328 processor support. @@ -113,7 +118,6 @@ config M68328 config M68EZ328 bool depends on !MMU - select LEGACY_TIMER_TICK select M68000 help Motorola 68EX328 processor support. @@ -121,13 +125,10 @@ config M68EZ328 config M68VZ328 bool depends on !MMU - select LEGACY_TIMER_TICK select M68000 help Motorola 68VZ328 processor support. -endif # M68KCLASSIC - if COLDFIRE choice @@ -163,7 +164,7 @@ config M520x select COLDFIRE_PIT_TIMER select HAVE_CACHE_SPLIT help - Freescale Coldfire 5207/5208 processor support. + Freescale Coldfire 5207/5208 processor support. config M523x bool "MCF523x" @@ -330,12 +331,11 @@ config COLDFIRE_SLTIMERS endif # COLDFIRE - comment "Processor Specific Options" config M68KFPU_EMU bool "Math emulation support" - depends on MMU + depends on (M68KCLASSIC || SUN3) && FPU help At some point in the future, this will cause floating-point math instructions to be emulated by the kernel on machines that lack a @@ -383,7 +383,7 @@ config ADVANCED config RMW_INSNS bool "Use read-modify-write instructions" - depends on ADVANCED + depends on ADVANCED && !CPU_HAS_NO_CAS help This allows to use certain instructions that work with indivisible read-modify-write bus cycles. While this is faster than the @@ -408,24 +408,23 @@ config SINGLE_MEMORY_CHUNK order" to save memory that could be wasted for unused memory map. Say N if not sure. -config FORCE_MAX_ZONEORDER - int "Maximum zone order" if ADVANCED +config ARCH_FORCE_MAX_ORDER + int "Order of maximal physically contiguous allocations" if ADVANCED depends on !SINGLE_MEMORY_CHUNK - default "11" + default "10" help - The kernel memory allocator divides physically contiguous memory - blocks into "zones", where each zone is a power of two number of - pages. This option selects the largest power of two that the kernel - keeps in the memory allocator. If you need to allocate very large - blocks of physically contiguous memory, then you may need to - increase this value. + The kernel page allocator limits the size of maximal physically + contiguous allocations. The limit is called MAX_PAGE_ORDER and it + defines the maximal power of two of number of pages that can be + allocated as a single contiguous block. This option allows + overriding the default setting when ability to allocate very + large blocks of physically contiguous memory is required. For systems that have holes in their physical address space this value also defines the minimal size of the hole that allows freeing unused memory map. - This config option is actually maximum order plus one. For example, - a value of 11 means that the largest free memory block is 2^10 pages. + Don't change if unsure. config 060_WRITETHROUGH bool "Use write-through caching for 68060 supervisor accesses" @@ -450,6 +449,9 @@ config M68K_L2_CACHE config CPU_HAS_NO_BITFIELDS bool +config CPU_HAS_NO_CAS + bool + config CPU_HAS_NO_MULDIV64 bool @@ -458,6 +460,7 @@ config CPU_HAS_NO_UNALIGNED config CPU_HAS_ADDRESS_SPACES bool + select ALTERNATE_USER_ADDRESS_SPACE config FPU bool @@ -526,7 +529,7 @@ config CACHE_BOTH Split the ColdFire CPU cache, and use half as an instruction cache and half as a data cache. endchoice -endif +endif # HAVE_CACHE_SPLIT if HAVE_CACHE_CB choice @@ -543,4 +546,16 @@ config CACHE_COPYBACK help The ColdFire CPU cache is set into Copy-back mode. endchoice -endif +endif # HAVE_CACHE_CB + +# Coldfire cores that do not have a data cache configured can do coherent DMA. +config COLDFIRE_COHERENT_DMA + bool + default y + depends on COLDFIRE + depends on !HAVE_CACHE_CB && !CACHE_D && !CACHE_BOTH + +config M68K_NONCOHERENT_DMA + bool + default y + depends on HAS_DMA && !COLDFIRE_COHERENT_DMA |