diff options
Diffstat (limited to 'arch/m68k/mac/via.c')
| -rw-r--r-- | arch/m68k/mac/via.c | 207 |
1 files changed, 129 insertions, 78 deletions
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c index acdabbeecfd2..9cb813eda4fd 100644 --- a/arch/m68k/mac/via.c +++ b/arch/m68k/mac/via.c @@ -23,6 +23,7 @@ * */ +#include <linux/clocksource.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/mm.h> @@ -37,6 +38,8 @@ #include <asm/mac_psc.h> #include <asm/mac_oss.h> +#include "mac.h" + volatile __u8 *via1, *via2; int rbv_present; int via_alt_mapping; @@ -55,16 +58,6 @@ static __u8 rbv_clear; static int gIER,gIFR,gBufA,gBufB; /* - * Timer defs. - */ - -#define TICK_SIZE 10000 -#define MAC_CLOCK_TICK (783300/HZ) /* ticks per HZ */ -#define MAC_CLOCK_LOW (MAC_CLOCK_TICK&0xFF) -#define MAC_CLOCK_HIGH (MAC_CLOCK_TICK>>8) - - -/* * On Macs with a genuine VIA chip there is no way to mask an individual slot * interrupt. This limitation also seems to apply to VIA clone logic cores in * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.) @@ -178,8 +171,6 @@ void __init via_init(void) via1[vIER] = 0x7F; via1[vIFR] = 0x7F; - via1[vT1LL] = 0; - via1[vT1LH] = 0; via1[vT1CL] = 0; via1[vT1CH] = 0; via1[vT2CL] = 0; @@ -189,7 +180,6 @@ void __init via_init(void) /* * SE/30: disable video IRQ - * XXX: testing for SE/30 VBL */ if (macintosh_config->ident == MAC_MODEL_SE30) { @@ -197,13 +187,18 @@ void __init via_init(void) via1[vBufB] |= 0x40; } - /* - * Set the RTC bits to a known state: all lines to outputs and - * RTC disabled (yes that's 0 to enable and 1 to disable). - */ - - via1[vDirB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData); - via1[vBufB] |= (VIA1B_vRTCEnb | VIA1B_vRTCClk); + switch (macintosh_config->adb_type) { + case MAC_ADB_IOP: + case MAC_ADB_II: + case MAC_ADB_PB1: + /* + * Set the RTC bits to a known state: all lines to outputs and + * RTC disabled (yes that's 0 to enable and 1 to disable). + */ + via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData; + via1[vBufB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk; + break; + } /* Everything below this point is VIA2/RBV only... */ @@ -230,8 +225,6 @@ void __init via_init(void) via2[gIER] = 0x7F; via2[gIFR] = 0x7F | rbv_clear; if (!rbv_present) { - via2[vT1LL] = 0; - via2[vT1LH] = 0; via2[vT1CL] = 0; via2[vT1CH] = 0; via2[vT2CL] = 0; @@ -268,22 +261,6 @@ void __init via_init(void) } /* - * Start the 100 Hz clock - */ - -void __init via_init_clock(irq_handler_t func) -{ - via1[vACR] |= 0x40; - via1[vT1LL] = MAC_CLOCK_LOW; - via1[vT1LH] = MAC_CLOCK_HIGH; - via1[vT1CL] = MAC_CLOCK_LOW; - via1[vT1CH] = MAC_CLOCK_HIGH; - - if (request_irq(IRQ_MAC_TIMER_1, func, 0, "timer", func)) - pr_err("Couldn't register %s interrupt\n", "timer"); -} - -/* * Debugging dump, used in various places to see what's going on. */ @@ -311,52 +288,18 @@ void via_debug_dump(void) } /* - * This is always executed with interrupts disabled. - * - * TBI: get time offset between scheduling timer ticks - */ - -u32 mac_gettimeoffset(void) -{ - unsigned long ticks, offset = 0; - - /* read VIA1 timer 2 current value */ - ticks = via1[vT1CL] | (via1[vT1CH] << 8); - /* The probability of underflow is less than 2% */ - if (ticks > MAC_CLOCK_TICK - MAC_CLOCK_TICK / 50) - /* Check for pending timer interrupt in VIA1 IFR */ - if (via1[vIFR] & 0x40) offset = TICK_SIZE; - - ticks = MAC_CLOCK_TICK - ticks; - ticks = ticks * 10000L / MAC_CLOCK_TICK; - - return (ticks + offset) * 1000; -} - -/* * Flush the L2 cache on Macs that have it by flipping * the system into 24-bit mode for an instant. */ -void via_flush_cache(void) +void via_l2_flush(int writeback) { + unsigned long flags; + + local_irq_save(flags); via2[gBufB] &= ~VIA2B_vMode32; via2[gBufB] |= VIA2B_vMode32; -} - -/* - * Return the status of the L2 cache on a IIci - */ - -int via_get_cache_disable(void) -{ - /* Safeguard against being called accidentally */ - if (!via2) { - printk(KERN_ERR "via_get_cache_disable called on a non-VIA machine!\n"); - return 1; - } - - return (int) via2[gBufB] & VIA2B_vCDis; + local_irq_restore(flags); } /* @@ -410,7 +353,7 @@ void via_nubus_irq_startup(int irq) /* Allow NuBus slots 9 through F. */ via2[vDirA] &= 0x80 | ~(1 << irq_idx); } - /* fall through */ + fallthrough; case MAC_VIA_IICI: via_irq_enable(irq); break; @@ -436,6 +379,8 @@ void via_nubus_irq_shutdown(int irq) * via6522.c :-), disable/pending masks added. */ +#define VIA_TIMER_1_INT BIT(6) + void via1_irq(struct irq_desc *desc) { int irq_num; @@ -445,6 +390,21 @@ void via1_irq(struct irq_desc *desc) if (!events) return; + irq_num = IRQ_MAC_TIMER_1; + irq_bit = VIA_TIMER_1_INT; + if (events & irq_bit) { + unsigned long flags; + + local_irq_save(flags); + via1[vIFR] = irq_bit; + generic_handle_irq(irq_num); + local_irq_restore(flags); + + events &= ~irq_bit; + if (!events) + return; + } + irq_num = VIA1_SOURCE_BASE; irq_bit = 1; do { @@ -601,3 +561,94 @@ int via2_scsi_drq_pending(void) return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ)); } EXPORT_SYMBOL(via2_scsi_drq_pending); + +/* timer and clock source */ + +#define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */ +#define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */ + +#define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */ +#define VIA_TC_LOW (VIA_TC & 0xFF) +#define VIA_TC_HIGH (VIA_TC >> 8) + +static u64 mac_read_clk(struct clocksource *cs); + +static struct clocksource mac_clk = { + .name = "via1", + .rating = 250, + .read = mac_read_clk, + .mask = CLOCKSOURCE_MASK(32), + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +static u32 clk_total, clk_offset; + +static irqreturn_t via_timer_handler(int irq, void *dev_id) +{ + clk_total += VIA_TIMER_CYCLES; + clk_offset = 0; + legacy_timer_tick(1); + + return IRQ_HANDLED; +} + +void __init via_init_clock(void) +{ + if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer", + NULL)) { + pr_err("Couldn't register %s interrupt\n", "timer"); + return; + } + + via1[vT1CL] = VIA_TC_LOW; + via1[vT1CH] = VIA_TC_HIGH; + via1[vACR] |= 0x40; + + clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ); +} + +static u64 mac_read_clk(struct clocksource *cs) +{ + unsigned long flags; + u8 count_high; + u16 count; + u32 ticks; + + /* + * Timer counter wrap-around is detected with the timer interrupt flag + * but reading the counter low byte (vT1CL) would reset the flag. + * Also, accessing both counter registers is essentially a data race. + * These problems are avoided by ignoring the low byte. Clock accuracy + * is 256 times worse (error can reach 0.327 ms) but CPU overhead is + * reduced by avoiding slow VIA register accesses. + * + * The VIA timer counter observably decrements to 0xFFFF before the + * counter reload interrupt gets raised. That complicates things a bit. + * + * State | vT1CH | VIA_TIMER_1_INT | inference drawn + * ------+------------+-----------------+----------------------------- + * i | FE thru 00 | false | counter is decrementing + * ii | FF | false | counter wrapped + * iii | FF | true | wrapped, interrupt raised + * iv | FF | false | wrapped, interrupt handled + * v | FE thru 00 | true | wrapped, interrupt unhandled + * + * State iv is never observed because handling the interrupt involves + * a 6522 register access and every access consumes a "phi 2" clock + * cycle. So 0xFF implies either state ii or state iii, depending on + * the value of the VIA_TIMER_1_INT bit. + */ + + local_irq_save(flags); + count_high = via1[vT1CH]; + if (count_high == 0xFF) + count_high = 0; + if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT)) + clk_offset = VIA_TIMER_CYCLES; + count = count_high << 8; + ticks = VIA_TIMER_CYCLES - count; + ticks += clk_offset + clk_total; + local_irq_restore(flags); + + return ticks; +} |