diff options
Diffstat (limited to 'arch/microblaze/kernel/hw_exception_handler.S')
| -rw-r--r-- | arch/microblaze/kernel/hw_exception_handler.S | 190 |
1 files changed, 42 insertions, 148 deletions
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index 61b3a1fed46f..07ea23965f81 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Exception handling for Microblaze * @@ -30,10 +31,6 @@ * * Original code * Copyright (C) 2004 Xilinx, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. */ /* @@ -71,9 +68,9 @@ #include <asm/entry.h> #include <asm/current.h> #include <linux/linkage.h> +#include <linux/pgtable.h> #include <asm/mmu.h> -#include <asm/pgtable.h> #include <asm/signal.h> #include <asm/registers.h> #include <asm/asm-offsets.h> @@ -83,7 +80,6 @@ /* Helpful Macros */ #define NUM_TO_REG(num) r ## num -#ifdef CONFIG_MMU #define RESTORE_STATE \ lwi r5, r1, 0; \ mts rmsr, r5; \ @@ -95,7 +91,6 @@ lwi r11, r1, PT_R11; \ lwi r31, r1, PT_R31; \ lwi r1, r1, PT_R1; -#endif /* CONFIG_MMU */ #define LWREG_NOP \ bri ex_handler_unhandled; \ @@ -105,10 +100,6 @@ bri ex_handler_unhandled; \ nop; -/* FIXME this is weird - for noMMU kernel is not possible to use brid - * instruction which can shorten executed time - */ - /* r3 is the source */ #define R3_TO_LWREG_V(regnum) \ swi r3, r1, 4 * regnum; \ @@ -129,7 +120,6 @@ or r3, r0, NUM_TO_REG (regnum); \ bri ex_sw_tail; -#ifdef CONFIG_MMU #define R3_TO_LWREG_VM_V(regnum) \ brid ex_lw_end_vm; \ swi r3, r7, 4 * regnum; @@ -147,15 +137,14 @@ or r3, r0, NUM_TO_REG (regnum); /* Shift right instruction depending on available configuration */ - #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0 - #define BSRLI(rD, rA, imm) \ - bsrli rD, rA, imm - #else - #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA) + #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL == 0 /* Only the used shift constants defined here - add more if needed */ #define BSRLI2(rD, rA) \ srl rD, rA; /* << 1 */ \ srl rD, rD; /* << 2 */ + #define BSRLI4(rD, rA) \ + BSRLI2(rD, rA); \ + BSRLI2(rD, rD) #define BSRLI10(rD, rA) \ srl rD, rA; /* << 1 */ \ srl rD, rD; /* << 2 */ \ @@ -170,8 +159,33 @@ #define BSRLI20(rD, rA) \ BSRLI10(rD, rA); \ BSRLI10(rD, rD) + + .macro bsrli, rD, rA, IMM + .if (\IMM) == 2 + BSRLI2(\rD, \rA) + .elseif (\IMM) == 10 + BSRLI10(\rD, \rA) + .elseif (\IMM) == 12 + BSRLI2(\rD, \rA) + BSRLI10(\rD, \rD) + .elseif (\IMM) == 14 + BSRLI4(\rD, \rA) + BSRLI10(\rD, \rD) + .elseif (\IMM) == 20 + BSRLI20(\rD, \rA) + .elseif (\IMM) == 24 + BSRLI4(\rD, \rA) + BSRLI20(\rD, \rD) + .elseif (\IMM) == 28 + BSRLI4(\rD, \rA) + BSRLI4(\rD, \rD) + BSRLI20(\rD, \rD) + .else + .error "BSRLI shift macros \IMM" + .endif + .endm #endif -#endif /* CONFIG_MMU */ + .extern other_exception_handler /* Defined in exception.c */ @@ -193,8 +207,8 @@ * - W S REG EXC * * - * STACK FRAME STRUCTURE (for NO_MMU) - * --------------------------------- + * STACK FRAME STRUCTURE (for CONFIG_MMU=n) + * ---------------------------------------- * * +-------------+ + 0 * | MSR | @@ -229,7 +243,6 @@ */ /* wrappers to restore state before coming to entry.S */ -#ifdef CONFIG_MMU .section .data .align 4 pt_pool_space: @@ -294,31 +307,24 @@ _MB_HW_ExceptionVectorTable: .long TOPHYS(ex_handler_unhandled) .long TOPHYS(ex_handler_unhandled) .long TOPHYS(ex_handler_unhandled) -#endif .global _hw_exception_handler .section .text .align 4 .ent _hw_exception_handler _hw_exception_handler: -#ifndef CONFIG_MMU - addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */ -#else swi r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */ /* Save date to kernel memory. Here is the problem * when you came from user space */ ori r1, r0, TOPHYS(pt_pool_space); -#endif swi r3, r1, PT_R3 swi r4, r1, PT_R4 swi r5, r1, PT_R5 swi r6, r1, PT_R6 -#ifdef CONFIG_MMU swi r11, r1, PT_R11 swi r31, r1, PT_R31 lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */ -#endif mfs r5, rmsr; nop @@ -328,18 +334,8 @@ _hw_exception_handler: mfs r3, rear; nop -#ifndef CONFIG_MMU - andi r5, r4, 0x1000; /* Check ESR[DS] */ - beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */ - mfs r17, rbtr; /* ESR[DS] set - return address in BTR */ - nop -not_in_delay_slot: - swi r17, r1, PT_R17 -#endif - andi r5, r4, 0x1F; /* Extract ESR[EXC] */ -#ifdef CONFIG_MMU /* Calculate exception vector offset = r5 << 2 */ addk r6, r5, r5; /* << 1 */ addk r6, r6, r6; /* << 2 */ @@ -361,73 +357,6 @@ not_in_delay_slot: full_exception_trapw: RESTORE_STATE bri full_exception_trap -#else - /* Exceptions enabled here. This will allow nested exceptions */ - mfs r6, rmsr; - nop - swi r6, r1, 0; /* RMSR_OFFSET */ - ori r6, r6, 0x100; /* Turn ON the EE bit */ - andi r6, r6, ~2; /* Disable interrupts */ - mts rmsr, r6; - nop - - xori r6, r5, 1; /* 00001 = Unaligned Exception */ - /* Jump to unalignment exception handler */ - beqi r6, handle_unaligned_ex; - -handle_other_ex: /* Handle Other exceptions here */ - /* Save other volatiles before we make procedure calls below */ - swi r7, r1, PT_R7 - swi r8, r1, PT_R8 - swi r9, r1, PT_R9 - swi r10, r1, PT_R10 - swi r11, r1, PT_R11 - swi r12, r1, PT_R12 - swi r14, r1, PT_R14 - swi r15, r1, PT_R15 - swi r18, r1, PT_R18 - - or r5, r1, r0 - andi r6, r4, 0x1F; /* Load ESR[EC] */ - lwi r7, r0, PER_CPU(KM) /* MS: saving current kernel mode to regs */ - swi r7, r1, PT_MODE - mfs r7, rfsr - nop - addk r8, r17, r0; /* Load exception address */ - bralid r15, full_exception; /* Branch to the handler */ - nop; - mts rfsr, r0; /* Clear sticky fsr */ - nop - - /* - * Trigger execution of the signal handler by enabling - * interrupts and calling an invalid syscall. - */ - mfs r5, rmsr; - nop - ori r5, r5, 2; - mts rmsr, r5; /* enable interrupt */ - nop - addi r12, r0, __NR_syscalls; - brki r14, 0x08; - mfs r5, rmsr; /* disable interrupt */ - nop - andi r5, r5, ~2; - mts rmsr, r5; - nop - - lwi r7, r1, PT_R7 - lwi r8, r1, PT_R8 - lwi r9, r1, PT_R9 - lwi r10, r1, PT_R10 - lwi r11, r1, PT_R11 - lwi r12, r1, PT_R12 - lwi r14, r1, PT_R14 - lwi r15, r1, PT_R15 - lwi r18, r1, PT_R18 - - bri ex_handler_done; /* Complete exception handling */ -#endif /* 0x01 - Unaligned data access exception * This occurs when a word access is not aligned on a word boundary, @@ -441,7 +370,6 @@ handle_unaligned_ex: * R4 = ESR * R3 = EAR */ -#ifdef CONFIG_MMU andi r6, r4, 0x1000 /* Check ESR[DS] */ beqi r6, _no_delayslot /* Branch if ESR[DS] not set */ mfs r17, rbtr; /* ESR[DS] set - return address in BTR */ @@ -450,7 +378,7 @@ _no_delayslot: /* jump to high level unaligned handler */ RESTORE_STATE; bri unaligned_data_trap -#endif + andi r6, r4, 0x3E0; /* Mask and extract the register operand */ srl r6, r6; /* r6 >> 5 */ srl r6, r6; @@ -536,25 +464,10 @@ ex_shw: ex_sw_end: /* Exception handling of store word, ends. */ ex_handler_done: -#ifndef CONFIG_MMU - lwi r5, r1, 0 /* RMSR */ - mts rmsr, r5 - nop - lwi r3, r1, PT_R3 - lwi r4, r1, PT_R4 - lwi r5, r1, PT_R5 - lwi r6, r1, PT_R6 - lwi r17, r1, PT_R17 - - rted r17, 0 - addik r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */ -#else RESTORE_STATE; rted r17, 0 nop -#endif -#ifdef CONFIG_MMU /* Exception vector entry code. This code runs with address translation * turned off (i.e. using physical addresses). */ @@ -604,7 +517,7 @@ ex_handler_done: ex4: tophys(r4,r4) /* Create L1 (pgdir/pmd) address */ - BSRLI(r5,r3, PGDIR_SHIFT - 2) + bsrli r5, r3, PGDIR_SHIFT - 2 andi r5, r5, PAGE_SIZE - 4 /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ or r4, r4, r5 @@ -613,7 +526,7 @@ ex_handler_done: beqi r5, ex2 /* Bail if no table */ tophys(r5,r5) - BSRLI(r6,r3,PTE_SHIFT) /* Compute PTE address */ + bsrli r6, r3, PTE_SHIFT /* Compute PTE address */ andi r6, r6, PAGE_SIZE - 4 or r5, r5, r6 lwi r4, r5, 0 /* Get Linux PTE */ @@ -705,7 +618,7 @@ ex_handler_done: ex6: tophys(r4,r4) /* Create L1 (pgdir/pmd) address */ - BSRLI(r5,r3, PGDIR_SHIFT - 2) + bsrli r5, r3, PGDIR_SHIFT - 2 andi r5, r5, PAGE_SIZE - 4 /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ or r4, r4, r5 @@ -714,7 +627,7 @@ ex_handler_done: beqi r5, ex7 /* Bail if no table */ tophys(r5,r5) - BSRLI(r6,r3,PTE_SHIFT) /* Compute PTE address */ + bsrli r6, r3, PTE_SHIFT /* Compute PTE address */ andi r6, r6, PAGE_SIZE - 4 or r5, r5, r6 lwi r4, r5, 0 /* Get Linux PTE */ @@ -776,7 +689,7 @@ ex_handler_done: ex9: tophys(r4,r4) /* Create L1 (pgdir/pmd) address */ - BSRLI(r5,r3, PGDIR_SHIFT - 2) + bsrli r5, r3, PGDIR_SHIFT - 2 andi r5, r5, PAGE_SIZE - 4 /* Assume pgdir aligned on 4K boundary, no need for "andi r4,r4,0xfffff003" */ or r4, r4, r5 @@ -785,7 +698,7 @@ ex_handler_done: beqi r5, ex10 /* Bail if no table */ tophys(r5,r5) - BSRLI(r6,r3,PTE_SHIFT) /* Compute PTE address */ + bsrli r6, r3, PTE_SHIFT /* Compute PTE address */ andi r6, r6, PAGE_SIZE - 4 or r5, r5, r6 lwi r4, r5, 0 /* Get Linux PTE */ @@ -860,13 +773,7 @@ ex_handler_done: * bits 20 and 21 are zero. */ andi r3, r3, PAGE_MASK -#ifdef CONFIG_MICROBLAZE_64K_PAGES - ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_64K) -#elif CONFIG_MICROBLAZE_16K_PAGES - ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_16K) -#else ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_4K) -#endif mts rtlbhi, r3 /* Load TLB HI */ nop @@ -904,10 +811,8 @@ ex_handler_done: rtsd r15,8 nop -#endif .end _hw_exception_handler -#ifdef CONFIG_MMU /* Unaligned data access exception last on a 4k page for MMU. * When this is called, we are in virtual mode with exceptions enabled * and registers 1-13,15,17,18 saved. @@ -922,7 +827,7 @@ ex_handler_done: .ent _unaligned_data_exception _unaligned_data_exception: andi r8, r3, 0x3E0; /* Mask and extract the register operand */ - BSRLI(r8,r8,2); /* r8 >> 2 = register operand * 8 */ + bsrli r8, r8, 2; /* r8 >> 2 = register operand * 8 */ andi r6, r3, 0x400; /* Extract ESR[S] */ bneid r6, ex_sw_vm; andi r6, r3, 0x800; /* Extract ESR[W] - delay slot */ @@ -1022,7 +927,6 @@ ex_unaligned_fixup: .word store6,ex_unaligned_fixup; .previous; .end _unaligned_data_exception -#endif /* CONFIG_MMU */ .global ex_handler_unhandled ex_handler_unhandled: @@ -1071,11 +975,7 @@ lw_r27: R3_TO_LWREG (27); lw_r28: R3_TO_LWREG (28); lw_r29: R3_TO_LWREG (29); lw_r30: R3_TO_LWREG (30); -#ifdef CONFIG_MMU lw_r31: R3_TO_LWREG_V (31); -#else -lw_r31: R3_TO_LWREG (31); -#endif sw_table: sw_r0: SWREG_TO_R3 (0); @@ -1109,13 +1009,8 @@ sw_r27: SWREG_TO_R3 (27); sw_r28: SWREG_TO_R3 (28); sw_r29: SWREG_TO_R3 (29); sw_r30: SWREG_TO_R3 (30); -#ifdef CONFIG_MMU sw_r31: SWREG_TO_R3_V (31); -#else -sw_r31: SWREG_TO_R3 (31); -#endif -#ifdef CONFIG_MMU lw_table_vm: lw_r0_vm: R3_TO_LWREG_VM (0); lw_r1_vm: R3_TO_LWREG_VM_V (1); @@ -1183,7 +1078,6 @@ sw_r28_vm: SWREG_TO_R3_VM_V (28); sw_r29_vm: SWREG_TO_R3_VM_V (29); sw_r30_vm: SWREG_TO_R3_VM_V (30); sw_r31_vm: SWREG_TO_R3_VM_V (31); -#endif /* CONFIG_MMU */ /* Temporary data structures used in the handler */ .section .data |