diff options
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 1106 |
1 files changed, 481 insertions, 625 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6fee1a133e9d..b88b97139fa8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,28 +4,40 @@ config MIPS default y select ARCH_32BIT_OFF_T if !64BIT select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT + select ARCH_HAS_CPU_CACHE_ALIASING + select ARCH_HAS_CPU_FINALIZE_INIT + select ARCH_HAS_CURRENT_STACK_POINTER + select ARCH_HAS_DEBUG_VIRTUAL if !64BIT + select ARCH_HAS_DMA_OPS if MACH_JAZZ select ARCH_HAS_FORTIFY_SOURCE select ARCH_HAS_KCOV + select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) + select ARCH_HAS_STRNCPY_FROM_USER + select ARCH_HAS_STRNLEN_USER select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST - select ARCH_HAS_UBSAN_SANITIZE_ALL - select ARCH_SUPPORTS_UPROBES + select ARCH_HAS_UBSAN + select ARCH_HAS_GCOV_PROFILE_ALL + select ARCH_KEEP_MEMBLOCK select ARCH_USE_BUILTIN_BSWAP select ARCH_USE_CMPXCHG_LOCKREF if 64BIT + select ARCH_USE_MEMTEST select ARCH_USE_QUEUED_RWLOCKS select ARCH_USE_QUEUED_SPINLOCKS + select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU select ARCH_WANT_IPC_PARSE_VERSION + select ARCH_WANT_LD_ORPHAN_WARN select BUILDTIME_TABLE_SORT + select BUILTIN_DTB_ALL if BUILTIN_DTB select CLONE_BACKWARDS select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) - select CPU_PM if CPU_IDLE + select CPU_PM if CPU_IDLE || SUSPEND select GENERIC_ATOMIC64 if !64BIT - select GENERIC_CLOCKEVENTS + select GENERIC_BUILTIN_DTB if BUILTIN_DTB select GENERIC_CMOS_UPDATE select GENERIC_CPU_AUTOPROBE select GENERIC_GETTIMEOFDAY - select GENERIC_IOMAP select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select GENERIC_ISA_DMA if EISA @@ -34,38 +46,36 @@ config MIPS select GENERIC_LIB_CMPDI2 select GENERIC_LIB_LSHRDI3 select GENERIC_LIB_UCMPDI2 + select GENERIC_PCI_IOMAP select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC select GENERIC_SMP_IDLE_THREAD + select GENERIC_IDLE_POLL_SETUP select GENERIC_TIME_VSYSCALL - select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT - select HANDLE_DOMAIN_IRQ + select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT + select HAS_IOPORT if !NO_IOPORT_MAP || ISA select HAVE_ARCH_COMPILER_H select HAVE_ARCH_JUMP_LABEL - select HAVE_ARCH_KGDB + select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT select HAVE_ARCH_MMAP_RND_BITS if MMU select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT select HAVE_ARCH_SECCOMP_FILTER select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES select HAVE_ASM_MODVERSIONS - select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS - select HAVE_CONTEXT_TRACKING + select HAVE_CONTEXT_TRACKING_USER select HAVE_TIF_NOHZ - select HAVE_COPY_THREAD_TLS select HAVE_C_RECORDMCOUNT select HAVE_DEBUG_KMEMLEAK select HAVE_DEBUG_STACKOVERFLOW select HAVE_DMA_CONTIGUOUS select HAVE_DYNAMIC_FTRACE - select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2 + select HAVE_EBPF_JIT if !CPU_MICROMIPS select HAVE_EXIT_THREAD - select HAVE_FAST_GUP - select HAVE_FTRACE_MCOUNT_RECORD + select HAVE_GUP_FAST select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_TRACER select HAVE_GCC_PLUGINS select HAVE_GENERIC_VDSO - select HAVE_IDE select HAVE_IOREMAP_PROT select HAVE_IRQ_EXIT_ON_IRQ_STACK select HAVE_IRQ_TIME_ACCOUNTING @@ -74,8 +84,12 @@ config MIPS select HAVE_LD_DEAD_CODE_DATA_ELIMINATION select HAVE_MOD_ARCH_SPECIFIC select HAVE_NMI - select HAVE_OPROFILE + select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64 + select HAVE_PAGE_SIZE_16KB if !CPU_R3000 + select HAVE_PAGE_SIZE_64KB if !CPU_R3000 select HAVE_PERF_EVENTS + select HAVE_PERF_REGS + select HAVE_PERF_USER_STACK_DUMP select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ select HAVE_SPARSE_SYSCALL_NR @@ -84,24 +98,51 @@ config MIPS select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP select IRQ_FORCED_THREADING select ISA if EISA + select LOCK_MM_AND_FIND_VMA select MODULES_USE_ELF_REL if MODULES select MODULES_USE_ELF_RELA if MODULES && 64BIT select PERF_USE_VMALLOC + select PCI_MSI_ARCH_FALLBACKS if PCI_MSI select RTC_LIB select SYSCTL_EXCEPTION_TRACE - select VIRT_TO_BUS + select TRACE_IRQFLAGS_SUPPORT + select ARCH_HAS_ELFCORE_COMPAT + select HAVE_ARCH_KCSAN if 64BIT config MIPS_FIXUP_BIGPHYS_ADDR bool +config MIPS_GENERIC + bool + +config MACH_GENERIC_CORE + bool + +config MACH_INGENIC + bool + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_ZBOOT + select DMA_NONCOHERENT + select IRQ_MIPS_CPU + select PINCTRL + select GPIOLIB + select COMMON_CLK + select GENERIC_IRQ_CHIP + select BUILTIN_DTB if MIPS_NO_APPENDED_DTB + select USE_OF + select CPU_SUPPORTS_CPUFREQ + select MIPS_EXTERNAL_TIMER + menu "Machine selection" choice prompt "System type" - default MIPS_GENERIC + default MIPS_GENERIC_KERNEL -config MIPS_GENERIC +config MIPS_GENERIC_KERNEL bool "Generic board-agnostic MIPS kernel" + select MIPS_GENERIC select BOOT_RAW select BUILTIN_DTB select CEVT_R4K @@ -110,9 +151,10 @@ config MIPS_GENERIC select CPU_MIPSR2_IRQ_EI select CPU_MIPSR2_IRQ_VI select CSRC_R4K - select DMA_PERDEV_COHERENT + select DMA_NONCOHERENT select HAVE_PCI select IRQ_MIPS_CPU + select MACH_GENERIC_CORE select MIPS_AUTO_PFN_OFFSET select MIPS_CPU_SCACHE select MIPS_GIC @@ -123,9 +165,11 @@ config MIPS_GENERIC select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_CPU_MIPS32_R5 select SYS_HAS_CPU_MIPS32_R6 select SYS_HAS_CPU_MIPS64_R1 select SYS_HAS_CPU_MIPS64_R2 + select SYS_HAS_CPU_MIPS64_R5 select SYS_HAS_CPU_MIPS64_R6 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL @@ -138,6 +182,7 @@ config MIPS_GENERIC select SYS_SUPPORTS_MULTITHREADING select SYS_SUPPORTS_RELOCATABLE select SYS_SUPPORTS_SMARTMIPS + select SYS_SUPPORTS_ZBOOT select UHI_BOOT select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN @@ -158,7 +203,7 @@ config MIPS_ALCHEMY select CEVT_R4K select CSRC_R4K select IRQ_MIPS_CPU - select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is + select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is select MIPS_FIXUP_BIGPHYS_ADDR if PCI select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL @@ -167,28 +212,6 @@ config MIPS_ALCHEMY select SYS_SUPPORTS_ZBOOT select COMMON_CLK -config AR7 - bool "Texas Instruments AR7" - select BOOT_ELF32 - select DMA_NONCOHERENT - select CEVT_R4K - select CSRC_R4K - select IRQ_MIPS_CPU - select NO_EXCEPT_FILL - select SWAP_IO_SPACE - select SYS_HAS_CPU_MIPS32_R1 - select SYS_HAS_EARLY_PRINTK - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART16550 - select GPIOLIB - select VLYNQ - select HAVE_LEGACY_CLK - help - Support for the Texas Instruments AR7 System-on-a-Chip - family: TNETD7100, 7200 and 7300. - config ATH25 bool "Atheros AR231x/AR531x SoC support" select CEVT_R4K @@ -227,8 +250,8 @@ config ATH79 config BMIPS_GENERIC bool "Broadcom Generic BMIPS kernel" + select ARCH_HAS_RESET_CONTROLLER select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL - select ARCH_HAS_PHYS_TO_DMA select BOOT_RAW select NO_EXCEPT_FILL select USE_OF @@ -256,6 +279,9 @@ config BMIPS_GENERIC select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select HARDIRQS_SW_RESEND + select HAVE_PCI + select PCI_DRIVERS_GENERIC + select FW_CFE help Build a generic DT-based kernel image that boots on select BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top @@ -297,10 +323,12 @@ config BCM63XX select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_HAS_EARLY_PRINTK + select SYS_HAS_CPU_BMIPS32_3300 + select SYS_HAS_CPU_BMIPS4350 + select SYS_HAS_CPU_BMIPS4380 select SWAP_IO_SPACE select GPIOLIB select MIPS_L1_CACHE_SHIFT_4 - select CLKDEV_LOOKUP select HAVE_LEGACY_CLK help Support for BCM63XX based boards @@ -361,6 +389,31 @@ config MACH_DECSTATION otherwise choose R3000. +config ECONET + bool "EcoNet MIPS family" + select BOOT_RAW + select CPU_BIG_ENDIAN + select DEBUG_ZBOOT if DEBUG_KERNEL + select EARLY_PRINTK_8250 + select ECONET_EN751221_TIMER + select SERIAL_8250 + select SERIAL_OF_PLATFORM + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART16550 + select USE_GENERIC_EARLY_PRINTK_8250 + select USE_OF + help + EcoNet EN75xx MIPS devices are big endian MIPS machines used + in XPON (fiber) and DSL applications. They have SPI, PCI, USB, + GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores. + Don't confuse these with the Airoha ARM devices sometimes referred + to as "EcoNet", this family is for MIPS based devices only. + config MACH_JAZZ bool "Jazz family of machines" select ARC_MEMORY @@ -383,26 +436,21 @@ config MACH_JAZZ select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_100HZ + select SYS_SUPPORTS_LITTLE_ENDIAN help This a family of machines based on the MIPS R4030 chipset which was used by several vendors to build RISC/os and Windows NT workstations. Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and Olivetti M700-10 workstations. -config MACH_INGENIC +config MACH_INGENIC_SOC bool "Ingenic SoC based machines" - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN + select MIPS_GENERIC + select MACH_INGENIC + select MACH_GENERIC_CORE select SYS_SUPPORTS_ZBOOT_UART16550 - select CPU_SUPPORTS_HUGEPAGES - select DMA_NONCOHERENT - select IRQ_MIPS_CPU - select PINCTRL - select GPIOLIB - select COMMON_CLK - select GENERIC_IRQ_CHIP - select BUILTIN_DTB if MIPS_NO_APPENDED_DTB - select USE_OF + select CPU_SUPPORTS_CPUFREQ + select MIPS_EXTERNAL_TIMER config LANTIQ bool "Lantiq based platforms" @@ -410,6 +458,7 @@ config LANTIQ select IRQ_MIPS_CPU select CEVT_R4K select CSRC_R4K + select NO_EXCEPT_FILL select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_BIG_ENDIAN @@ -421,7 +470,6 @@ config LANTIQ select GPIOLIB select SWAP_IO_SPACE select BOOT_RAW - select CLKDEV_LOOKUP select HAVE_LEGACY_CLK select USE_OF select PINCTRL @@ -431,6 +479,23 @@ config LANTIQ config MACH_LOONGSON32 bool "Loongson 32-bit family of machines" + select MACH_GENERIC_CORE + select USE_OF + select BUILTIN_DTB + select BOOT_ELF32 + select CEVT_R4K + select CSRC_R4K + select COMMON_CLK + select DMA_NONCOHERENT + select GENERIC_IRQ_SHOW_LEVEL + select IRQ_MIPS_CPU + select LS1X_IRQ + select SYS_HAS_CPU_LOONGSON32 + select SYS_HAS_EARLY_PRINTK + select USE_GENERIC_EARLY_PRINTK_8250 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_ZBOOT help This enables support for the Loongson-1 family of machines. @@ -447,6 +512,7 @@ config MACH_LOONGSON2EF config MACH_LOONGSON64 bool "Loongson 64-bit family of machines" + select ARCH_DMA_DEFAULT_COHERENT select ARCH_SPARSEMEM_ENABLE select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_SERIO @@ -455,7 +521,7 @@ config MACH_LOONGSON64 select BOARD_SCACHE select CSRC_R4K select CEVT_R4K - select CPU_HAS_WB + select SYNC_R4K select FORCE_PCI select ISA select I8259 @@ -473,11 +539,12 @@ config MACH_LOONGSON64 select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_RELOCATABLE select ZONE_DMA32 - select NUMA select COMMON_CLK select USE_OF select BUILTIN_DTB + select PCI_HOST_GENERIC help This enables the support of Loongson-2/3 family of machines. @@ -486,35 +553,6 @@ config MACH_LOONGSON64 and Loongson-2F which will be removed), developed by the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS). -config MACH_PISTACHIO - bool "IMG Pistachio SoC based boards" - select BOOT_ELF32 - select BOOT_RAW - select CEVT_R4K - select CLKSRC_MIPS_GIC - select COMMON_CLK - select CSRC_R4K - select DMA_NONCOHERENT - select GPIOLIB - select IRQ_MIPS_CPU - select MFD_SYSCON - select MIPS_CPU_SCACHE - select MIPS_GIC - select PINCTRL - select REGULATOR - select SYS_HAS_CPU_MIPS32_R2 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_MIPS_CPS - select SYS_SUPPORTS_MULTITHREADING - select SYS_SUPPORTS_RELOCATABLE - select SYS_SUPPORTS_ZBOOT - select SYS_HAS_EARLY_PRINTK - select USE_GENERIC_EARLY_PRINTK_8250 - select USE_OF - help - This enables support for the IMG Pistachio SoC platform. - config MIPS_MALTA bool "MIPS Malta board" select ARCH_MAY_HAVE_PC_FDC @@ -527,7 +565,7 @@ config MIPS_MALTA select CLKSRC_MIPS_GIC select COMMON_CLK select CSRC_R4K - select DMA_MAYBE_COHERENT + select DMA_NONCOHERENT select GENERIC_ISA_DMA select HAVE_PCSPKR_PLATFORM select HAVE_PCI @@ -540,6 +578,7 @@ config MIPS_MALTA select MIPS_L1_CACHE_SHIFT_6 select MIPS_MSC select PCI_GT64XXX_PCI0 + select RTC_MC146818_LIB select SMP_UP if SMP select SWAP_IO_SPACE select SYS_HAS_CPU_MIPS32_R1 @@ -559,7 +598,6 @@ config MIPS_MALTA select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_MICROMIPS select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_MIPS_CMP select SYS_SUPPORTS_MIPS_CPS select SYS_SUPPORTS_MULTITHREADING select SYS_SUPPORTS_RELOCATABLE @@ -567,6 +605,7 @@ config MIPS_MALTA select SYS_SUPPORTS_VPE_LOADER select SYS_SUPPORTS_ZBOOT select USE_OF + select WAR_ICACHE_REFILLS select ZONE_DMA32 if 64BIT help This enables support for the MIPS Technologies Malta evaluation @@ -580,45 +619,101 @@ config MACH_PIC32 Microchip PIC32 is a family of general-purpose 32 bit MIPS core microcontrollers. -config MACH_VR41XX - bool "NEC VR4100 series based machines" +config EYEQ + bool "Mobileye EyeQ SoC" + select MACH_GENERIC_CORE + select ARM_AMBA + select PHYSICAL_START_BOOL + select ARCH_SPARSEMEM_DEFAULT if 64BIT + select BOOT_RAW + select BUILTIN_DTB select CEVT_R4K + select CLKSRC_MIPS_GIC + select COMMON_CLK + select CPU_MIPSR2_IRQ_EI + select CPU_MIPSR2_IRQ_VI select CSRC_R4K - select SYS_HAS_CPU_VR41XX - select SYS_SUPPORTS_MIPS16 - select GPIOLIB - -config NXP_STB220 - bool "NXP STB220 board" - select SOC_PNX833X + select DMA_NONCOHERENT + select HAVE_PCI + select IRQ_MIPS_CPU + select MIPS_AUTO_PFN_OFFSET + select MIPS_CPU_SCACHE + select MIPS_GIC + select MIPS_L1_CACHE_SHIFT_7 + select PCI_DRIVERS_GENERIC + select SMP_UP if SMP + select SWAP_IO_SPACE + select SYS_HAS_CPU_MIPS64_R6 + select SYS_SUPPORTS_64BIT_KERNEL + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_MIPS_CPS + select SYS_SUPPORTS_RELOCATABLE + select SYS_SUPPORTS_ZBOOT + select UHI_BOOT + select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select USE_OF + select HOTPLUG_PARALLEL if HOTPLUG_CPU help - Support for NXP Semiconductors STB220 Development Board. + Select this to build a kernel supporting EyeQ SoC from Mobileye. -config NXP_STB225 - bool "NXP 225 board" - select SOC_PNX833X - select SOC_PNX8335 - help - Support for NXP Semiconductors STB225 Development Board. + bool + +config MACH_NINTENDO64 + bool "Nintendo 64 console" + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_R4300 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_64BIT_KERNEL + select DMA_NONCOHERENT + select IRQ_MIPS_CPU config RALINK bool "Ralink based machines" select CEVT_R4K + select COMMON_CLK select CSRC_R4K select BOOT_RAW select DMA_NONCOHERENT select IRQ_MIPS_CPU select USE_OF - select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT select SYS_HAS_EARLY_PRINTK - select CLKDEV_LOOKUP select ARCH_HAS_RESET_CONTROLLER select RESET_CONTROLLER +config MACH_REALTEK_RTL + bool "Realtek RTL838x/RTL839x based machines" + select MIPS_GENERIC + select MACH_GENERIC_CORE + select DMA_NONCOHERENT + select IRQ_MIPS_CPU + select CSRC_R4K + select CEVT_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_MULTITHREADING + select SYS_SUPPORTS_VPE_LOADER + select BOOT_RAW + select PINCTRL + select USE_OF + select REALTEK_OTTO_TIMER + config SGI_IP22 bool "SGI IP22 (Indy/Indigo2)" select ARC_MEMORY @@ -650,6 +745,9 @@ config SGI_IP22 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select WAR_R4600_V1_INDEX_ICACHEOP + select WAR_R4600_V1_HIT_CACHEOP + select WAR_R4600_V2_HIT_CACHEOP select MIPS_L1_CACHE_SHIFT_7 help This are the SGI Indy, Challenge S and Indigo2, as well as certain @@ -665,6 +763,7 @@ config SGI_IP27 select ARC_CMDLINE_ONLY select BOOT_ELF64 select DEFAULT_SGI_PARTITION + select FORCE_PCI select SYS_HAS_EARLY_PRINTK select HAVE_PCI select IRQ_MIPS_CPU @@ -677,7 +776,9 @@ config SGI_IP27 select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_NUMA select SYS_SUPPORTS_SMP + select WAR_R10000_LLSC select MIPS_L1_CACHE_SHIFT_7 + select NUMA help This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics workstations. To compile a Linux kernel that runs on these, say Y @@ -711,6 +812,7 @@ config SGI_IP28 select SYS_HAS_EARLY_PRINTK select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select WAR_R10000_LLSC select MIPS_L1_CACHE_SHIFT_7 help This is the SGI Indigo2 with R10000 processor. To compile a Linux @@ -724,12 +826,12 @@ config SGI_IP30 select BOOT_ELF64 select CEVT_R4K select CSRC_R4K + select FORCE_PCI select SYNC_R4K if SMP select ZONE_DMA32 select HAVE_PCI select IRQ_MIPS_CPU select IRQ_DOMAIN_HIERARCHY - select NR_CPUS_DEFAULT_2 select PCI_DRIVERS_GENERIC select PCI_XTALK_BRIDGE select SYS_HAS_EARLY_PRINTK @@ -737,6 +839,7 @@ config SGI_IP30 select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_SMP + select WAR_R10000_LLSC select MIPS_L1_CACHE_SHIFT_7 select ARC_MEMORY help @@ -764,27 +867,10 @@ config SGI_IP32 select SYS_HAS_CPU_NEVADA select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select WAR_ICACHE_REFILLS help If you want this kernel to run on SGI O2 workstation, say Y here. -config SIBYTE_CRHINE - bool "Sibyte BCM91120C-CRhine" - select BOOT_ELF32 - select SIBYTE_BCM1120 - select SWAP_IO_SPACE - select SYS_HAS_CPU_SB1 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - -config SIBYTE_CARMEL - bool "Sibyte BCM91120x-Carmel" - select BOOT_ELF32 - select SIBYTE_BCM1120 - select SWAP_IO_SPACE - select SYS_HAS_CPU_SB1 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - config SIBYTE_CRHONE bool "Sibyte BCM91125C-CRhone" select BOOT_ELF32 @@ -798,7 +884,7 @@ config SIBYTE_CRHONE config SIBYTE_RHONE bool "Sibyte BCM91125E-Rhone" select BOOT_ELF32 - select SIBYTE_BCM1125H + select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 select SYS_SUPPORTS_BIG_ENDIAN @@ -875,6 +961,7 @@ config SNI_RM select I8253 select I8259 select ISA + select MIPS_L1_CACHE_SHIFT_6 select SWAP_IO_SPACE if CPU_BIG_ENDIAN select SYS_HAS_CPU_R4X00 select SYS_HAS_CPU_R5000 @@ -886,17 +973,16 @@ config SNI_RM select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN + select WAR_R4600_V2_HIT_CACHEOP help The SNI RM200/300/400 are MIPS-based machines manufactured by Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid Technology and now in turn merged with Fujitsu. Say Y here to support this machine type. -config MACH_TX39XX - bool "Toshiba TX39 series based machines" - config MACH_TX49XX bool "Toshiba TX49 series based machines" + select WAR_TX49XX_ICACHE_INDEX_INV config MIKROTIK_RB532 bool "Mikrotik RB532 boards" @@ -935,7 +1021,6 @@ config CAVIUM_OCTEON_SOC select HAVE_PLAT_FW_INIT_CMDLINE select HAVE_PLAT_MEMCPY select ZONE_DMA32 - select HOLES_IN_ZONE select GPIOLIB select USE_OF select ARCH_SPARSEMEM_ENABLE @@ -943,6 +1028,7 @@ config CAVIUM_OCTEON_SOC select NR_CPUS_DEFAULT_64 select MIPS_NR_CPU_NR_MAP_1024 select BUILTIN_DTB + select MTD select MTD_COMPLEX_MAPPINGS select SWIOTLB select SYS_SUPPORTS_RELOCATABLE @@ -959,79 +1045,16 @@ config CAVIUM_OCTEON_SOC Hikari Say Y here for most Octeon reference boards. -config NLM_XLR_BOARD - bool "Netlogic XLR/XLS based systems" - select BOOT_ELF32 - select NLM_COMMON - select SYS_HAS_CPU_XLR - select SYS_SUPPORTS_SMP - select HAVE_PCI - select SWAP_IO_SPACE - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select PHYS_ADDR_T_64BIT - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_HIGHMEM - select NR_CPUS_DEFAULT_32 - select CEVT_R4K - select CSRC_R4K - select IRQ_MIPS_CPU - select ZONE_DMA32 if 64BIT - select SYNC_R4K - select SYS_HAS_EARLY_PRINTK - select SYS_SUPPORTS_ZBOOT - select SYS_SUPPORTS_ZBOOT_UART16550 - help - Support for systems based on Netlogic XLR and XLS processors. - Say Y here if you have a XLR or XLS based board. - -config NLM_XLP_BOARD - bool "Netlogic XLP based systems" - select BOOT_ELF32 - select NLM_COMMON - select SYS_HAS_CPU_XLP - select SYS_SUPPORTS_SMP - select HAVE_PCI - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_64BIT_KERNEL - select PHYS_ADDR_T_64BIT - select GPIOLIB - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_HIGHMEM - select NR_CPUS_DEFAULT_32 - select CEVT_R4K - select CSRC_R4K - select IRQ_MIPS_CPU - select ZONE_DMA32 if 64BIT - select SYNC_R4K - select SYS_HAS_EARLY_PRINTK - select USE_OF - select SYS_SUPPORTS_ZBOOT - select SYS_SUPPORTS_ZBOOT_UART16550 - help - This board is based on Netlogic XLP Processor. - Say Y here if you have a XLP based board. +endchoice -config MIPS_PARAVIRT - bool "Para-Virtualized guest system" - select CEVT_R4K - select CSRC_R4K - select SYS_SUPPORTS_64BIT_KERNEL - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_SMP - select NR_CPUS_DEFAULT_4 - select SYS_HAS_EARLY_PRINTK - select SYS_HAS_CPU_MIPS32_R2 - select SYS_HAS_CPU_MIPS64_R2 - select SYS_HAS_CPU_CAVIUM_OCTEON - select HAVE_PCI - select SWAP_IO_SPACE +config FIT_IMAGE_FDT_EPM5 + bool "Include FDT for Mobileye EyeQ5 development platforms" + depends on MACH_EYEQ5 + default n help - This option supports guest running under ???? - -endchoice + Enable this to include the FDT for the EyeQ5 development platforms + from Mobileye in the FIT kernel image. + This requires u-boot on the platform. source "arch/mips/alchemy/Kconfig" source "arch/mips/ath25/Kconfig" @@ -1039,23 +1062,21 @@ source "arch/mips/ath79/Kconfig" source "arch/mips/bcm47xx/Kconfig" source "arch/mips/bcm63xx/Kconfig" source "arch/mips/bmips/Kconfig" +source "arch/mips/econet/Kconfig" source "arch/mips/generic/Kconfig" +source "arch/mips/ingenic/Kconfig" source "arch/mips/jazz/Kconfig" -source "arch/mips/jz4740/Kconfig" source "arch/mips/lantiq/Kconfig" +source "arch/mips/mobileye/Kconfig" source "arch/mips/pic32/Kconfig" -source "arch/mips/pistachio/Kconfig" source "arch/mips/ralink/Kconfig" source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sibyte/Kconfig" source "arch/mips/txx9/Kconfig" -source "arch/mips/vr41xx/Kconfig" source "arch/mips/cavium-octeon/Kconfig" source "arch/mips/loongson2ef/Kconfig" source "arch/mips/loongson32/Kconfig" source "arch/mips/loongson64/Kconfig" -source "arch/mips/netlogic/Kconfig" -source "arch/mips/paravirt/Kconfig" endmenu @@ -1125,17 +1146,7 @@ config FW_CFE bool config ARCH_SUPPORTS_UPROBES - bool - -config DMA_MAYBE_COHERENT - select ARCH_HAS_DMA_COHERENCE_H - select DMA_NONCOHERENT - bool - -config DMA_PERDEV_COHERENT - bool - select ARCH_HAS_SETUP_DMA_OPS - select DMA_NONCOHERENT + def_bool y config DMA_NONCOHERENT bool @@ -1146,12 +1157,13 @@ config DMA_NONCOHERENT # by pgprot_writcombine can be mixed, and the latter sometimes provides # significant advantages. # + select ARCH_HAS_SETUP_DMA_OPS select ARCH_HAS_DMA_WRITE_COMBINE select ARCH_HAS_DMA_PREP_COHERENT + select ARCH_HAS_SYNC_DMA_FOR_CPU select ARCH_HAS_SYNC_DMA_FOR_DEVICE select ARCH_HAS_DMA_SET_UNCACHED select DMA_NONCOHERENT_MMAP - select DMA_NONCOHERENT_CACHE_SYNC select NEED_DMA_MAP_STATE config SYS_HAS_EARLY_PRINTK @@ -1169,9 +1181,6 @@ config MIPS_MSC config SYNC_R4K bool -config MIPS_MACHINE - def_bool n - config NO_IOPORT_MAP def_bool n @@ -1199,9 +1208,6 @@ config HAVE_PLAT_MEMCPY config ISA_DMA_API bool -config HOLES_IN_ZONE - bool - config SYS_SUPPORTS_RELOCATABLE bool help @@ -1209,15 +1215,6 @@ config SYS_SUPPORTS_RELOCATABLE The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF to allow access to command line and entropy sources. -config MIPS_CBPF_JIT - def_bool y - depends on BPF_JIT && HAVE_CBPF_JIT - -config MIPS_EBPF_JIT - def_bool y - depends on BPF_JIT && HAVE_EBPF_JIT - - # # Endianness selection. Sufficiently obscure so many users don't know what to # answer,so we try hard to limit the available choices. Also the use of a @@ -1254,23 +1251,9 @@ config SYS_SUPPORTS_BIG_ENDIAN config SYS_SUPPORTS_LITTLE_ENDIAN bool -config SYS_SUPPORTS_HUGETLBFS - bool - depends on CPU_SUPPORTS_HUGEPAGES - default y - config MIPS_HUGE_TLB_SUPPORT def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE -config IRQ_CPU_RM7K - bool - -config IRQ_MSP_SLP - bool - -config IRQ_MSP_CIC - bool - config IRQ_TXX9 bool @@ -1286,23 +1269,6 @@ config PCI_XTALK_BRIDGE config NO_EXCEPT_FILL bool -config SOC_PNX833X - bool - select CEVT_R4K - select CSRC_R4K - select IRQ_MIPS_CPU - select DMA_NONCOHERENT - select SYS_HAS_CPU_MIPS32_R2 - select SYS_SUPPORTS_32BIT_KERNEL - select SYS_SUPPORTS_LITTLE_ENDIAN - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_MIPS16 - select CPU_MIPSR2_IRQ_VI - -config SOC_PNX8335 - bool - select SOC_PNX833X - config MIPS_SPRAM bool @@ -1394,65 +1360,24 @@ config CPU_LOONGSON64 select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES select CPU_SUPPORTS_MSA + select CPU_SUPPORTS_VZ select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT select CPU_MIPSR2_IRQ_VI + select DMA_NONCOHERENT select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select MIPS_ASID_BITS_VARIABLE select MIPS_PGD_C0_CONTEXT select MIPS_L1_CACHE_SHIFT_6 + select MIPS_FP_SUPPORT select GPIOLIB select SWIOTLB - select HAVE_KVM - help - The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor - cores implements the MIPS64R2 instruction set with many extensions, - including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, - 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old - Loongson-2E/2F is not covered here and will be removed in future. - -config LOONGSON3_ENHANCEMENT - bool "New Loongson-3 CPU Enhancements" - default n - depends on CPU_LOONGSON64 help - New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A - R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as - FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User - Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), - Fast TLB refill support, etc. - - This option enable those enhancements which are not probed at run - time. If you want a generic kernel to run on all Loongson 3 machines, - please say 'N' here. If you want a high-performance kernel to run on - new Loongson-3 machines only, please say 'Y' here. - -config CPU_LOONGSON3_WORKAROUNDS - bool "Old Loongson-3 LLSC Workarounds" - default y if SMP - depends on CPU_LOONGSON64 - help - Loongson-3 processors have the llsc issues which require workarounds. - Without workarounds the system may hang unexpectedly. - - Newer Loongson-3 will fix these issues and no workarounds are needed. - The workarounds have no significant side effect on them but may - decrease the performance of the system so this option should be - disabled unless the kernel is intended to be run on old systems. - - If unsure, please say Y. - -config CPU_LOONGSON3_CPUCFG_EMULATION - bool "Emulate the CPUCFG instruction on older Loongson cores" - default y - depends on CPU_LOONGSON64 - help - Loongson-3A R4 and newer have the CPUCFG instruction available for - userland to query CPU capabilities, much like CPUID on x86. This - option provides emulation of the instruction on older Loongson - cores, back to Loongson-3A1000. - - If unsure, please say Y. + The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor + cores implements the MIPS64R2 instruction set with many extensions, + including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, + 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old + Loongson-2E/2F is not covered here and will be removed in future. config CPU_LOONGSON2E bool "Loongson 2E" @@ -1469,7 +1394,6 @@ config CPU_LOONGSON2F bool "Loongson 2F" depends on SYS_HAS_CPU_LOONGSON2F select CPU_LOONGSON2EF - select GPIOLIB help The Loongson 2F processor implements the MIPS III instruction set with many extensions. @@ -1478,25 +1402,20 @@ config CPU_LOONGSON2F have a similar programming interface with FPGA northbridge used in Loongson2E. -config CPU_LOONGSON1B - bool "Loongson 1B" - depends on SYS_HAS_CPU_LOONGSON1B - select CPU_LOONGSON32 - select LEDS_GPIO_REGISTER - help - The Loongson 1B is a 32-bit SoC, which implements the MIPS32 - Release 1 instruction set and part of the MIPS32 Release 2 - instruction set. - -config CPU_LOONGSON1C - bool "Loongson 1C" - depends on SYS_HAS_CPU_LOONGSON1C - select CPU_LOONGSON32 +config CPU_LOONGSON32 + bool "Loongson 32-bit CPU" + depends on SYS_HAS_CPU_LOONGSON32 + select CPU_MIPS32 + select CPU_MIPSR2 + select CPU_HAS_PREFETCH + select CPU_HAS_LOAD_STORE_LR + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + select CPU_SUPPORTS_CPUFREQ select LEDS_GPIO_REGISTER help - The Loongson 1C is a 32-bit SoC, which implements the MIPS32 - Release 1 instruction set and part of the MIPS32 Release 2 - instruction set. + The Loongson GS232 microarchitecture implements the MIPS32 Release 1 + instruction set and part of the MIPS32 Release 2 instruction set. config CPU_MIPS32_R1 bool "MIPS32 Release 1" @@ -1522,7 +1441,6 @@ config CPU_MIPS32_R2 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_MSA - select HAVE_KVM help Choose this option to build a kernel for release 2 or later of the MIPS32 architecture. Most modern embedded systems with a 32-bit @@ -1537,7 +1455,7 @@ config CPU_MIPS32_R5 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_MSA - select HAVE_KVM + select CPU_SUPPORTS_VZ select MIPS_O32_FP64_SUPPORT help Choose this option to build a kernel for release 5 or later of the @@ -1553,7 +1471,7 @@ config CPU_MIPS32_R6 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_MSA - select HAVE_KVM + select CPU_SUPPORTS_VZ select MIPS_O32_FP64_SUPPORT help Choose this option to build a kernel for release 6 or later of the @@ -1589,7 +1507,6 @@ config CPU_MIPS64_R2 select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES select CPU_SUPPORTS_MSA - select HAVE_KVM help Choose this option to build a kernel for release 2 or later of the MIPS64 architecture. Many modern embedded systems with a 64-bit @@ -1607,7 +1524,7 @@ config CPU_MIPS64_R5 select CPU_SUPPORTS_HUGEPAGES select CPU_SUPPORTS_MSA select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 - select HAVE_KVM + select CPU_SUPPORTS_VZ help Choose this option to build a kernel for release 5 or later of the MIPS64 architecture. This is a intermediate MIPS architecture @@ -1625,7 +1542,7 @@ config CPU_MIPS64_R6 select CPU_SUPPORTS_HUGEPAGES select CPU_SUPPORTS_MSA select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 - select HAVE_KVM + select CPU_SUPPORTS_VZ help Choose this option to build a kernel for release 6 or later of the MIPS64 architecture. New MIPS processors, starting with the Warrior @@ -1639,11 +1556,10 @@ config CPU_P5600 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_MSA - select CPU_SUPPORTS_UNCACHED_ACCELERATED select CPU_SUPPORTS_CPUFREQ + select CPU_SUPPORTS_VZ select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI - select HAVE_KVM select MIPS_O32_FP64_SUPPORT help Choose this option to build a kernel for MIPS Warrior P5600 CPU. @@ -1669,22 +1585,13 @@ config CPU_R3000 might be a safe bet. If the resulting kernel does not work, try to recompile with R3000. -config CPU_TX39XX - bool "R39XX" - depends on SYS_HAS_CPU_TX39XX - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_R3K_TLB - -config CPU_VR41XX - bool "R41xx" - depends on SYS_HAS_CPU_VR41XX +config CPU_R4300 + bool "R4300" + depends on SYS_HAS_CPU_R4300 select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help - The options selects support for the NEC VR4100 series of processors. - Only choose this option if you have one of these processors as a - kernel built with this option will not run on any other type of - processor or vice versa. + MIPS Technologies R4300-series processors. config CPU_R4X00 bool "R4x00" @@ -1766,13 +1673,15 @@ config CPU_CAVIUM_OCTEON depends on SYS_HAS_CPU_CAVIUM_OCTEON select CPU_HAS_PREFETCH select CPU_SUPPORTS_64BIT_KERNEL + select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48 + select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48 select WEAK_ORDERING select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select MIPS_L1_CACHE_SHIFT_7 - select HAVE_KVM + select CPU_SUPPORTS_VZ help The Cavium Octeon processor is a highly integrated chip containing many ethernet hardware widgets for networking tasks. The processor @@ -1796,36 +1705,49 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. -config CPU_XLR - bool "Netlogic XLR SoC" - depends on SYS_HAS_CPU_XLR - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - select CPU_SUPPORTS_HIGHMEM - select CPU_SUPPORTS_HUGEPAGES - select WEAK_ORDERING - select WEAK_REORDERING_BEYOND_LLSC +endchoice + +config LOONGSON3_ENHANCEMENT + bool "New Loongson-3 CPU Enhancements" + default n + depends on CPU_LOONGSON64 help - Netlogic Microsystems XLR/XLS processors. + New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A + R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as + FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User + Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), + Fast TLB refill support, etc. -config CPU_XLP - bool "Netlogic XLP SoC" - depends on SYS_HAS_CPU_XLP - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_64BIT_KERNEL - select CPU_SUPPORTS_HIGHMEM - select WEAK_ORDERING - select WEAK_REORDERING_BEYOND_LLSC - select CPU_HAS_PREFETCH - select CPU_MIPSR2 - select CPU_SUPPORTS_HUGEPAGES - select MIPS_ASID_BITS_VARIABLE + This option enable those enhancements which are not probed at run + time. If you want a generic kernel to run on all Loongson 3 machines, + please say 'N' here. If you want a high-performance kernel to run on + new Loongson-3 machines only, please say 'Y' here. + +config CPU_LOONGSON3_WORKAROUNDS + bool "Loongson-3 LLSC Workarounds" + default y if SMP + depends on CPU_LOONGSON64 help - Netlogic Microsystems XLP processors. -endchoice + Loongson-3 processors have the llsc issues which require workarounds. + Without workarounds the system may hang unexpectedly. + + Say Y, unless you know what you are doing. + +config CPU_LOONGSON3_CPUCFG_EMULATION + bool "Emulate the CPUCFG instruction on older Loongson cores" + default y + depends on CPU_LOONGSON64 + help + Loongson-3A R4 and newer have the CPUCFG instruction available for + userland to query CPU capabilities, much like CPUID on x86. This + option provides emulation of the instruction on older Loongson + cores, back to Loongson-3A1000. + + If unsure, please say Y. config CPU_MIPS32_3_5_FEATURES bool "MIPS32 Release 3.5 Features" @@ -1910,6 +1832,7 @@ config SYS_SUPPORTS_ZBOOT select HAVE_KERNEL_LZMA select HAVE_KERNEL_LZO select HAVE_KERNEL_XZ + select HAVE_KERNEL_ZSTD config SYS_SUPPORTS_ZBOOT_UART16550 bool @@ -1925,16 +1848,7 @@ config CPU_LOONGSON2EF select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM select CPU_SUPPORTS_HUGEPAGES - select ARCH_HAS_PHYS_TO_DMA - -config CPU_LOONGSON32 - bool - select CPU_MIPS32 - select CPU_MIPSR2 - select CPU_HAS_PREFETCH - select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_HIGHMEM - select CPU_SUPPORTS_CPUFREQ + select RTC_MC146818_LIB config CPU_BMIPS32_3300 select SMP_UP if SMP @@ -1973,10 +1887,7 @@ config SYS_HAS_CPU_LOONGSON2F select CPU_SUPPORTS_CPUFREQ select CPU_SUPPORTS_ADDRWINCFG if 64BIT -config SYS_HAS_CPU_LOONGSON1B - bool - -config SYS_HAS_CPU_LOONGSON1C +config SYS_HAS_CPU_LOONGSON32 bool config SYS_HAS_CPU_MIPS32_R1 @@ -1990,11 +1901,9 @@ config SYS_HAS_CPU_MIPS32_R3_5 config SYS_HAS_CPU_MIPS32_R5 bool - select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT config SYS_HAS_CPU_MIPS32_R6 bool - select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT config SYS_HAS_CPU_MIPS64_R1 bool @@ -2002,21 +1911,19 @@ config SYS_HAS_CPU_MIPS64_R1 config SYS_HAS_CPU_MIPS64_R2 bool +config SYS_HAS_CPU_MIPS64_R5 + bool + config SYS_HAS_CPU_MIPS64_R6 bool - select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT config SYS_HAS_CPU_P5600 bool - select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT config SYS_HAS_CPU_R3000 bool -config SYS_HAS_CPU_TX39XX - bool - -config SYS_HAS_CPU_VR41XX +config SYS_HAS_CPU_R4300 bool config SYS_HAS_CPU_R4X00 @@ -2036,7 +1943,6 @@ config SYS_HAS_CPU_NEVADA config SYS_HAS_CPU_R10000 bool - select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT config SYS_HAS_CPU_RM7000 bool @@ -2065,13 +1971,6 @@ config SYS_HAS_CPU_BMIPS4380 config SYS_HAS_CPU_BMIPS5000 bool select SYS_HAS_CPU_BMIPS - select ARCH_HAS_SYNC_DMA_FOR_CPU - -config SYS_HAS_CPU_XLR - bool - -config SYS_HAS_CPU_XLP - bool # # CPU may reorder R->R, R->W, W->R, W->W @@ -2099,7 +1998,7 @@ config CPU_MIPS32 config CPU_MIPS64 bool default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \ - CPU_MIPS64_R6 + CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON # # These indicate the revision of the architecture @@ -2129,7 +2028,6 @@ config CPU_MIPSR6 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN select HAVE_ARCH_BITREVERSE select MIPS_ASID_BITS_VARIABLE - select MIPS_CRC_SUPPORT select MIPS_SPRAM config TARGET_ISA_REV @@ -2163,10 +2061,13 @@ config CPU_SUPPORTS_ADDRWINCFG bool config CPU_SUPPORTS_HUGEPAGES bool - depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA)) + depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA)) +config CPU_SUPPORTS_VZ + bool config MIPS_PGD_C0_CONTEXT bool - default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP + depends on 64BIT + default y if (CPU_MIPSR2 || CPU_MIPSR6) # # Set to y for ptrace access to watch registers. @@ -2200,22 +2101,6 @@ config 64BIT endchoice -config KVM_GUEST - bool "KVM Guest Kernel" - depends on BROKEN_ON_SMP - help - Select this option if building a guest kernel for KVM (Trap & Emulate) - mode. - -config KVM_GUEST_TIMER_FREQ - int "Count/Compare Timer Frequency (MHz)" - depends on KVM_GUEST - default 100 - help - Set this to non-zero if building a guest kernel for KVM to skip RTC - emulation when determining guest CPU Frequency. Instead, the guest's - timer frequency is specified directly. - config MIPS_VA_BITS_48 bool "48 bits virtual memory" depends on 64BIT @@ -2229,69 +2114,22 @@ config MIPS_VA_BITS_48 If unsure, say N. -choice - prompt "Kernel page size" - default PAGE_SIZE_4KB - -config PAGE_SIZE_4KB - bool "4kB" - depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 - help - This option select the standard 4kB Linux page size. On some - R3000-family processors this is the only available page size. Using - 4kB page size will minimize memory consumption and is therefore - recommended for low memory systems. - -config PAGE_SIZE_8KB - bool "8kB" - depends on CPU_CAVIUM_OCTEON - depends on !MIPS_VA_BITS_48 - help - Using 8kB page size will result in higher performance kernel at - the price of higher memory consumption. This option is available - only on cnMIPS processors. Note that you will need a suitable Linux - distribution to support this. - -config PAGE_SIZE_16KB - bool "16kB" - depends on !CPU_R3000 && !CPU_TX39XX - help - Using 16kB page size will result in higher performance kernel at - the price of higher memory consumption. This option is available on - all non-R3000 family processors. Note that you will need a suitable - Linux distribution to support this. - -config PAGE_SIZE_32KB - bool "32kB" - depends on CPU_CAVIUM_OCTEON - depends on !MIPS_VA_BITS_48 - help - Using 32kB page size will result in higher performance kernel at - the price of higher memory consumption. This option is available - only on cnMIPS cores. Note that you will need a suitable Linux - distribution to support this. - -config PAGE_SIZE_64KB - bool "64kB" - depends on !CPU_R3000 && !CPU_TX39XX - help - Using 64kB page size will result in higher performance kernel at - the price of higher memory consumption. This option is available on - all non-R3000 family processor. Not that at the time of this - writing this option is still high experimental. +config ZBOOT_LOAD_ADDRESS + hex "Compressed kernel load address" + default 0xffffffff80400000 if BCM47XX + default 0x0 + depends on SYS_SUPPORTS_ZBOOT + help + The address to load compressed kernel, aka vmlinuz. -endchoice + This is only used if non-zero. -config FORCE_MAX_ZONEORDER +config ARCH_FORCE_MAX_ORDER int "Maximum zone order" - range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB - default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB - range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB - default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB - range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB - default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB - range 11 64 - default "11" + default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB + default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB + default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB + default "10" help The kernel memory allocator divides physically contiguous memory blocks into "zones", where each zone is a power of two number of @@ -2300,9 +2138,6 @@ config FORCE_MAX_ZONEORDER blocks of physically contiguous memory, then you may need to increase this value. - This config option is actually maximum order plus one. For example, - a value of 11 means that the largest free memory block is 2^10 pages. - The page size is not necessarily 4KB. Keep this in mind when choosing a value for this option. @@ -2341,7 +2176,7 @@ config CPU_HAS_PREFETCH config CPU_GENERIC_DUMP_TLB bool - default y if !(CPU_R3000 || CPU_TX39XX) + default y if !CPU_R3000 config MIPS_FP_SUPPORT bool "Floating Point support" if EXPERT @@ -2361,7 +2196,7 @@ config MIPS_FP_SUPPORT config CPU_R2300_FPU bool depends on MIPS_FP_SUPPORT - default y if CPU_R3000 || CPU_TX39XX + default y if CPU_R3000 config CPU_R3K_TLB bool @@ -2378,7 +2213,8 @@ config CPU_R4K_CACHE_TLB config MIPS_MT_SMP bool "MIPS MT SMP support (1 TC on each available VPE)" default y - depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS + depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6 + depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI select SYNC_R4K @@ -2386,7 +2222,7 @@ config MIPS_MT_SMP select SMP select SMP_UP select SYS_SUPPORTS_SMP - select SYS_SUPPORTS_SCHED_SMT + select ARCH_SUPPORTS_SCHED_SMT select MIPS_PERF_SHARED_TC_COUNTERS help This is a kernel model which is known as SMVP. This is supported @@ -2398,18 +2234,6 @@ config MIPS_MT_SMP config MIPS_MT bool -config SCHED_SMT - bool "SMT (multithreading) scheduler support" - depends on SYS_SUPPORTS_SCHED_SMT - default n - help - SMT scheduler support improves the CPU scheduler's decision making - when dealing with MIPS MT enabled cores at a cost of slightly - increased overhead in some places. If unsure say N here. - -config SYS_SUPPORTS_SCHED_SMT - bool - config SYS_SUPPORTS_MULTITHREADING bool @@ -2447,15 +2271,10 @@ config MIPS_VPE_LOADER Includes a loader for loading an elf relocatable object onto another VPE and running it. -config MIPS_VPE_LOADER_CMP - bool - default "y" - depends on MIPS_VPE_LOADER && MIPS_CMP - config MIPS_VPE_LOADER_MT bool default "y" - depends on MIPS_VPE_LOADER && !MIPS_CMP + depends on MIPS_VPE_LOADER config MIPS_VPE_LOADER_TOM bool "Load VPE program into memory hidden from linux" @@ -2471,31 +2290,10 @@ config MIPS_VPE_APSP_API bool "Enable support for AP/SP API (RTLX)" depends on MIPS_VPE_LOADER -config MIPS_VPE_APSP_API_CMP - bool - default "y" - depends on MIPS_VPE_APSP_API && MIPS_CMP - config MIPS_VPE_APSP_API_MT bool default "y" - depends on MIPS_VPE_APSP_API && !MIPS_CMP - -config MIPS_CMP - bool "MIPS CMP framework support (DEPRECATED)" - depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 - select SMP - select SYNC_R4K - select SYS_SUPPORTS_SMP - select WEAK_ORDERING - default n - help - Select this if you are using a bootloader which implements the "CMP - framework" protocol (ie. YAMON) and want your kernel to make use of - its ability to start secondary CPUs. - - Unless you have a specific need, you should use CONFIG_MIPS_CPS - instead of this. + depends on MIPS_VPE_APSP_API config MIPS_CPS bool "MIPS Coherent Processing System support" @@ -2503,11 +2301,14 @@ config MIPS_CPS select MIPS_CM select MIPS_CPS_PM if HOTPLUG_CPU select SMP + select HOTPLUG_SMT if HOTPLUG_PARALLEL + select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU select SYNC_R4K if (CEVT_R4K || CSRC_R4K) select SYS_SUPPORTS_HOTPLUG_CPU - select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 + select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6 select SYS_SUPPORTS_SMP select WEAK_ORDERING + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Select this if you wish to run an SMP kernel across multiple cores within a MIPS Coherent Processing System. When this option is @@ -2625,13 +2426,51 @@ config CPU_HAS_SYNC # # CPU non-features # + +# Work around the "daddi" and "daddiu" CPU errata: +# +# - The `daddi' instruction fails to trap on overflow. +# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", +# erratum #23 +# +# - The `daddiu' instruction can produce an incorrect result. +# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", +# erratum #41 +# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum +# #15 +# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 +# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 config CPU_DADDI_WORKAROUNDS bool +# Work around certain R4000 CPU errata (as implemented by GCC): +# +# - A double-word or a variable shift may give an incorrect result +# if executed immediately after starting an integer division: +# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", +# erratum #28 +# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum +# #19 +# +# - A double-word or a variable shift may give an incorrect result +# if executed while an integer multiplication is in progress: +# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", +# errata #16 & #28 +# +# - An integer division may give an incorrect result if started in +# a delay slot of a taken branch or a jump: +# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", +# erratum #52 config CPU_R4000_WORKAROUNDS bool select CPU_R4400_WORKAROUNDS +# Work around certain R4400 CPU errata (as implemented by GCC): +# +# - A double-word or a variable shift may give an incorrect result +# if executed immediately after starting an integer division: +# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 +# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 config CPU_R4400_WORKAROUNDS bool @@ -2641,19 +2480,86 @@ config CPU_R4X00_BUGS64 config MIPS_ASID_SHIFT int - default 6 if CPU_R3000 || CPU_TX39XX + default 6 if CPU_R3000 default 0 config MIPS_ASID_BITS int default 0 if MIPS_ASID_BITS_VARIABLE - default 6 if CPU_R3000 || CPU_TX39XX + default 6 if CPU_R3000 default 8 config MIPS_ASID_BITS_VARIABLE bool -config MIPS_CRC_SUPPORT +# R4600 erratum. Due to the lack of errata information the exact +# technical details aren't known. I've experimentally found that disabling +# interrupts during indexed I-cache flushes seems to be sufficient to deal +# with the issue. +config WAR_R4600_V1_INDEX_ICACHEOP + bool + +# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: +# +# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, +# Hit_Invalidate_D and Create_Dirty_Excl_D should only be +# executed if there is no other dcache activity. If the dcache is +# accessed for another instruction immediately preceding when these +# cache instructions are executing, it is possible that the dcache +# tag match outputs used by these cache instructions will be +# incorrect. These cache instructions should be preceded by at least +# four instructions that are not any kind of load or store +# instruction. +# +# This is not allowed: lw +# nop +# nop +# nop +# cache Hit_Writeback_Invalidate_D +# +# This is allowed: lw +# nop +# nop +# nop +# nop +# cache Hit_Writeback_Invalidate_D +config WAR_R4600_V1_HIT_CACHEOP + bool + +# Writeback and invalidate the primary cache dcache before DMA. +# +# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D, +# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only +# operate correctly if the internal data cache refill buffer is empty. These +# CACHE instructions should be separated from any potential data cache miss +# by a load instruction to an uncached address to empty the response buffer." +# (Revision 2.0 device errata from IDT available on https://www.idt.com/ +# in .pdf format.) +config WAR_R4600_V2_HIT_CACHEOP + bool + +# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for +# the line which this instruction itself exists, the following +# operation is not guaranteed." +# +# Workaround: do two phase flushing for Index_Invalidate_I +config WAR_TX49XX_ICACHE_INDEX_INV + bool + +# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra +# opposes it being called that) where invalid instructions in the same +# I-cache line worth of instructions being fetched may case spurious +# exceptions. +config WAR_ICACHE_REFILLS + bool + +# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that +# may cause ll / sc and lld / scd sequences to execute non-atomically. +config WAR_R10000_LLSC + bool + +# 34K core erratum: "Problems Executing the TLBR Instruction" +config WAR_MIPS34K_MISSED_ITLB bool # @@ -2672,6 +2578,7 @@ config MIPS_CRC_SUPPORT config HIGHMEM bool "High Memory Support" depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA + select KMAP_LOCAL config CPU_SUPPORTS_HIGHMEM bool @@ -2701,11 +2608,13 @@ config ARCH_FLATMEM_ENABLE config ARCH_SPARSEMEM_ENABLE bool - select SPARSEMEM_STATIC if !SGI_IP27 config NUMA bool "NUMA Support" depends on SYS_SUPPORTS_NUMA + select SMP + select HAVE_SETUP_PER_CPU_AREA + select NEED_PER_CPU_EMBED_FIRST_CHUNK help Say Y to compile the kernel to support NUMA (Non-Uniform Memory Access). This option improves performance on systems with more @@ -2716,21 +2625,15 @@ config NUMA config SYS_SUPPORTS_NUMA bool -config HAVE_SETUP_PER_CPU_AREA - def_bool y - depends on NUMA - -config NEED_PER_CPU_EMBED_FIRST_CHUNK - def_bool y - depends on NUMA - config RELOCATABLE bool "Relocatable kernel" depends on SYS_SUPPORTS_RELOCATABLE depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \ CPU_MIPS32_R5 || CPU_MIPS64_R5 || \ CPU_MIPS32_R6 || CPU_MIPS64_R6 || \ - CPU_P5600 || CAVIUM_OCTEON_SOC + CPU_P5600 || CAVIUM_OCTEON_SOC || \ + CPU_LOONGSON64 + select ARCH_VMLINUX_NEEDS_RELOCS help This builds a kernel image that retains relocation information so it can be loaded someplace besides the default 1MB. @@ -2741,6 +2644,7 @@ config RELOCATION_TABLE_SIZE hex "Relocation table size" depends on RELOCATABLE range 0x0 0x01000000 + default "0x00200000" if CPU_LOONGSON64 default "0x00100000" help A table of relocation data will be appended to the kernel binary @@ -2786,11 +2690,11 @@ config RANDOMIZE_BASE_MAX_OFFSET config NODES_SHIFT int default "6" - depends on NEED_MULTIPLE_NODES + depends on NUMA config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" - depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64) + depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64) default y help Enable hardware performance counter support for perf events. If @@ -2825,7 +2729,7 @@ config SMP Y to "Enhanced Real Time Clock Support", below. See also the SMP-HOWTO available at - <http://www.tldp.org/docs.html#howto>. + <https://www.tldp.org/docs.html#howto>. If you don't know what to do here, say N. @@ -2842,9 +2746,6 @@ config HOTPLUG_CPU config SMP_UP bool -config SYS_SUPPORTS_MIPS_CMP - bool - config SYS_SUPPORTS_MIPS_CPS bool @@ -2984,33 +2885,14 @@ config HZ config SCHED_HRTICK def_bool HIGH_RES_TIMERS -config KEXEC - bool "Kexec system call" - select KEXEC_CORE - help - kexec is a system call that implements the ability to shutdown your - current kernel, and to start another kernel. It is like a reboot - but it is independent of the system firmware. And like a reboot - you can start any kernel with it, not just Linux. - - The name comes from the similarity to the exec system call. +config ARCH_SUPPORTS_KEXEC + def_bool y - It is an ongoing process to be certain the hardware in a machine - is properly shutdown, so do not be surprised if this code does not - initially work for you. As of this writing the exact hardware - interface is strongly in flux, so no good recommendation can be - made. +config ARCH_SUPPORTS_CRASH_DUMP + def_bool y -config CRASH_DUMP - bool "Kernel crash dumps" - help - Generate crash dump after being started by kexec. - This should be normally only set in special crash dump kernels - which are loaded in the main kernel with kexec-tools into - a specially reserved region and then later executed after - a crash by kdump/kexec. The crash dump kernel must be compiled - to a memory address not used by the main kernel or firmware using - PHYSICAL_START. +config ARCH_DEFAULT_CRASH_DUMP + def_bool y config PHYSICAL_START hex "Physical address where the kernel is loaded" @@ -3023,23 +2905,6 @@ config PHYSICAL_START specified in the "crashkernel=YM@XM" command line boot parameter passed to the panic-ed kernel). -config SECCOMP - bool "Enable seccomp to safely compute untrusted bytecode" - depends on PROC_FS - default y - help - This kernel feature is useful for number crunching applications - that may need to compute untrusted bytecode during their - execution. By using pipes or other transports made available to - the process as file descriptors supporting the read/write - syscalls, it's possible to isolate those applications in - their own address space using seccomp. Once seccomp is - enabled via /proc/<pid>/seccomp, it cannot be disabled - and the task is only allowed to execute a few safe syscalls - defined by each seccomp mode. - - If unsure, say Y. Only embedded should say N here. - config MIPS_O32_FP64_SUPPORT bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 depends on 32BIT || MIPS32_O32 @@ -3056,7 +2921,7 @@ config MIPS_O32_FP64_SUPPORT Although binutils currently supports use of this flag the details concerning its effect upon the O32 ABI in userland are still being - worked on. In order to avoid userland becoming dependant upon current + worked on. In order to avoid userland becoming dependent upon current behaviour before the details have been finalised, this option should be considered experimental and only enabled by those working upon said details. @@ -3076,7 +2941,8 @@ config BUILTIN_DTB bool choice - prompt "Kernel appended dtb support" if USE_OF + prompt "Kernel appended dtb support" + depends on USE_OF default MIPS_NO_APPENDED_DTB config MIPS_NO_APPENDED_DTB @@ -3094,7 +2960,7 @@ choice objcopy --update-section .appended_dtb=<filename>.dtb vmlinux - This is meant as a backward compatiblity convenience for those + This is meant as a backward compatibility convenience for those systems with a bootloader that can't be upgraded to accommodate the documented boot protocol using a device tree. @@ -3117,10 +2983,11 @@ choice endchoice choice - prompt "Kernel command line type" if !CMDLINE_OVERRIDE + prompt "Kernel command line type" + depends on !CMDLINE_OVERRIDE default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ - !MACH_LOONGSON64 && !MIPS_MALTA && \ - !CAVIUM_OCTEON_SOC + !MACH_LOONGSON64 && !MACH_LOONGSON32 && \ + !MIPS_MALTA && !CAVIUM_OCTEON_SOC default MIPS_CMDLINE_FROM_BOOTLOADER config MIPS_CMDLINE_FROM_DTB @@ -3152,7 +3019,7 @@ config STACKTRACE_SUPPORT config PGTABLE_LEVELS int default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 - default 3 if 64BIT && !PAGE_SIZE_64KB + default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48) default 2 config MIPS_AUTO_PFN_OFFSET @@ -3213,13 +3080,6 @@ config I8253 select CLKSRC_I8253 select CLKEVT_I8253 select MIPS_EXTERNAL_TIMER - -config ZONE_DMA - bool - -config ZONE_DMA32 - bool - endmenu config TRAD_SIGNALS @@ -3231,16 +3091,12 @@ config MIPS32_COMPAT config COMPAT bool -config SYSVIPC_COMPAT - bool - config MIPS32_O32 bool "Kernel support for o32 binaries" depends on 64BIT select ARCH_WANT_OLD_COMPAT_IPC select COMPAT select MIPS32_COMPAT - select SYSVIPC_COMPAT if SYSVIPC help Select this option if you want to run o32 binaries. These are pure 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of @@ -3254,7 +3110,6 @@ config MIPS32_N32 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select COMPAT select MIPS32_COMPAT - select SYSVIPC_COMPAT if SYSVIPC help Select this option if you want to run n32 binaries. These are 64-bit binaries using 32-bit quantities for addressing and certain @@ -3263,10 +3118,13 @@ config MIPS32_N32 If unsure, say N. -config BINFMT_ELF32 - bool - default y if MIPS32_O32 || MIPS32_N32 - select ELFCORE +config CC_HAS_MNO_BRANCH_LIKELY + def_bool y + depends on $(cc-option,-mno-branch-likely) + +# https://github.com/llvm/llvm-project/issues/61045 +config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH + def_bool y if CC_IS_CLANG menu "Power management options" @@ -3289,14 +3147,12 @@ menu "CPU Power Management" if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER source "drivers/cpufreq/Kconfig" -endif +endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER source "drivers/cpuidle/Kconfig" endmenu -source "drivers/firmware/Kconfig" - source "arch/mips/kvm/Kconfig" source "arch/mips/vdso/Kconfig" |