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-rw-r--r--arch/mips/Kconfig149
1 files changed, 84 insertions, 65 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index f1aa1bf11166..b88b97139fa8 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -6,8 +6,9 @@ config MIPS
select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
select ARCH_HAS_CPU_CACHE_ALIASING
select ARCH_HAS_CPU_FINALIZE_INIT
- select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
+ select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
+ select ARCH_HAS_DMA_OPS if MACH_JAZZ
select ARCH_HAS_FORTIFY_SOURCE
select ARCH_HAS_KCOV
select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
@@ -28,14 +29,15 @@ config MIPS
select ARCH_WANT_IPC_PARSE_VERSION
select ARCH_WANT_LD_ORPHAN_WARN
select BUILDTIME_TABLE_SORT
+ select BUILTIN_DTB_ALL if BUILTIN_DTB
select CLONE_BACKWARDS
select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
- select CPU_PM if CPU_IDLE
+ select CPU_PM if CPU_IDLE || SUSPEND
select GENERIC_ATOMIC64 if !64BIT
+ select GENERIC_BUILTIN_DTB if BUILTIN_DTB
select GENERIC_CMOS_UPDATE
select GENERIC_CPU_AUTOPROBE
select GENERIC_GETTIMEOFDAY
- select GENERIC_IOMAP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_ISA_DMA if EISA
@@ -44,6 +46,7 @@ config MIPS
select GENERIC_LIB_CMPDI2
select GENERIC_LIB_LSHRDI3
select GENERIC_LIB_UCMPDI2
+ select GENERIC_PCI_IOMAP
select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
select GENERIC_SMP_IDLE_THREAD
select GENERIC_IDLE_POLL_SETUP
@@ -69,7 +72,6 @@ config MIPS
select HAVE_EBPF_JIT if !CPU_MICROMIPS
select HAVE_EXIT_THREAD
select HAVE_GUP_FAST
- select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_TRACER
select HAVE_GCC_PLUGINS
@@ -387,13 +389,37 @@ config MACH_DECSTATION
otherwise choose R3000.
+config ECONET
+ bool "EcoNet MIPS family"
+ select BOOT_RAW
+ select CPU_BIG_ENDIAN
+ select DEBUG_ZBOOT if DEBUG_KERNEL
+ select EARLY_PRINTK_8250
+ select ECONET_EN751221_TIMER
+ select SERIAL_8250
+ select SERIAL_OF_PLATFORM
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_CPU_MIPS32_R2
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_MIPS16
+ select SYS_SUPPORTS_ZBOOT_UART16550
+ select USE_GENERIC_EARLY_PRINTK_8250
+ select USE_OF
+ help
+ EcoNet EN75xx MIPS devices are big endian MIPS machines used
+ in XPON (fiber) and DSL applications. They have SPI, PCI, USB,
+ GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores.
+ Don't confuse these with the Airoha ARM devices sometimes referred
+ to as "EcoNet", this family is for MIPS based devices only.
+
config MACH_JAZZ
bool "Jazz family of machines"
select ARC_MEMORY
select ARC_PROMLIB
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
- select DMA_OPS
select FW_ARC
select FW_ARC32
select ARCH_MAY_HAVE_PC_FDC
@@ -453,6 +479,23 @@ config LANTIQ
config MACH_LOONGSON32
bool "Loongson 32-bit family of machines"
+ select MACH_GENERIC_CORE
+ select USE_OF
+ select BUILTIN_DTB
+ select BOOT_ELF32
+ select CEVT_R4K
+ select CSRC_R4K
+ select COMMON_CLK
+ select DMA_NONCOHERENT
+ select GENERIC_IRQ_SHOW_LEVEL
+ select IRQ_MIPS_CPU
+ select LS1X_IRQ
+ select SYS_HAS_CPU_LOONGSON32
+ select SYS_HAS_EARLY_PRINTK
+ select USE_GENERIC_EARLY_PRINTK_8250
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_HIGHMEM
select SYS_SUPPORTS_ZBOOT
help
This enables support for the Loongson-1 family of machines.
@@ -478,6 +521,7 @@ config MACH_LOONGSON64
select BOARD_SCACHE
select CSRC_R4K
select CEVT_R4K
+ select SYNC_R4K
select FORCE_PCI
select ISA
select I8259
@@ -501,7 +545,6 @@ config MACH_LOONGSON64
select USE_OF
select BUILTIN_DTB
select PCI_HOST_GENERIC
- select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
help
This enables the support of Loongson-2/3 family of machines.
@@ -535,6 +578,7 @@ config MIPS_MALTA
select MIPS_L1_CACHE_SHIFT_6
select MIPS_MSC
select PCI_GT64XXX_PCI0
+ select RTC_MC146818_LIB
select SMP_UP if SMP
select SWAP_IO_SPACE
select SYS_HAS_CPU_MIPS32_R1
@@ -575,8 +619,8 @@ config MACH_PIC32
Microchip PIC32 is a family of general-purpose 32 bit MIPS core
microcontrollers.
-config MACH_EYEQ5
- bool "Mobileye EyeQ5 SoC"
+config EYEQ
+ bool "Mobileye EyeQ SoC"
select MACH_GENERIC_CORE
select ARM_AMBA
select PHYSICAL_START_BOOL
@@ -614,8 +658,9 @@ config MACH_EYEQ5
select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
select USE_OF
+ select HOTPLUG_PARALLEL if HOTPLUG_CPU
help
- Select this to build a kernel supporting EyeQ5 SoC from Mobileye.
+ Select this to build a kernel supporting EyeQ SoC from Mobileye.
bool
@@ -667,6 +712,7 @@ config MACH_REALTEK_RTL
select BOOT_RAW
select PINCTRL
select USE_OF
+ select REALTEK_OTTO_TIMER
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
@@ -733,7 +779,6 @@ config SGI_IP27
select WAR_R10000_LLSC
select MIPS_L1_CACHE_SHIFT_7
select NUMA
- select HAVE_ARCH_NODEDATA_EXTENSION
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
@@ -1017,10 +1062,12 @@ source "arch/mips/ath79/Kconfig"
source "arch/mips/bcm47xx/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
source "arch/mips/bmips/Kconfig"
+source "arch/mips/econet/Kconfig"
source "arch/mips/generic/Kconfig"
source "arch/mips/ingenic/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lantiq/Kconfig"
+source "arch/mips/mobileye/Kconfig"
source "arch/mips/pic32/Kconfig"
source "arch/mips/ralink/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
@@ -1355,25 +1402,20 @@ config CPU_LOONGSON2F
have a similar programming interface with FPGA northbridge used in
Loongson2E.
-config CPU_LOONGSON1B
- bool "Loongson 1B"
- depends on SYS_HAS_CPU_LOONGSON1B
- select CPU_LOONGSON32
- select LEDS_GPIO_REGISTER
- help
- The Loongson 1B is a 32-bit SoC, which implements the MIPS32
- Release 1 instruction set and part of the MIPS32 Release 2
- instruction set.
-
-config CPU_LOONGSON1C
- bool "Loongson 1C"
- depends on SYS_HAS_CPU_LOONGSON1C
- select CPU_LOONGSON32
+config CPU_LOONGSON32
+ bool "Loongson 32-bit CPU"
+ depends on SYS_HAS_CPU_LOONGSON32
+ select CPU_MIPS32
+ select CPU_MIPSR2
+ select CPU_HAS_PREFETCH
+ select CPU_HAS_LOAD_STORE_LR
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_CPUFREQ
select LEDS_GPIO_REGISTER
help
- The Loongson 1C is a 32-bit SoC, which implements the MIPS32
- Release 1 instruction set and part of the MIPS32 Release 2
- instruction set.
+ The Loongson GS232 microarchitecture implements the MIPS32 Release 1
+ instruction set and part of the MIPS32 Release 2 instruction set.
config CPU_MIPS32_R1
bool "MIPS32 Release 1"
@@ -1806,15 +1848,7 @@ config CPU_LOONGSON2EF
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
select CPU_SUPPORTS_HUGEPAGES
-
-config CPU_LOONGSON32
- bool
- select CPU_MIPS32
- select CPU_MIPSR2
- select CPU_HAS_PREFETCH
- select CPU_SUPPORTS_32BIT_KERNEL
- select CPU_SUPPORTS_HIGHMEM
- select CPU_SUPPORTS_CPUFREQ
+ select RTC_MC146818_LIB
config CPU_BMIPS32_3300
select SMP_UP if SMP
@@ -1853,10 +1887,7 @@ config SYS_HAS_CPU_LOONGSON2F
select CPU_SUPPORTS_CPUFREQ
select CPU_SUPPORTS_ADDRWINCFG if 64BIT
-config SYS_HAS_CPU_LOONGSON1B
- bool
-
-config SYS_HAS_CPU_LOONGSON1C
+config SYS_HAS_CPU_LOONGSON32
bool
config SYS_HAS_CPU_MIPS32_R1
@@ -1997,7 +2028,6 @@ config CPU_MIPSR6
select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
select HAVE_ARCH_BITREVERSE
select MIPS_ASID_BITS_VARIABLE
- select MIPS_CRC_SUPPORT
select MIPS_SPRAM
config TARGET_ISA_REV
@@ -2192,7 +2222,7 @@ config MIPS_MT_SMP
select SMP
select SMP_UP
select SYS_SUPPORTS_SMP
- select SYS_SUPPORTS_SCHED_SMT
+ select ARCH_SUPPORTS_SCHED_SMT
select MIPS_PERF_SHARED_TC_COUNTERS
help
This is a kernel model which is known as SMVP. This is supported
@@ -2204,18 +2234,6 @@ config MIPS_MT_SMP
config MIPS_MT
bool
-config SCHED_SMT
- bool "SMT (multithreading) scheduler support"
- depends on SYS_SUPPORTS_SCHED_SMT
- default n
- help
- SMT scheduler support improves the CPU scheduler's decision making
- when dealing with MIPS MT enabled cores at a cost of slightly
- increased overhead in some places. If unsure say N here.
-
-config SYS_SUPPORTS_SCHED_SMT
- bool
-
config SYS_SUPPORTS_MULTITHREADING
bool
@@ -2283,10 +2301,11 @@ config MIPS_CPS
select MIPS_CM
select MIPS_CPS_PM if HOTPLUG_CPU
select SMP
+ select HOTPLUG_SMT if HOTPLUG_PARALLEL
select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
select SYS_SUPPORTS_HOTPLUG_CPU
- select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
+ select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6
select SYS_SUPPORTS_SMP
select WEAK_ORDERING
select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
@@ -2473,9 +2492,6 @@ config MIPS_ASID_BITS
config MIPS_ASID_BITS_VARIABLE
bool
-config MIPS_CRC_SUPPORT
- bool
-
# R4600 erratum. Due to the lack of errata information the exact
# technical details aren't known. I've experimentally found that disabling
# interrupts during indexed I-cache flushes seems to be sufficient to deal
@@ -2609,9 +2625,6 @@ config NUMA
config SYS_SUPPORTS_NUMA
bool
-config HAVE_ARCH_NODEDATA_EXTENSION
- bool
-
config RELOCATABLE
bool "Relocatable kernel"
depends on SYS_SUPPORTS_RELOCATABLE
@@ -2620,6 +2633,7 @@ config RELOCATABLE
CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
CPU_P5600 || CAVIUM_OCTEON_SOC || \
CPU_LOONGSON64
+ select ARCH_VMLINUX_NEEDS_RELOCS
help
This builds a kernel image that retains relocation information
so it can be loaded someplace besides the default 1MB.
@@ -2877,6 +2891,9 @@ config ARCH_SUPPORTS_KEXEC
config ARCH_SUPPORTS_CRASH_DUMP
def_bool y
+config ARCH_DEFAULT_CRASH_DUMP
+ def_bool y
+
config PHYSICAL_START
hex "Physical address where the kernel is loaded"
default "0xffffffff84000000"
@@ -2924,7 +2941,8 @@ config BUILTIN_DTB
bool
choice
- prompt "Kernel appended dtb support" if USE_OF
+ prompt "Kernel appended dtb support"
+ depends on USE_OF
default MIPS_NO_APPENDED_DTB
config MIPS_NO_APPENDED_DTB
@@ -2965,10 +2983,11 @@ choice
endchoice
choice
- prompt "Kernel command line type" if !CMDLINE_OVERRIDE
+ prompt "Kernel command line type"
+ depends on !CMDLINE_OVERRIDE
default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
- !MACH_LOONGSON64 && !MIPS_MALTA && \
- !CAVIUM_OCTEON_SOC
+ !MACH_LOONGSON64 && !MACH_LOONGSON32 && \
+ !MIPS_MALTA && !CAVIUM_OCTEON_SOC
default MIPS_CMDLINE_FROM_BOOTLOADER
config MIPS_CMDLINE_FROM_DTB