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Diffstat (limited to 'arch/mips/boot/dts/ralink/mt7628a.dtsi')
-rw-r--r--arch/mips/boot/dts/ralink/mt7628a.dtsi87
1 files changed, 46 insertions, 41 deletions
diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi b/arch/mips/boot/dts/ralink/mt7628a.dtsi
index 45bf96a3d17a..5d7a6cfa9e2b 100644
--- a/arch/mips/boot/dts/ralink/mt7628a.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi
@@ -1,4 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
@@ -16,11 +17,6 @@
};
};
- resetc: reset-controller {
- compatible = "ralink,rt2880-reset";
- #reset-cells = <1>;
- };
-
cpuintc: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;
@@ -36,9 +32,11 @@
#address-cells = <1>;
#size-cells = <1>;
- sysc: system-controller@0 {
- compatible = "ralink,mt7620a-sysc", "syscon";
+ sysc: syscon@0 {
+ compatible = "ralink,mt7628-sysc", "ralink,mt7688-sysc", "syscon";
reg = <0x0 0x60>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
pinmux: pinmux@60 {
@@ -51,98 +49,93 @@
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x1>;
- pinmux_gpio_gpio: pinmux_gpio_gpio {
+ pinmux_gpio_gpio: gpio-gpio-pins {
pinctrl-single,bits = <0x0 0x0 0x3>;
};
- pinmux_spi_cs1_cs: pinmux_spi_cs1_cs {
+ pinmux_spi_cs1_cs: spi-cs1-cs-pins {
pinctrl-single,bits = <0x0 0x0 0x30>;
};
- pinmux_i2s_gpio: pinmux_i2s_gpio {
+ pinmux_i2s_gpio: i2s-gpio-pins {
pinctrl-single,bits = <0x0 0x40 0xc0>;
};
- pinmux_uart0_uart: pinmux_uart0_uart0 {
+ pinmux_uart0_uart: uart0-uart0-pins {
pinctrl-single,bits = <0x0 0x0 0x300>;
};
- pinmux_sdmode_sdxc: pinmux_sdmode_sdxc {
+ pinmux_sdmode_sdxc: sdmode-sdxc-pins {
pinctrl-single,bits = <0x0 0x0 0xc00>;
};
- pinmux_sdmode_gpio: pinmux_sdmode_gpio {
+ pinmux_sdmode_gpio: sdmode-gpio-pins {
pinctrl-single,bits = <0x0 0x400 0xc00>;
};
- pinmux_spi_spi: pinmux_spi_spi {
+ pinmux_spi_spi: spi-spi-pins {
pinctrl-single,bits = <0x0 0x0 0x1000>;
};
- pinmux_refclk_gpio: pinmux_refclk_gpio {
+ pinmux_refclk_gpio: refclk-gpio-pins {
pinctrl-single,bits = <0x0 0x40000 0x40000>;
};
- pinmux_i2c_i2c: pinmux_i2c_i2c {
+ pinmux_i2c_i2c: i2c-i2c-pins {
pinctrl-single,bits = <0x0 0x0 0x300000>;
};
- pinmux_uart1_uart: pinmux_uart1_uart1 {
+ pinmux_uart1_uart: uart1-uart1-pins {
pinctrl-single,bits = <0x0 0x0 0x3000000>;
};
- pinmux_uart2_uart: pinmux_uart2_uart {
+ pinmux_uart2_uart: uart2-uart-pins {
pinctrl-single,bits = <0x0 0x0 0xc000000>;
};
- pinmux_pwm0_pwm: pinmux_pwm0_pwm {
+ pinmux_pwm0_pwm: pwm0-pwm-pins {
pinctrl-single,bits = <0x0 0x0 0x30000000>;
};
- pinmux_pwm0_gpio: pinmux_pwm0_gpio {
+ pinmux_pwm0_gpio: pwm0-gpio-pins {
pinctrl-single,bits = <0x0 0x10000000
0x30000000>;
};
- pinmux_pwm1_pwm: pinmux_pwm1_pwm {
+ pinmux_pwm1_pwm: pwm1-pwm-pins {
pinctrl-single,bits = <0x0 0x0 0xc0000000>;
};
- pinmux_pwm1_gpio: pinmux_pwm1_gpio {
+ pinmux_pwm1_gpio: pwm1-gpio-pins {
pinctrl-single,bits = <0x0 0x40000000
0xc0000000>;
};
- pinmux_p0led_an_gpio: pinmux_p0led_an_gpio {
+ pinmux_p0led_an_gpio: p0led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x4 0xc>;
};
- pinmux_p1led_an_gpio: pinmux_p1led_an_gpio {
+ pinmux_p1led_an_gpio: p1led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x10 0x30>;
};
- pinmux_p2led_an_gpio: pinmux_p2led_an_gpio {
+ pinmux_p2led_an_gpio: p2led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x40 0xc0>;
};
- pinmux_p3led_an_gpio: pinmux_p3led_an_gpio {
+ pinmux_p3led_an_gpio: p3led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x100 0x300>;
};
- pinmux_p4led_an_gpio: pinmux_p4led_an_gpio {
+ pinmux_p4led_an_gpio: p4led-an-gpio-pins {
pinctrl-single,bits = <0x4 0x400 0xc00>;
};
};
watchdog: watchdog@100 {
compatible = "mediatek,mt7621-wdt";
- reg = <0x100 0x30>;
-
- resets = <&resetc 8>;
- reset-names = "wdt";
-
- interrupt-parent = <&intc>;
- interrupts = <24>;
+ reg = <0x100 0x100>;
+ mediatek,sysctl = <&sysc>;
status = "disabled";
};
@@ -154,7 +147,7 @@
interrupt-controller;
#interrupt-cells = <1>;
- resets = <&resetc 9>;
+ resets = <&sysc 9>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
@@ -190,7 +183,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinmux_spi_spi>;
- resets = <&resetc 18>;
+ clocks = <&sysc MT76X8_CLK_SPI1>;
+
+ resets = <&sysc 18>;
reset-names = "spi";
#address-cells = <1>;
@@ -206,7 +201,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinmux_i2c_i2c>;
- resets = <&resetc 16>;
+ clocks = <&sysc MT76X8_CLK_I2C>;
+
+ resets = <&sysc 16>;
reset-names = "i2c";
#address-cells = <1>;
@@ -222,7 +219,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart0_uart>;
- resets = <&resetc 12>;
+ clocks = <&sysc MT76X8_CLK_UART0>;
+
+ resets = <&sysc 12>;
reset-names = "uart0";
interrupt-parent = <&intc>;
@@ -238,7 +237,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1_uart>;
- resets = <&resetc 19>;
+ clocks = <&sysc MT76X8_CLK_UART1>;
+
+ resets = <&sysc 19>;
reset-names = "uart1";
interrupt-parent = <&intc>;
@@ -254,7 +255,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart2_uart>;
- resets = <&resetc 20>;
+ clocks = <&sysc MT76X8_CLK_UART2>;
+
+ resets = <&sysc 20>;
reset-names = "uart2";
interrupt-parent = <&intc>;
@@ -271,7 +274,7 @@
#phy-cells = <0>;
ralink,sysctl = <&sysc>;
- resets = <&resetc 22 &resetc 25>;
+ resets = <&sysc 22 &sysc 25>;
reset-names = "host", "device";
};
@@ -290,6 +293,8 @@
compatible = "mediatek,mt7628-wmac";
reg = <0x10300000 0x100000>;
+ clocks = <&sysc MT76X8_CLK_WMAC>;
+
interrupt-parent = <&cpuintc>;
interrupts = <6>;