diff options
Diffstat (limited to 'arch/mips/dec/ioasic-irq.c')
| -rw-r--r-- | arch/mips/dec/ioasic-irq.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index e04d973ce5aa..971f7b46759b 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -1,12 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * DEC I/O ASIC interrupts. * * Copyright (c) 2002, 2003, 2013 Maciej W. Rozycki - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. */ #include <linux/init.h> @@ -72,13 +68,13 @@ static struct irq_chip ioasic_dma_irq_type = { * I/O ASIC implements two kinds of DMA interrupts, informational and * error interrupts. * - * The formers do not stop DMA and should be cleared as soon as possible + * The former do not stop DMA and should be cleared as soon as possible * so that if they retrigger before the handler has completed, usually as * a side effect of actions taken by the handler, then they are reissued. * These use the `handle_edge_irq' handler that clears the request right * away. * - * The latters stop DMA and do not resume it until the interrupt has been + * The latter stop DMA and do not resume it until the interrupt has been * cleared. This cannot be done until after a corrective action has been * taken and this also means they will not retrigger. Therefore they use * the `handle_fasteoi_irq' handler that only clears the request on the |