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Diffstat (limited to 'arch/riscv/Kconfig.socs')
| -rw-r--r-- | arch/riscv/Kconfig.socs | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs new file mode 100644 index 000000000000..d621b85dd63b --- /dev/null +++ b/arch/riscv/Kconfig.socs @@ -0,0 +1,114 @@ +menu "SoC selection" + +config ARCH_ANDES + bool "Andes SoCs" + depends on MMU && !XIP_KERNEL + select ERRATA_ANDES + help + This enables support for Andes SoC platform hardware. + +config ARCH_ANLOGIC + bool "Anlogic SoCs" + help + This enables support for Anlogic SoC platform hardware. + +config ARCH_ESWIN + bool "ESWIN SoCs" + help + This enables support for ESWIN SoC platform hardware, + including the ESWIN EIC7700 SoC. + +config ARCH_MICROCHIP_POLARFIRE + def_bool ARCH_MICROCHIP + +config ARCH_MICROCHIP + bool "Microchip SoCs" + help + This enables support for Microchip SoC platforms. + +config ARCH_RENESAS + bool "Renesas RISC-V SoCs" + help + This enables support for the RISC-V based Renesas SoCs. + +config ARCH_SIFIVE + bool "SiFive SoCs" + select ERRATA_SIFIVE if !XIP_KERNEL + help + This enables support for SiFive SoC platform hardware. + +config ARCH_SOPHGO + bool "Sophgo SoCs" + help + This enables support for Sophgo SoC platform hardware. + +config ARCH_SPACEMIT + bool "SpacemiT SoCs" + select PINCTRL + help + This enables support for SpacemiT SoC platform hardware. + +config ARCH_STARFIVE + def_bool SOC_STARFIVE + +config SOC_STARFIVE + bool "StarFive SoCs" + select PINCTRL + select RESET_CONTROLLER + select ARM_AMBA + help + This enables support for StarFive SoC platform hardware. + +config ARCH_SUNXI + bool "Allwinner sun20i SoCs" + depends on MMU && !XIP_KERNEL + select ERRATA_THEAD + select SUN4I_TIMER + help + This enables support for Allwinner sun20i platform hardware, + including boards based on the D1 and D1s SoCs. + +config ARCH_TENSTORRENT + bool "Tenstorrent SoCs" + help + This enables support for Tenstorrent SoC platforms. + Current support is for Blackhole P100 and P150 PCIe cards. + The Blackhole SoC contains four RISC-V CPU tiles each + consisting of 4x SiFive X280 cores. + +config ARCH_THEAD + bool "T-HEAD RISC-V SoCs" + depends on MMU && !XIP_KERNEL + select ERRATA_THEAD + select PM_GENERIC_DOMAINS if PM + help + This enables support for the RISC-V based T-HEAD SoCs. + +config ARCH_VIRT + bool "QEMU Virt Machine" + select POWER_RESET + select POWER_RESET_SYSCON + select POWER_RESET_SYSCON_POWEROFF + select GOLDFISH + select RTC_DRV_GOLDFISH if RTC_CLASS + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF + select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI + help + This enables support for QEMU Virt Machine. + +config ARCH_CANAAN + bool "Canaan Kendryte SoC" + help + This enables support for Canaan Kendryte series SoC platform hardware. + +config SOC_CANAAN_K210 + bool "Canaan Kendryte K210 SoC" + depends on !MMU && ARCH_CANAAN + select ARCH_HAS_RESET_CONTROLLER + select PINCTRL + select COMMON_CLK + help + This enables support for Canaan Kendryte K210 SoC platform hardware. + +endmenu # "SoC selection" |