diff options
Diffstat (limited to 'arch/xtensa/Kconfig')
| -rw-r--r-- | arch/xtensa/Kconfig | 614 |
1 files changed, 432 insertions, 182 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 20a0756f27ef..f2f9cd9cde50 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -1,40 +1,63 @@ # SPDX-License-Identifier: GPL-2.0 config XTENSA def_bool y - select ARCH_HAS_SYNC_DMA_FOR_CPU - select ARCH_HAS_SYNC_DMA_FOR_DEVICE - select ARCH_NO_COHERENT_DMA_MMAP if !MMU - select ARCH_WANT_FRAME_POINTERS + select ARCH_32BIT_OFF_T + select ARCH_HAS_CPU_CACHE_ALIASING + select ARCH_HAS_BINFMT_FLAT if !MMU + select ARCH_HAS_CURRENT_STACK_POINTER + select ARCH_HAS_DEBUG_VM_PGTABLE + select ARCH_HAS_DMA_PREP_COHERENT if MMU + select ARCH_HAS_GCOV_PROFILE_ALL + select ARCH_HAS_KCOV + select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU + select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU + select ARCH_HAS_DMA_SET_UNCACHED if MMU + select ARCH_HAS_STRNCPY_FROM_USER if !KASAN + select ARCH_HAS_STRNLEN_USER + select ARCH_NEED_CMPXCHG_1_EMU + select ARCH_USE_MEMTEST + select ARCH_USE_QUEUED_RWLOCKS + select ARCH_USE_QUEUED_SPINLOCKS select ARCH_WANT_IPC_PARSE_VERSION - select BUILDTIME_EXTABLE_SORT + select BUILDTIME_TABLE_SORT + select GENERIC_BUILTIN_DTB select CLONE_BACKWARDS select COMMON_CLK - select DMA_REMAP if MMU + select DMA_NONCOHERENT_MMAP if MMU select GENERIC_ATOMIC64 - select GENERIC_CLOCKEVENTS select GENERIC_IRQ_SHOW + select GENERIC_LIB_CMPDI2 + select GENERIC_LIB_MULDI3 + select GENERIC_LIB_UCMPDI2 select GENERIC_PCI_IOMAP select GENERIC_SCHED_CLOCK - select GENERIC_STRNCPY_FROM_USER if KASAN - select HAVE_ARCH_JUMP_LABEL - select HAVE_ARCH_KASAN if MMU + select GENERIC_IOREMAP if MMU + select HAVE_ARCH_AUDITSYSCALL + select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL + select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL + select HAVE_ARCH_KCSAN + select HAVE_ARCH_SECCOMP_FILTER select HAVE_ARCH_TRACEHOOK + select HAVE_ASM_MODVERSIONS + select HAVE_CONTEXT_TRACKING_USER select HAVE_DEBUG_KMEMLEAK select HAVE_DMA_CONTIGUOUS select HAVE_EXIT_THREAD select HAVE_FUNCTION_TRACER - select HAVE_FUTEX_CMPXCHG if !MMU + select HAVE_GCC_PLUGINS if GCC_VERSION >= 120000 select HAVE_HW_BREAKPOINT if PERF_EVENTS select HAVE_IRQ_TIME_ACCOUNTING - select HAVE_OPROFILE + select HAVE_PAGE_SIZE_4KB select HAVE_PCI select HAVE_PERF_EVENTS select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS + select HAVE_VIRT_CPU_ACCOUNTING_GEN select IRQ_DOMAIN + select LOCK_MM_AND_FIND_VMA select MODULES_USE_ELF_RELA select PERF_USE_VMALLOC - select VIRT_TO_BUS + select TRACE_IRQFLAGS_SUPPORT help Xtensa processors are 32-bit RISC machines designed by Tensilica primarily for embedded systems. These processors are both @@ -43,9 +66,6 @@ config XTENSA with reasonable minimum requirements. The Xtensa Linux project has a home page at <http://www.linux-xtensa.org/>. -config RWSEM_XCHGADD_ALGORITHM - def_bool y - config GENERIC_HWEIGHT def_bool y @@ -55,6 +75,9 @@ config ARCH_HAS_ILOG2_U32 config ARCH_HAS_ILOG2_U64 def_bool n +config ARCH_MTD_XIP + def_bool y + config NO_IOPORT_MAP def_bool n @@ -68,11 +91,9 @@ config LOCKDEP_SUPPORT config STACKTRACE_SUPPORT def_bool y -config TRACE_IRQFLAGS_SUPPORT - def_bool y - config MMU def_bool n + select PFAULT config HAVE_XTENSA_GPIO32 def_bool n @@ -81,6 +102,15 @@ config KASAN_SHADOW_OFFSET hex default 0x6e400000 +config CPU_BIG_ENDIAN + def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1) + +config CPU_LITTLE_ENDIAN + def_bool !CPU_BIG_ENDIAN + +config CC_HAVE_CALL0_ABI + def_bool $(success,test "$(shell,echo __XTENSA_CALL0_ABI__ | $(CC) -mabi=call0 -E -P - 2>/dev/null)" = 1) + menu "Processor type and features" choice @@ -118,8 +148,8 @@ config XTENSA_VARIANT_CUSTOM_NAME depends on XTENSA_VARIANT_CUSTOM help Provide the name of a custom Xtensa processor variant. - This CORENAME selects arch/xtensa/variant/CORENAME. - Dont forget you have to select MMU if you have one. + This CORENAME selects arch/xtensa/variants/CORENAME. + Don't forget you have to select MMU if you have one. config XTENSA_VARIANT_NAME string @@ -163,8 +193,18 @@ config XTENSA_FAKE_NMI If unsure, say N. +config PFAULT + bool "Handle protection faults" if EXPERT && !MMU + default y + help + Handle protection faults. MMU configurations must enable it. + noMMU configurations may disable it if used memory map never + generates protection faults or faults are always fatal. + + If unsure, say Y. + config XTENSA_UNALIGNED_USER - bool "Unaligned memory access in use space" + bool "Unaligned memory access in user space" help The Xtensa architecture currently does not handle unaligned memory accesses in hardware but through an exception handler. @@ -172,16 +212,28 @@ config XTENSA_UNALIGNED_USER Say Y here to enable unaligned memory access in user space. +config XTENSA_LOAD_STORE + bool "Load/store exception handler for memory only readable with l32" + help + The Xtensa architecture only allows reading memory attached to its + instruction bus with l32r and l32i instructions, all other + instructions raise an exception with the LoadStoreErrorCause code. + This makes it hard to use some configurations, e.g. store string + literals in FLASH memory attached to the instruction bus. + + Say Y here to enable exception handler that allows transparent + byte and 2-byte access to memory attached to instruction bus. + config HAVE_SMP bool "System Supports SMP (MX)" depends on XTENSA_VARIANT_CUSTOM select XTENSA_MX help - This option is use to indicate that the system-on-a-chip (SOC) + This option is used to indicate that the system-on-a-chip (SOC) supports Multiprocessing. Multiprocessor support implemented above the CPU core definition and currently needs to be selected manually. - Multiprocessor support in implemented with external cache and + Multiprocessor support is implemented with external cache and interrupt controllers. The MX interrupt distributer adds Interprocessor Interrupts @@ -213,162 +265,120 @@ config HOTPLUG_CPU Say N if you want to disable CPU hotplug. -config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX - bool "Initialize Xtensa MMU inside the Linux kernel code" - depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B - default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM +config SECONDARY_RESET_VECTOR + bool "Secondary cores use alternative reset vector" + default y + depends on HAVE_SMP help - Earlier version initialized the MMU in the exception vector - before jumping to _startup in head.S and had an advantage that - it was possible to place a software breakpoint at 'reset' and - then enter your normal kernel breakpoints once the MMU was mapped - to the kernel mappings (0XC0000000). - - This unfortunately won't work for U-Boot and likely also wont - work for using KEXEC to have a hot kernel ready for doing a - KDUMP. - - So now the MMU is initialized in head.S but it's necessary to - use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. - xt-gdb can't place a Software Breakpoint in the 0XD region prior - to mapping the MMU and after mapping even if the area of low memory - was mapped gdb wouldn't remove the breakpoint on hitting it as the - PC wouldn't match. Since Hardware Breakpoints are recommended for - Linux configurations it seems reasonable to just assume they exist - and leave this older mechanism for unfortunate souls that choose - not to follow Tensilica's recommendation. - - Selecting this will cause U-Boot to set the KERNEL Load and Entry - address at 0x00003000 instead of the mapped std of 0xD0003000. - - If in doubt, say Y. + Secondary cores may be configured to use alternative reset vector, + or all cores may use primary reset vector. + Say Y here to supply handler for the alternative reset location. -config MEMMAP_CACHEATTR - hex "Cache attributes for the memory address space" - depends on !MMU - default 0x22222222 +config FAST_SYSCALL_XTENSA + bool "Enable fast atomic syscalls" + default n help - These cache attributes are set up for noMMU systems. Each hex digit - specifies cache attributes for the corresponding 512MB memory - region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, - bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. - - Cache attribute values are specific for the MMU type, so e.g. - for region protection MMUs: 2 is cache bypass, 4 is WB cached, - 1 is WT cached, f is illegal. For ful MMU: bit 0 makes it executable, - bit 1 makes it writable, bits 2..3 meaning is 0: cache bypass, - 1: WB cache, 2: WT cache, 3: special (c and e are illegal, f is - reserved). + fast_syscall_xtensa is a syscall that can make atomic operations + on UP kernel when processor has no s32c1i support. -config KSEG_PADDR - hex "Physical address of the KSEG mapping" - depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU - default 0x00000000 - help - This is the physical address where KSEG is mapped. Please refer to - the chosen KSEG layout help for the required address alignment. - Unpacked kernel image (including vectors) must be located completely - within KSEG. - Physical memory below this address is not available to linux. + This syscall is deprecated. It may have issues when called with + invalid arguments. It is provided only for backwards compatibility. + Only enable it if your userspace software requires it. - If unsure, leave the default value here. + If unsure, say N. -config KERNEL_LOAD_ADDRESS - hex "Kernel load address" - default 0x60003000 if !MMU - default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX - default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX +config FAST_SYSCALL_SPILL_REGISTERS + bool "Enable spill registers syscall" + default n help - This is the address where the kernel is loaded. - It is virtual address for MMUv2 configurations and physical address - for all other configurations. - - If unsure, leave the default value here. + fast_syscall_spill_registers is a syscall that spills all active + register windows of a calling userspace task onto its stack. -config VECTORS_OFFSET - hex "Kernel vectors offset" - default 0x00003000 - help - This is the offset of the kernel image from the relocatable vectors - base. + This syscall is deprecated. It may have issues when called with + invalid arguments. It is provided only for backwards compatibility. + Only enable it if your userspace software requires it. - If unsure, leave the default value here. + If unsure, say N. choice - prompt "KSEG layout" - depends on MMU - default XTENSA_KSEG_MMU_V2 - -config XTENSA_KSEG_MMU_V2 - bool "MMUv2: 128MB cached + 128MB uncached" + prompt "Kernel ABI" + default KERNEL_ABI_DEFAULT help - MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting - at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 - without cache. - KSEG_PADDR must be aligned to 128MB. + Select ABI for the kernel code. This ABI is independent of the + supported userspace ABI and any combination of the + kernel/userspace ABI is possible and should work. -config XTENSA_KSEG_256M - bool "256MB cached + 256MB uncached" - depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + In case both kernel and userspace support only call0 ABI + all register windows support code will be omitted from the + build. + + If unsure, choose the default ABI. + +config KERNEL_ABI_DEFAULT + bool "Default ABI" help - TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 - with cache and to 0xc0000000 without cache. - KSEG_PADDR must be aligned to 256MB. + Select this option to compile kernel code with the default ABI + selected for the toolchain. + Normally cores with windowed registers option use windowed ABI and + cores without it use call0 ABI. -config XTENSA_KSEG_512M - bool "512MB cached + 512MB uncached" - depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX +config KERNEL_ABI_CALL0 + bool "Call0 ABI" if CC_HAVE_CALL0_ABI help - TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 - with cache and to 0xc0000000 without cache. - KSEG_PADDR must be aligned to 256MB. + Select this option to compile kernel code with call0 ABI even with + toolchain that defaults to windowed ABI. + When this option is not selected the default toolchain ABI will + be used for the kernel code. endchoice -config HIGHMEM - bool "High Memory Support" - depends on MMU - help - Linux can use the full amount of RAM in the system by - default. However, the default MMUv2 setup only maps the - lowermost 128 MB of memory linearly to the areas starting - at 0xd0000000 (cached) and 0xd8000000 (uncached). - When there are more than 128 MB memory in the system not - all of it can be "permanently mapped" by the kernel. - The physical memory that's not permanently mapped is called - "high memory". +config USER_ABI_CALL0 + bool - If you are compiling a kernel which will never run on a - machine with more than 128 MB total physical RAM, answer - N here. +choice + prompt "Userspace ABI" + default USER_ABI_DEFAULT + help + Select supported userspace ABI. - If unsure, say Y. + If unsure, choose the default ABI. -config FAST_SYSCALL_XTENSA - bool "Enable fast atomic syscalls" - default n +config USER_ABI_DEFAULT + bool "Default ABI only" help - fast_syscall_xtensa is a syscall that can make atomic operations - on UP kernel when processor has no s32c1i support. + Assume default userspace ABI. For XEA2 cores it is windowed ABI. + call0 ABI binaries may be run on such kernel, but signal delivery + will not work correctly for them. - This syscall is deprecated. It may have issues when called with - invalid arguments. It is provided only for backwards compatibility. - Only enable it if your userspace software requires it. +config USER_ABI_CALL0_ONLY + bool "Call0 ABI only" + select USER_ABI_CALL0 + help + Select this option to support only call0 ABI in userspace. + Windowed ABI binaries will crash with a segfault caused by + an illegal instruction exception on the first 'entry' opcode. - If unsure, say N. + Choose this option if you're planning to run only user code + built with call0 ABI. -config FAST_SYSCALL_SPILL_REGISTERS - bool "Enable spill registers syscall" - default n +config USER_ABI_CALL0_PROBE + bool "Support both windowed and call0 ABI by probing" + select USER_ABI_CALL0 help - fast_syscall_spill_registers is a syscall that spills all active - register windows of a calling userspace task onto its stack. + Select this option to support both windowed and call0 userspace + ABIs. When enabled all processes are started with PS.WOE disabled + and a fast user exception handler for an illegal instruction is + used to turn on PS.WOE bit on the first 'entry' opcode executed by + the userspace. - This syscall is deprecated. It may have issues when called with - invalid arguments. It is provided only for backwards compatibility. - Only enable it if your userspace software requires it. + This option should be enabled for the kernel that must support + both call0 and windowed ABIs in userspace at the same time. - If unsure, say N. + Note that Xtensa ISA does not guarantee that entry opcode will + raise an illegal instruction exception on cores with XEA2 when + PS.WOE is disabled, check whether the target core supports it. + +endchoice endmenu @@ -382,6 +392,9 @@ config XTENSA_CALIBRATE_CCOUNT config SERIAL_CONSOLE def_bool n +config PLATFORM_HAVE_XIP + def_bool n + menu "Platform options" choice @@ -397,7 +410,6 @@ config XTENSA_PLATFORM_ISS config XTENSA_PLATFORM_XT2000 bool "XT2000" - select HAVE_IDE help XT2000 is the name of Tensilica's feature-rich emulation platform. This hardware is capable of running a full Linux distribution. @@ -408,6 +420,7 @@ config XTENSA_PLATFORM_XTFPGA select PLATFORM_WANT_DEFAULT_MEM if !MMU select SERIAL_CONSOLE select XTENSA_CALIBRATE_CCOUNT + select PLATFORM_HAVE_XIP help XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605). This hardware is capable of running a full Linux distribution. @@ -447,11 +460,10 @@ config USE_OF bool "Flattened Device Tree support" select OF select OF_EARLY_FLATTREE - select OF_RESERVED_MEM help Include support for flattened device tree machine descriptions. -config BUILTIN_DTB +config BUILTIN_DTB_NAME string "DTB to build into the kernel image" depends on OF @@ -464,6 +476,28 @@ config PARSE_BOOTPARAM If unsure, say Y. +choice + prompt "Semihosting interface" + default XTENSA_SIMCALL_ISS + depends on XTENSA_PLATFORM_ISS + help + Choose semihosting interface that will be used for serial port, + block device and networking. + +config XTENSA_SIMCALL_ISS + bool "simcall" + help + Use simcall instruction. simcall is only available on simulators, + it does nothing on hardware. + +config XTENSA_SIMCALL_GDBIO + bool "GDBIO" + help + Use break instruction. It is available on real hardware when GDB + is attached to it via JTAG. + +endchoice + config BLK_DEV_SIMDISK tristate "Host file-based simulated block device support" default n @@ -500,34 +534,6 @@ config SIMDISK1_FILENAME Another simulated disk in a host file for a buildroot-independent storage. -config FORCE_MAX_ZONEORDER - int "Maximum zone order" - default "11" - help - The kernel memory allocator divides physically contiguous memory - blocks into "zones", where each zone is a power of two number of - pages. This option selects the largest power of two that the kernel - keeps in the memory allocator. If you need to allocate very large - blocks of physically contiguous memory, then you may need to - increase this value. - - This config option is actually maximum order plus one. For example, - a value of 11 means that the largest free memory block is 2^10 pages. - -config PLATFORM_WANT_DEFAULT_MEM - def_bool n - -config DEFAULT_MEM_START - hex - prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM - default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM - default 0x00000000 - help - This is the base address used for both PAGE_OFFSET and PHYS_OFFSET - in noMMU configurations. - - If unsure, leave the default value here. - config XTFPGA_LCD bool "Enable XTFPGA LCD driver" depends on XTENSA_PLATFORM_XTFPGA @@ -558,10 +564,254 @@ config XTFPGA_LCD_8BIT_ACCESS only be used with 8-bit interface. Please consult prototyping user guide for your board for the correct interface width. +comment "Kernel memory layout" + +config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + bool "Initialize Xtensa MMU inside the Linux kernel code" + depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B + default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM + help + Earlier version initialized the MMU in the exception vector + before jumping to _startup in head.S and had an advantage that + it was possible to place a software breakpoint at 'reset' and + then enter your normal kernel breakpoints once the MMU was mapped + to the kernel mappings (0XC0000000). + + This unfortunately won't work for U-Boot and likely also won't + work for using KEXEC to have a hot kernel ready for doing a + KDUMP. + + So now the MMU is initialized in head.S but it's necessary to + use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup. + xt-gdb can't place a Software Breakpoint in the 0XD region prior + to mapping the MMU and after mapping even if the area of low memory + was mapped gdb wouldn't remove the breakpoint on hitting it as the + PC wouldn't match. Since Hardware Breakpoints are recommended for + Linux configurations it seems reasonable to just assume they exist + and leave this older mechanism for unfortunate souls that choose + not to follow Tensilica's recommendation. + + Selecting this will cause U-Boot to set the KERNEL Load and Entry + address at 0x00003000 instead of the mapped std of 0xD0003000. + + If in doubt, say Y. + +config XIP_KERNEL + bool "Kernel Execute-In-Place from ROM" + depends on PLATFORM_HAVE_XIP + help + Execute-In-Place allows the kernel to run from non-volatile storage + directly addressable by the CPU, such as NOR flash. This saves RAM + space since the text section of the kernel is not loaded from flash + to RAM. Read-write sections, such as the data section and stack, + are still copied to RAM. The XIP kernel is not compressed since + it has to run directly from flash, so it will take more space to + store it. The flash address used to link the kernel object files, + and for storing it, is configuration dependent. Therefore, if you + say Y here, you must know the proper physical address where to + store the kernel image depending on your own flash memory usage. + + Also note that the make target becomes "make xipImage" rather than + "make Image" or "make uImage". The final kernel binary to put in + ROM memory will be arch/xtensa/boot/xipImage. + + If unsure, say N. + +config MEMMAP_CACHEATTR + hex "Cache attributes for the memory address space" + depends on !MMU + default 0x22222222 + help + These cache attributes are set up for noMMU systems. Each hex digit + specifies cache attributes for the corresponding 512MB memory + region: bits 0..3 -- for addresses 0x00000000..0x1fffffff, + bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on. + + Cache attribute values are specific for the MMU type. + For region protection MMUs: + 1: WT cached, + 2: cache bypass, + 4: WB cached, + f: illegal. + For full MMU: + bit 0: executable, + bit 1: writable, + bits 2..3: + 0: cache bypass, + 1: WB cache, + 2: WT cache, + 3: special (c and e are illegal, f is reserved). + For MPU: + 0: illegal, + 1: WB cache, + 2: WB, no-write-allocate cache, + 3: WT cache, + 4: cache bypass. + +config KSEG_PADDR + hex "Physical address of the KSEG mapping" + depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU + default 0x00000000 + help + This is the physical address where KSEG is mapped. Please refer to + the chosen KSEG layout help for the required address alignment. + Unpacked kernel image (including vectors) must be located completely + within KSEG. + Physical memory below this address is not available to linux. + + If unsure, leave the default value here. + +config KERNEL_VIRTUAL_ADDRESS + hex "Kernel virtual address" + depends on MMU && XIP_KERNEL + default 0xd0003000 + help + This is the virtual address where the XIP kernel is mapped. + XIP kernel may be mapped into KSEG or KIO region, virtual address + provided here must match kernel load address provided in + KERNEL_LOAD_ADDRESS. + +config KERNEL_LOAD_ADDRESS + hex "Kernel load address" + default 0x60003000 if !MMU + default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + help + This is the address where the kernel is loaded. + It is virtual address for MMUv2 configurations and physical address + for all other configurations. + + If unsure, leave the default value here. + +choice + prompt "Relocatable vectors location" + default XTENSA_VECTORS_IN_TEXT + help + Choose whether relocatable vectors are merged into the kernel .text + or placed separately at runtime. This option does not affect + configurations without VECBASE register where vectors are always + placed at their hardware-defined locations. + +config XTENSA_VECTORS_IN_TEXT + bool "Merge relocatable vectors into kernel text" + depends on !MTD_XIP + help + This option puts relocatable vectors into the kernel .text section + with proper alignment. + This is a safe choice for most configurations. + +config XTENSA_VECTORS_SEPARATE + bool "Put relocatable vectors at fixed address" + help + This option puts relocatable vectors at specific virtual address. + Vectors are merged with the .init data in the kernel image and + are copied into their designated location during kernel startup. + Use it to put vectors into IRAM or out of FLASH on kernels with + XIP-aware MTD support. + +endchoice + +config VECTORS_ADDR + hex "Kernel vectors virtual address" + default 0x00000000 + depends on XTENSA_VECTORS_SEPARATE + help + This is the virtual address of the (relocatable) vectors base. + It must be within KSEG if MMU is used. + +config XIP_DATA_ADDR + hex "XIP kernel data virtual address" + depends on XIP_KERNEL + default 0x00000000 + help + This is the virtual address where XIP kernel data is copied. + It must be within KSEG if MMU is used. + +config PLATFORM_WANT_DEFAULT_MEM + def_bool n + +config DEFAULT_MEM_START + hex + prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM + default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM + default 0x00000000 + help + This is the base address used for both PAGE_OFFSET and PHYS_OFFSET + in noMMU configurations. + + If unsure, leave the default value here. + +choice + prompt "KSEG layout" + depends on MMU + default XTENSA_KSEG_MMU_V2 + +config XTENSA_KSEG_MMU_V2 + bool "MMUv2: 128MB cached + 128MB uncached" + help + MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting + at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000 + without cache. + KSEG_PADDR must be aligned to 128MB. + +config XTENSA_KSEG_256M + bool "256MB cached + 256MB uncached" + depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + help + TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000 + with cache and to 0xc0000000 without cache. + KSEG_PADDR must be aligned to 256MB. + +config XTENSA_KSEG_512M + bool "512MB cached + 512MB uncached" + depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX + help + TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000 + with cache and to 0xc0000000 without cache. + KSEG_PADDR must be aligned to 256MB. + +endchoice + +config HIGHMEM + bool "High Memory Support" + depends on MMU + select KMAP_LOCAL + help + Linux can use the full amount of RAM in the system by + default. However, the default MMUv2 setup only maps the + lowermost 128 MB of memory linearly to the areas starting + at 0xd0000000 (cached) and 0xd8000000 (uncached). + When there are more than 128 MB memory in the system not + all of it can be "permanently mapped" by the kernel. + The physical memory that's not permanently mapped is called + "high memory". + + If you are compiling a kernel which will never run on a + machine with more than 128 MB total physical RAM, answer + N here. + + If unsure, say Y. + +config ARCH_FORCE_MAX_ORDER + int "Order of maximal physically contiguous allocations" + default "10" + help + The kernel page allocator limits the size of maximal physically + contiguous allocations. The limit is called MAX_PAGE_ORDER and it + defines the maximal power of two of number of pages that can be + allocated as a single contiguous block. This option allows + overriding the default setting when ability to allocate very + large blocks of physically contiguous memory is required. + + Don't change if unsure. + endmenu menu "Power management options" +config ARCH_HIBERNATION_POSSIBLE + def_bool y + source "kernel/power/Kconfig" endmenu |