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path: root/drivers/accel/habanalabs/goya/goya_coresight.c
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Diffstat (limited to 'drivers/accel/habanalabs/goya/goya_coresight.c')
-rw-r--r--drivers/accel/habanalabs/goya/goya_coresight.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/accel/habanalabs/goya/goya_coresight.c b/drivers/accel/habanalabs/goya/goya_coresight.c
index a6d6cc38bcd8..41cae5fd843b 100644
--- a/drivers/accel/habanalabs/goya/goya_coresight.c
+++ b/drivers/accel/habanalabs/goya/goya_coresight.c
@@ -315,6 +315,11 @@ static int goya_config_etf(struct hl_device *hdev,
WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);
+ val = RREG32(base_reg + 0x20);
+
+ if ((!params->enable && val == 0x0) || (params->enable && val != 0x0))
+ return 0;
+
val = RREG32(base_reg + 0x304);
val |= 0x1000;
WREG32(base_reg + 0x304, val);
@@ -386,6 +391,11 @@ static int goya_config_etr(struct hl_device *hdev,
WREG32(mmPSOC_ETR_LAR, CORESIGHT_UNLOCK);
+ val = RREG32(mmPSOC_ETR_CTL);
+
+ if ((!params->enable && val == 0x0) || (params->enable && val != 0x0))
+ return 0;
+
val = RREG32(mmPSOC_ETR_FFCR);
val |= 0x1000;
WREG32(mmPSOC_ETR_FFCR, val);