diff options
Diffstat (limited to 'drivers/amba/tegra-ahb.c')
| -rw-r--r-- | drivers/amba/tegra-ahb.c | 116 |
1 files changed, 57 insertions, 59 deletions
diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index 1f44e56cc65d..f23c3ed01810 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. * Copyright (C) 2011 Google, Inc. @@ -8,16 +9,6 @@ * Benoit Goby <benoit@android.com> * Colin Cross <ccross@android.com> * Hiroshi DOYU <hdoyu@nvidia.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #include <linux/err.h> @@ -25,48 +16,50 @@ #include <linux/module.h> #include <linux/platform_device.h> #include <linux/io.h> -#include <linux/tegra-ahb.h> +#include <linux/of.h> + +#include <soc/tegra/ahb.h> #define DRV_NAME "tegra-ahb" -#define AHB_ARBITRATION_DISABLE 0x00 -#define AHB_ARBITRATION_PRIORITY_CTRL 0x04 +#define AHB_ARBITRATION_DISABLE 0x04 +#define AHB_ARBITRATION_PRIORITY_CTRL 0x08 #define AHB_PRIORITY_WEIGHT(x) (((x) & 0x7) << 29) #define PRIORITY_SELECT_USB BIT(6) #define PRIORITY_SELECT_USB2 BIT(18) #define PRIORITY_SELECT_USB3 BIT(17) -#define AHB_GIZMO_AHB_MEM 0x0c +#define AHB_GIZMO_AHB_MEM 0x10 #define ENB_FAST_REARBITRATE BIT(2) #define DONT_SPLIT_AHB_WR BIT(7) -#define AHB_GIZMO_APB_DMA 0x10 -#define AHB_GIZMO_IDE 0x18 -#define AHB_GIZMO_USB 0x1c -#define AHB_GIZMO_AHB_XBAR_BRIDGE 0x20 -#define AHB_GIZMO_CPU_AHB_BRIDGE 0x24 -#define AHB_GIZMO_COP_AHB_BRIDGE 0x28 -#define AHB_GIZMO_XBAR_APB_CTLR 0x2c -#define AHB_GIZMO_VCP_AHB_BRIDGE 0x30 -#define AHB_GIZMO_NAND 0x3c -#define AHB_GIZMO_SDMMC4 0x44 -#define AHB_GIZMO_XIO 0x48 -#define AHB_GIZMO_BSEV 0x60 -#define AHB_GIZMO_BSEA 0x70 -#define AHB_GIZMO_NOR 0x74 -#define AHB_GIZMO_USB2 0x78 -#define AHB_GIZMO_USB3 0x7c +#define AHB_GIZMO_APB_DMA 0x14 +#define AHB_GIZMO_IDE 0x1c +#define AHB_GIZMO_USB 0x20 +#define AHB_GIZMO_AHB_XBAR_BRIDGE 0x24 +#define AHB_GIZMO_CPU_AHB_BRIDGE 0x28 +#define AHB_GIZMO_COP_AHB_BRIDGE 0x2c +#define AHB_GIZMO_XBAR_APB_CTLR 0x30 +#define AHB_GIZMO_VCP_AHB_BRIDGE 0x34 +#define AHB_GIZMO_NAND 0x40 +#define AHB_GIZMO_SDMMC4 0x48 +#define AHB_GIZMO_XIO 0x4c +#define AHB_GIZMO_BSEV 0x64 +#define AHB_GIZMO_BSEA 0x74 +#define AHB_GIZMO_NOR 0x78 +#define AHB_GIZMO_USB2 0x7c +#define AHB_GIZMO_USB3 0x80 #define IMMEDIATE BIT(18) -#define AHB_GIZMO_SDMMC1 0x80 -#define AHB_GIZMO_SDMMC2 0x84 -#define AHB_GIZMO_SDMMC3 0x88 -#define AHB_MEM_PREFETCH_CFG_X 0xd8 -#define AHB_ARBITRATION_XBAR_CTRL 0xdc -#define AHB_MEM_PREFETCH_CFG3 0xe0 -#define AHB_MEM_PREFETCH_CFG4 0xe4 -#define AHB_MEM_PREFETCH_CFG1 0xec -#define AHB_MEM_PREFETCH_CFG2 0xf0 +#define AHB_GIZMO_SDMMC1 0x84 +#define AHB_GIZMO_SDMMC2 0x88 +#define AHB_GIZMO_SDMMC3 0x8c +#define AHB_MEM_PREFETCH_CFG_X 0xdc +#define AHB_ARBITRATION_XBAR_CTRL 0xe0 +#define AHB_MEM_PREFETCH_CFG3 0xe4 +#define AHB_MEM_PREFETCH_CFG4 0xe8 +#define AHB_MEM_PREFETCH_CFG1 0xf0 +#define AHB_MEM_PREFETCH_CFG2 0xf4 #define PREFETCH_ENB BIT(31) #define MST_ID(x) (((x) & 0x1f) << 26) #define AHBDMA_MST_ID MST_ID(5) @@ -76,10 +69,20 @@ #define ADDR_BNDRY(x) (((x) & 0xf) << 21) #define INACTIVITY_TIMEOUT(x) (((x) & 0xffff) << 0) -#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xf8 +#define AHB_ARBITRATION_AHB_MEM_WRQUE_MST_ID 0xfc #define AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE BIT(17) +/* + * INCORRECT_BASE_ADDR_LOW_BYTE: Legacy kernel DT files for Tegra SoCs + * prior to Tegra124 generally use a physical base address ending in + * 0x4 for the AHB IP block. According to the TRM, the low byte + * should be 0x0. During device probing, this macro is used to detect + * whether the passed-in physical address is incorrect, and if so, to + * correct it. + */ +#define INCORRECT_BASE_ADDR_LOW_BYTE 0x4 + static struct platform_driver tegra_ahb_driver; static const u32 tegra_ahb_gizmo[] = { @@ -117,7 +120,7 @@ static const u32 tegra_ahb_gizmo[] = { struct tegra_ahb { void __iomem *regs; struct device *dev; - u32 ctx[0]; + u32 ctx[]; }; static inline u32 gizmo_readl(struct tegra_ahb *ahb, u32 offset) @@ -131,25 +134,17 @@ static inline void gizmo_writel(struct tegra_ahb *ahb, u32 value, u32 offset) } #ifdef CONFIG_TEGRA_IOMMU_SMMU -static int tegra_ahb_match_by_smmu(struct device *dev, void *data) -{ - struct tegra_ahb *ahb = dev_get_drvdata(dev); - struct device_node *dn = data; - - return (ahb->dev->of_node == dn) ? 1 : 0; -} - int tegra_ahb_enable_smmu(struct device_node *dn) { struct device *dev; u32 val; struct tegra_ahb *ahb; - dev = driver_find_device(&tegra_ahb_driver.driver, NULL, dn, - tegra_ahb_match_by_smmu); + dev = driver_find_device_by_of_node(&tegra_ahb_driver.driver, dn); if (!dev) return -EPROBE_DEFER; ahb = dev_get_drvdata(dev); + put_device(dev); val = gizmo_readl(ahb, AHB_ARBITRATION_XBAR_CTRL); val |= AHB_ARBITRATION_XBAR_CTRL_SMMU_INIT_DONE; gizmo_writel(ahb, val, AHB_ARBITRATION_XBAR_CTRL); @@ -158,8 +153,7 @@ int tegra_ahb_enable_smmu(struct device_node *dn) EXPORT_SYMBOL(tegra_ahb_enable_smmu); #endif -#ifdef CONFIG_PM -static int tegra_ahb_suspend(struct device *dev) +static int __maybe_unused tegra_ahb_suspend(struct device *dev) { int i; struct tegra_ahb *ahb = dev_get_drvdata(dev); @@ -169,7 +163,7 @@ static int tegra_ahb_suspend(struct device *dev) return 0; } -static int tegra_ahb_resume(struct device *dev) +static int __maybe_unused tegra_ahb_resume(struct device *dev) { int i; struct tegra_ahb *ahb = dev_get_drvdata(dev); @@ -178,7 +172,6 @@ static int tegra_ahb_resume(struct device *dev) gizmo_writel(ahb, ahb->ctx[i], tegra_ahb_gizmo[i]); return 0; } -#endif static UNIVERSAL_DEV_PM_OPS(tegra_ahb_pm, tegra_ahb_suspend, @@ -256,8 +249,15 @@ static int tegra_ahb_probe(struct platform_device *pdev) return -ENOMEM; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; + + /* Correct the IP block base address if necessary */ + if (res && + (res->start & INCORRECT_BASE_ADDR_LOW_BYTE) == + INCORRECT_BASE_ADDR_LOW_BYTE) { + dev_warn(&pdev->dev, "incorrect AHB base address in DT data - enabling workaround\n"); + res->start -= INCORRECT_BASE_ADDR_LOW_BYTE; + } + ahb->regs = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(ahb->regs)) return PTR_ERR(ahb->regs); @@ -278,7 +278,6 @@ static struct platform_driver tegra_ahb_driver = { .probe = tegra_ahb_probe, .driver = { .name = DRV_NAME, - .owner = THIS_MODULE, .of_match_table = tegra_ahb_of_match, .pm = &tegra_ahb_pm, }, @@ -287,5 +286,4 @@ module_platform_driver(tegra_ahb_driver); MODULE_AUTHOR("Hiroshi DOYU <hdoyu@nvidia.com>"); MODULE_DESCRIPTION("Tegra AHB driver"); -MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:" DRV_NAME); |