diff options
Diffstat (limited to 'drivers/clk/at91/sam9x60.c')
| -rw-r--r-- | drivers/clk/at91/sam9x60.c | 58 |
1 files changed, 39 insertions, 19 deletions
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 5f6fa89571b7..18baf4a256f4 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -26,10 +26,17 @@ static const struct clk_range plla_outputs[] = { { .min = 2343750, .max = 1200000000 }, }; +/* Fractional PLL core output range. */ +static const struct clk_range core_outputs[] = { + { .min = 600000000, .max = 1200000000 }, +}; + static const struct clk_pll_characteristics plla_characteristics = { .input = { .min = 12000000, .max = 48000000 }, .num_output = ARRAY_SIZE(plla_outputs), .output = plla_outputs, + .core_output = core_outputs, + .acr = UL(0x00020010), }; static const struct clk_range upll_outputs[] = { @@ -40,7 +47,9 @@ static const struct clk_pll_characteristics upll_characteristics = { .input = { .min = 12000000, .max = 48000000 }, .num_output = ARRAY_SIZE(upll_outputs), .output = upll_outputs, + .core_output = core_outputs, .upll = true, + .acr = UL(0x12023010), /* fIN = [18 MHz, 32 MHz]*/ }; static const struct clk_pll_layout pll_frac_layout = { @@ -75,9 +84,14 @@ static const struct clk_pcr_layout sam9x60_pcr_layout = { static const struct { char *n; char *p; + unsigned long flags; u8 id; } sam9x60_systemck[] = { - { .n = "ddrck", .p = "masterck_div", .id = 2 }, + /* + * ddrck feeds DDR controller and is enabled by bootloader thus we need + * to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL }, { .n = "uhpck", .p = "usbck", .id = 6 }, { .n = "pck0", .p = "prog0", .id = 8 }, { .n = "pck1", .p = "prog1", .id = 9 }, @@ -86,6 +100,7 @@ static const struct { static const struct { char *n; + unsigned long flags; u8 id; } sam9x60_periphck[] = { { .n = "pioA_clk", .id = 2, }, @@ -132,7 +147,11 @@ static const struct { { .n = "pioD_clk", .id = 44, }, { .n = "tcb1_clk", .id = 45, }, { .n = "dbgu_clk", .id = 47, }, - { .n = "mpddr_clk", .id = 49, }, + /* + * mpddr_clk feeds DDR controller and is enabled by bootloader thus we + * need to keep it enabled in case there is no Linux consumer for it. + */ + { .n = "mpddr_clk", .id = 49, .flags = CLK_IS_CRITICAL }, }; static const struct { @@ -209,14 +228,14 @@ static void __init sam9x60_pmc_setup(struct device_node *np) if (IS_ERR(hw)) goto err_free; - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, 0); + hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0); if (IS_ERR(hw)) goto err_free; main_osc_hw = hw; parent_names[0] = "main_rc_osc"; parent_names[1] = "main_osc"; - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2); + hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2); if (IS_ERR(hw)) goto err_free; @@ -236,13 +255,13 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck", - "pllack_fracck", 0, &plla_characteristics, + "pllack_fracck", NULL, 0, &plla_characteristics, &pll_div_layout, /* * This feeds CPU. It should not * be disabled. */ - CLK_IS_CRITICAL | CLK_SET_RATE_GATE); + CLK_IS_CRITICAL | CLK_SET_RATE_GATE, 0); if (IS_ERR(hw)) goto err_free; @@ -256,11 +275,11 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck", - "upllck_fracck", 1, &upll_characteristics, + "upllck_fracck", NULL, 1, &upll_characteristics, &pll_div_layout, CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | - CLK_SET_RATE_PARENT); + CLK_SET_RATE_PARENT, 0); if (IS_ERR(hw)) goto err_free; @@ -270,16 +289,15 @@ static void __init sam9x60_pmc_setup(struct device_node *np) parent_names[1] = "mainck"; parent_names[2] = "pllack_divck"; hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3, - parent_names, &sam9x60_master_layout, - &mck_characteristics, &mck_lock, - CLK_SET_RATE_GATE, INT_MIN); + parent_names, NULL, &sam9x60_master_layout, + &mck_characteristics, &mck_lock); if (IS_ERR(hw)) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", &sam9x60_master_layout, + "masterck_pres", NULL, &sam9x60_master_layout, &mck_characteristics, &mck_lock, - CLK_SET_RATE_GATE); + CLK_SET_RATE_GATE, 0); if (IS_ERR(hw)) goto err_free; @@ -304,7 +322,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, 6, i, + parent_names, NULL, 6, i, &sam9x60_programmable_layout, NULL); if (IS_ERR(hw)) @@ -315,8 +333,9 @@ static void __init sam9x60_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) { hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n, - sam9x60_systemck[i].p, - sam9x60_systemck[i].id); + sam9x60_systemck[i].p, NULL, + sam9x60_systemck[i].id, + sam9x60_systemck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -327,9 +346,10 @@ static void __init sam9x60_pmc_setup(struct device_node *np) hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock, &sam9x60_pcr_layout, sam9x60_periphck[i].n, - "masterck_div", + "masterck_div", NULL, sam9x60_periphck[i].id, - &range, INT_MIN); + &range, INT_MIN, + sam9x60_periphck[i].flags); if (IS_ERR(hw)) goto err_free; @@ -340,7 +360,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, &sam9x60_pcr_layout, sam9x60_gck[i].n, - parent_names, NULL, 6, + parent_names, NULL, NULL, 6, sam9x60_gck[i].id, &sam9x60_gck[i].r, INT_MIN); if (IS_ERR(hw)) |