diff options
Diffstat (limited to 'drivers/clk/pxa/clk-pxa.c')
| -rw-r--r-- | drivers/clk/pxa/clk-pxa.c | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/clk/pxa/clk-pxa.c b/drivers/clk/pxa/clk-pxa.c index 74f64c3c4290..ebee2afd05de 100644 --- a/drivers/clk/pxa/clk-pxa.c +++ b/drivers/clk/pxa/clk-pxa.c @@ -1,19 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Marvell PXA family clocks * * Copyright (C) 2014 Robert Jarzmik * * Common clock code for PXA clocks ("CKEN" type clocks + DT) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * */ #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/clkdev.h> +#include <linux/io.h> #include <linux/of.h> +#include <linux/soc/pxa/smemc.h> #include <dt-bindings/clock/pxa-clock.h> #include "clk-pxa.h" @@ -70,7 +68,7 @@ static unsigned long cken_recalc_rate(struct clk_hw *hw, return clk_fixed_factor_ops.recalc_rate(&fix->hw, parent_rate); } -static struct clk_ops cken_rate_ops = { +static const struct clk_ops cken_rate_ops = { .recalc_rate = cken_recalc_rate, }; @@ -83,7 +81,8 @@ static u8 cken_get_parent(struct clk_hw *hw) return pclk->is_in_low_power() ? 0 : 1; } -static struct clk_ops cken_mux_ops = { +static const struct clk_ops cken_mux_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = cken_get_parent, .set_parent = dummy_clk_set_parent, }; @@ -97,7 +96,8 @@ void __init clkdev_pxa_register(int ckid, const char *con_id, clk_register_clkdev(clk, con_id, dev_id); } -int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks) +int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, + int nb_clks, void __iomem *clk_regs) { int i; struct pxa_clk *pxa_clk; @@ -105,10 +105,13 @@ int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks) for (i = 0; i < nb_clks; i++) { pxa_clk = kzalloc(sizeof(*pxa_clk), GFP_KERNEL); + if (!pxa_clk) + return -ENOMEM; pxa_clk->is_in_low_power = clks[i].is_in_low_power; pxa_clk->lp = clks[i].lp; pxa_clk->hp = clks[i].hp; pxa_clk->gate = clks[i].gate; + pxa_clk->gate.reg = clk_regs + clks[i].cken_reg; pxa_clk->gate.lock = &pxa_clk_lock; clk = clk_register_composite(NULL, clks[i].name, clks[i].parent_names, 2, @@ -147,20 +150,19 @@ void pxa2xx_core_turbo_switch(bool on) " b 3f\n" "2: b 1b\n" "3: nop\n" - : "=&r" (unused) - : "r" (clkcfg) - : ); + : "=&r" (unused) : "r" (clkcfg)); local_irq_restore(flags); } void pxa2xx_cpll_change(struct pxa2xx_freq *freq, - u32 (*mdrefr_dri)(unsigned int), void __iomem *mdrefr, + u32 (*mdrefr_dri)(unsigned int), void __iomem *cccr) { unsigned int clkcfg = freq->clkcfg; unsigned int unused, preset_mdrefr, postset_mdrefr; unsigned long flags; + void __iomem *mdrefr = pxa_smemc_get_mdrefr(); local_irq_save(flags); |