diff options
Diffstat (limited to 'drivers/clk/samsung/clk-exynos5250.c')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5250.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 113df773ee44..e90d3a0848cb 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -5,11 +5,12 @@ * Author: Thomas Abraham <thomas.ab@samsung.com> * * Common Clock Framework support for Exynos5250 SoC. -*/ + */ #include <dt-bindings/clock/exynos5250.h> #include <linux/clk-provider.h> #include <linux/io.h> +#include <linux/mod_devicetable.h> #include <linux/of.h> #include <linux/of_address.h> @@ -100,6 +101,9 @@ #define PWR_CTRL2_CORE2_UP_RATIO (1 << 4) #define PWR_CTRL2_CORE1_UP_RATIO (1 << 0) +/* NOTE: Must be equal to the last clock ID increased by one */ +#define CLKS_NR (CLK_MOUT_VPLLSRC + 1) + /* list of PLLs to be registered */ enum exynos5250_plls { apll, mpll, cpll, epll, vpll, gpll, bpll, @@ -773,8 +777,9 @@ static const struct exynos_cpuclk_cfg_data exynos5250_armclk_d[] __initconst = { }; static const struct samsung_cpu_clock exynos5250_cpu_clks[] __initconst = { - CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL, CLK_CPU_HAS_DIV1, 0x200, - exynos5250_armclk_d), + CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL, + CLK_CPU_HAS_DIV1, 0x0, CPUCLK_LAYOUT_E4210, + exynos5250_armclk_d), }; static const struct of_device_id ext_clk_match[] __initconst = { @@ -797,7 +802,7 @@ static void __init exynos5250_clk_init(struct device_node *np) panic("%s: unable to determine soc\n", __func__); } - ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS); + ctx = samsung_clk_init(NULL, reg_base, CLKS_NR); hws = ctx->clk_data.hws; samsung_clk_of_register_fixed_ext(ctx, exynos5250_fixed_rate_ext_clks, @@ -815,8 +820,7 @@ static void __init exynos5250_clk_init(struct device_node *np) exynos5250_plls[vpll].rate_table = vpll_24mhz_tbl; samsung_clk_register_pll(ctx, exynos5250_plls, - ARRAY_SIZE(exynos5250_plls), - reg_base); + ARRAY_SIZE(exynos5250_plls)); samsung_clk_register_fixed_rate(ctx, exynos5250_fixed_rate_clks, ARRAY_SIZE(exynos5250_fixed_rate_clks)); samsung_clk_register_fixed_factor(ctx, exynos5250_fixed_factor_clks, |