summaryrefslogtreecommitdiff
path: root/drivers/clk/sunxi-ng/ccu_common.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_common.h')
-rw-r--r--drivers/clk/sunxi-ng/ccu_common.h16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_common.h b/drivers/clk/sunxi-ng/ccu_common.h
index fbf16c6b896d..bbec283b9d99 100644
--- a/drivers/clk/sunxi-ng/ccu_common.h
+++ b/drivers/clk/sunxi-ng/ccu_common.h
@@ -18,10 +18,16 @@
#define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6)
#define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7)
#define CCU_FEATURE_KEY_FIELD BIT(8)
+#define CCU_FEATURE_CLOSEST_RATE BIT(9)
+#define CCU_FEATURE_DUAL_DIV BIT(10)
+#define CCU_FEATURE_UPDATE_BIT BIT(11)
/* MMC timing mode switch bit */
#define CCU_MMC_NEW_TIMING_MODE BIT(30)
+/* Some clocks need this bit to actually apply register changes */
+#define CCU_SUNXI_UPDATE_BIT BIT(27)
+
struct device_node;
struct ccu_common {
@@ -30,6 +36,9 @@ struct ccu_common {
u16 lock_reg;
u32 prediv;
+ unsigned long min_rate;
+ unsigned long max_rate;
+
unsigned long features;
spinlock_t *lock;
struct clk_hw hw;
@@ -46,12 +55,17 @@ struct sunxi_ccu_desc {
struct clk_hw_onecell_data *hw_clks;
- struct ccu_reset_map *resets;
+ const struct ccu_reset_map *resets;
unsigned long num_resets;
};
void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
+bool ccu_is_better_rate(struct ccu_common *common,
+ unsigned long target_rate,
+ unsigned long current_rate,
+ unsigned long best_rate);
+
struct ccu_pll_nb {
struct notifier_block clk_nb;
struct ccu_common *common;