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path: root/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
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Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h29
1 files changed, 28 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index b2f2ccfc20bb..721c8b49730c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -46,6 +46,7 @@
#define AMDGPU_DM_MAX_CRTC 6
+#define AMDGPU_DM_MAX_NUM_EDP 2
/*
#include "include/amdgpu_dal_power_if.h"
#include "amdgpu_dm_irq.h"
@@ -54,6 +55,8 @@
#include "irq_types.h"
#include "signal_types.h"
#include "amdgpu_dm_crc.h"
+struct aux_payload;
+enum aux_return_code_type;
/* Forward declarations */
struct amdgpu_device;
@@ -62,6 +65,7 @@ struct dc;
struct amdgpu_bo;
struct dmub_srv;
struct dc_plane_state;
+struct dmub_notification;
struct common_irq_params {
struct amdgpu_device *adev;
@@ -135,6 +139,10 @@ struct amdgpu_dm_backlight_caps {
/**
* struct dal_allocation - Tracks mapped FB memory for SMU communication
+ * @list: list of dal allocations
+ * @bo: GPU buffer object
+ * @cpu_ptr: CPU virtual address of the GPU buffer object
+ * @gpu_addr: GPU virtual address of the GPU buffer object
*/
struct dal_allocation {
struct list_head list;
@@ -164,6 +172,7 @@ struct dal_allocation {
* @compressor: Frame buffer compression buffer. See &struct dm_compressor_info
* @force_timing_sync: set via debugfs. When set, indicates that all connected
* displays will be forced to synchronize.
+ * @dmcub_trace_event_en: enable dmcub trace events
*/
struct amdgpu_display_manager {
@@ -178,6 +187,8 @@ struct amdgpu_display_manager {
*/
struct dmub_srv *dmub_srv;
+ struct dmub_notification *dmub_notify;
+
/**
* @dmub_fb_info:
*
@@ -349,11 +360,17 @@ struct amdgpu_display_manager {
struct common_irq_params
dmub_trace_params[1];
+ struct common_irq_params
+ dmub_outbox_params[1];
+
spinlock_t irq_handler_list_table_lock;
struct backlight_device *backlight_dev;
- const struct dc_link *backlight_link;
+ const struct dc_link *backlight_link[AMDGPU_DM_MAX_NUM_EDP];
+
+ uint8_t num_of_edps;
+
struct amdgpu_dm_backlight_caps backlight_caps;
struct mod_freesync *freesync_module;
@@ -418,6 +435,14 @@ struct amdgpu_display_manager {
* DAL fb memory allocation list, for communication with SMU.
*/
struct list_head da_list;
+ struct completion dmub_aux_transfer_done;
+
+ /**
+ * @brightness:
+ *
+ * cached backlight values.
+ */
+ u32 brightness[AMDGPU_DM_MAX_NUM_EDP];
};
enum dsc_clock_force_state {
@@ -600,4 +625,6 @@ void amdgpu_dm_update_connector_after_detect(
extern const struct drm_encoder_helper_funcs amdgpu_dm_encoder_helper_funcs;
+int amdgpu_dm_process_dmub_aux_transfer_sync(struct dc_context *ctx, unsigned int linkIndex,
+ struct aux_payload *payload, enum aux_return_code_type *operation_result);
#endif /* __AMDGPU_DM_H__ */