diff options
Diffstat (limited to 'drivers/gpu/drm/drm_mipi_dbi.c')
| -rw-r--r-- | drivers/gpu/drm/drm_mipi_dbi.c | 384 |
1 files changed, 300 insertions, 84 deletions
diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index 43a9b739bba7..00482227a9cd 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -5,9 +5,10 @@ * Copyright 2016 Noralf Trønnes */ +#include <linux/backlight.h> #include <linux/debugfs.h> #include <linux/delay.h> -#include <linux/dma-buf.h> +#include <linux/export.h> #include <linux/gpio/consumer.h> #include <linux/module.h> #include <linux/regulator/consumer.h> @@ -16,12 +17,16 @@ #include <drm/drm_connector.h> #include <drm/drm_damage_helper.h> #include <drm/drm_drv.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_file.h> #include <drm/drm_format_helper.h> #include <drm/drm_fourcc.h> +#include <drm/drm_framebuffer.h> +#include <drm/drm_gem.h> +#include <drm/drm_gem_atomic_helper.h> #include <drm/drm_gem_framebuffer_helper.h> #include <drm/drm_mipi_dbi.h> #include <drm/drm_modes.h> +#include <drm/drm_print.h> #include <drm/drm_probe_helper.h> #include <drm/drm_rect.h> #include <video/mipi_display.h> @@ -190,48 +195,63 @@ EXPORT_SYMBOL(mipi_dbi_command_stackbuf); /** * mipi_dbi_buf_copy - Copy a framebuffer, transforming it if necessary * @dst: The destination buffer + * @src: The source buffer * @fb: The source framebuffer * @clip: Clipping rectangle of the area to be copied * @swap: When true, swap MSB/LSB of 16-bit values + * @fmtcnv_state: Format-conversion state * * Returns: * Zero on success, negative error code on failure. */ -int mipi_dbi_buf_copy(void *dst, struct drm_framebuffer *fb, - struct drm_rect *clip, bool swap) +int mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, + struct drm_rect *clip, bool swap, + struct drm_format_conv_state *fmtcnv_state) { + struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev); struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0); - struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem); - struct dma_buf_attachment *import_attach = gem->import_attach; - void *src = cma_obj->vaddr; - int ret = 0; + struct iosys_map dst_map = IOSYS_MAP_INIT_VADDR(dst); + int ret; - if (import_attach) { - ret = dma_buf_begin_cpu_access(import_attach->dmabuf, - DMA_FROM_DEVICE); - if (ret) - return ret; - } + ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); + if (ret) + return ret; switch (fb->format->format) { case DRM_FORMAT_RGB565: if (swap) - drm_fb_swab(dst, src, fb, clip, !import_attach); + drm_fb_swab(&dst_map, NULL, src, fb, clip, !drm_gem_is_imported(gem), + fmtcnv_state); else - drm_fb_memcpy(dst, src, fb, clip); + drm_fb_memcpy(&dst_map, NULL, src, fb, clip); + break; + case DRM_FORMAT_RGB888: + drm_fb_memcpy(&dst_map, NULL, src, fb, clip); break; case DRM_FORMAT_XRGB8888: - drm_fb_xrgb8888_to_rgb565(dst, src, fb, clip, swap); + switch (dbidev->pixel_format) { + case DRM_FORMAT_RGB565: + if (swap) { + drm_fb_xrgb8888_to_rgb565be(&dst_map, NULL, src, fb, clip, + fmtcnv_state); + } else { + drm_fb_xrgb8888_to_rgb565(&dst_map, NULL, src, fb, clip, + fmtcnv_state); + } + break; + case DRM_FORMAT_RGB888: + drm_fb_xrgb8888_to_rgb888(&dst_map, NULL, src, fb, clip, fmtcnv_state); + break; + } break; default: drm_err_once(fb->dev, "Format is not supported: %p4cc\n", &fb->format->format); - return -EINVAL; + ret = -EINVAL; } - if (import_attach) - ret = dma_buf_end_cpu_access(import_attach->dmabuf, - DMA_FROM_DEVICE); + drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); + return ret; } EXPORT_SYMBOL(mipi_dbi_buf_copy); @@ -253,25 +273,20 @@ static void mipi_dbi_set_window_address(struct mipi_dbi_dev *dbidev, ys & 0xff, (ye >> 8) & 0xff, ye & 0xff); } -static void mipi_dbi_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect) +static void mipi_dbi_fb_dirty(struct iosys_map *src, struct drm_framebuffer *fb, + struct drm_rect *rect, struct drm_format_conv_state *fmtcnv_state) { - struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0); - struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem); struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev); unsigned int height = rect->y2 - rect->y1; unsigned int width = rect->x2 - rect->x1; + const struct drm_format_info *dst_format; struct mipi_dbi *dbi = &dbidev->dbi; bool swap = dbi->swap_bytes; - int idx, ret = 0; + int ret = 0; + size_t len; bool full; void *tr; - if (WARN_ON(!fb)) - return; - - if (!drm_dev_enter(fb->dev, &idx)) - return; - full = width == fb->width && height == fb->height; DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect)); @@ -279,24 +294,45 @@ static void mipi_dbi_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect) if (!dbi->dc || !full || swap || fb->format->format == DRM_FORMAT_XRGB8888) { tr = dbidev->tx_buf; - ret = mipi_dbi_buf_copy(dbidev->tx_buf, fb, rect, swap); + ret = mipi_dbi_buf_copy(tr, src, fb, rect, swap, fmtcnv_state); if (ret) goto err_msg; } else { - tr = cma_obj->vaddr; + tr = src->vaddr; /* TODO: Use mapping abstraction properly */ } mipi_dbi_set_window_address(dbidev, rect->x1, rect->x2 - 1, rect->y1, rect->y2 - 1); - ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, tr, - width * height * 2); + if (fb->format->format == DRM_FORMAT_XRGB8888) + dst_format = drm_format_info(dbidev->pixel_format); + else + dst_format = fb->format; + len = drm_format_info_min_pitch(dst_format, 0, width) * height; + + ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, tr, len); err_msg: if (ret) drm_err_once(fb->dev, "Failed to update display %d\n", ret); +} - drm_dev_exit(idx); +/** + * mipi_dbi_pipe_mode_valid - MIPI DBI mode-valid helper + * @pipe: Simple display pipe + * @mode: The mode to test + * + * This function validates a given display mode against the MIPI DBI's hardware + * display. Drivers can use this as their &drm_simple_display_pipe_funcs->mode_valid + * callback. + */ +enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe, + const struct drm_display_mode *mode) +{ + struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); + + return drm_crtc_helper_mode_valid_fixed(&pipe->crtc, mode, &dbidev->mode); } +EXPORT_SYMBOL(mipi_dbi_pipe_mode_valid); /** * mipi_dbi_pipe_update - Display pipe update helper @@ -310,13 +346,25 @@ void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe, struct drm_plane_state *old_state) { struct drm_plane_state *state = pipe->plane.state; + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state); + struct drm_framebuffer *fb = state->fb; struct drm_rect rect; + int idx; if (!pipe->crtc.state->active) return; + if (WARN_ON(!fb)) + return; + + if (!drm_dev_enter(fb->dev, &idx)) + return; + if (drm_atomic_helper_damage_merged(old_state, state, &rect)) - mipi_dbi_fb_dirty(state->fb, &rect); + mipi_dbi_fb_dirty(&shadow_plane_state->data[0], fb, &rect, + &shadow_plane_state->fmtcnv_state); + + drm_dev_exit(idx); } EXPORT_SYMBOL(mipi_dbi_pipe_update); @@ -337,6 +385,7 @@ void mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev, struct drm_crtc_state *crtc_state, struct drm_plane_state *plane_state) { + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); struct drm_framebuffer *fb = plane_state->fb; struct drm_rect rect = { .x1 = 0, @@ -349,7 +398,8 @@ void mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev, if (!drm_dev_enter(&dbidev->drm, &idx)) return; - mipi_dbi_fb_dirty(fb, &rect); + mipi_dbi_fb_dirty(&shadow_plane_state->data[0], fb, &rect, + &shadow_plane_state->fmtcnv_state); backlight_enable(dbidev->backlight); drm_dev_exit(idx); @@ -362,12 +412,16 @@ static void mipi_dbi_blank(struct mipi_dbi_dev *dbidev) u16 height = drm->mode_config.min_height; u16 width = drm->mode_config.min_width; struct mipi_dbi *dbi = &dbidev->dbi; - size_t len = width * height * 2; + const struct drm_format_info *dst_format; + size_t len; int idx; if (!drm_dev_enter(drm, &idx)) return; + dst_format = drm_format_info(dbidev->pixel_format); + len = drm_format_info_min_pitch(dst_format, 0, width) * height; + memset(dbidev->tx_buf, 0, len); mipi_dbi_set_window_address(dbidev, 0, width - 1, 0, height - 1); @@ -398,32 +452,100 @@ void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe) if (dbidev->regulator) regulator_disable(dbidev->regulator); + if (dbidev->io_regulator) + regulator_disable(dbidev->io_regulator); } EXPORT_SYMBOL(mipi_dbi_pipe_disable); -static int mipi_dbi_connector_get_modes(struct drm_connector *connector) +/** + * mipi_dbi_pipe_begin_fb_access - MIPI DBI pipe begin-access helper + * @pipe: Display pipe + * @plane_state: Plane state + * + * This function implements struct &drm_simple_display_funcs.begin_fb_access. + * + * See drm_gem_begin_shadow_fb_access() for details and mipi_dbi_pipe_cleanup_fb() + * for cleanup. + * + * Returns: + * 0 on success, or a negative errno code otherwise. + */ +int mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *plane_state) { - struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(connector->dev); - struct drm_display_mode *mode; + return drm_gem_begin_shadow_fb_access(&pipe->plane, plane_state); +} +EXPORT_SYMBOL(mipi_dbi_pipe_begin_fb_access); - mode = drm_mode_duplicate(connector->dev, &dbidev->mode); - if (!mode) { - DRM_ERROR("Failed to duplicate mode\n"); - return 0; - } +/** + * mipi_dbi_pipe_end_fb_access - MIPI DBI pipe end-access helper + * @pipe: Display pipe + * @plane_state: Plane state + * + * This function implements struct &drm_simple_display_funcs.end_fb_access. + * + * See mipi_dbi_pipe_begin_fb_access(). + */ +void mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *plane_state) +{ + drm_gem_end_shadow_fb_access(&pipe->plane, plane_state); +} +EXPORT_SYMBOL(mipi_dbi_pipe_end_fb_access); - if (mode->name[0] == '\0') - drm_mode_set_name(mode); +/** + * mipi_dbi_pipe_reset_plane - MIPI DBI plane-reset helper + * @pipe: Display pipe + * + * This function implements struct &drm_simple_display_funcs.reset_plane + * for MIPI DBI planes. + */ +void mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe) +{ + drm_gem_reset_shadow_plane(&pipe->plane); +} +EXPORT_SYMBOL(mipi_dbi_pipe_reset_plane); - mode->type |= DRM_MODE_TYPE_PREFERRED; - drm_mode_probed_add(connector, mode); +/** + * mipi_dbi_pipe_duplicate_plane_state - duplicates MIPI DBI plane state + * @pipe: Display pipe + * + * This function implements struct &drm_simple_display_funcs.duplicate_plane_state + * for MIPI DBI planes. + * + * See drm_gem_duplicate_shadow_plane_state() for additional details. + * + * Returns: + * A pointer to a new plane state on success, or NULL otherwise. + */ +struct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe) +{ + return drm_gem_duplicate_shadow_plane_state(&pipe->plane); +} +EXPORT_SYMBOL(mipi_dbi_pipe_duplicate_plane_state); - if (mode->width_mm) { - connector->display_info.width_mm = mode->width_mm; - connector->display_info.height_mm = mode->height_mm; - } +/** + * mipi_dbi_pipe_destroy_plane_state - cleans up MIPI DBI plane state + * @pipe: Display pipe + * @plane_state: Plane state + * + * This function implements struct drm_simple_display_funcs.destroy_plane_state + * for MIPI DBI planes. + * + * See drm_gem_destroy_shadow_plane_state() for additional details. + */ +void mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *plane_state) +{ + drm_gem_destroy_shadow_plane_state(&pipe->plane, plane_state); +} +EXPORT_SYMBOL(mipi_dbi_pipe_destroy_plane_state); + +static int mipi_dbi_connector_get_modes(struct drm_connector *connector) +{ + struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(connector->dev); - return 1; + return drm_connector_helper_get_modes_fixed(connector, &dbidev->mode); } static const struct drm_connector_helper_funcs mipi_dbi_connector_hfuncs = { @@ -480,7 +602,7 @@ static const uint32_t mipi_dbi_formats[] = { * has one fixed &drm_display_mode which is rotated according to @rotation. * This mode is used to set the mode config min/max width/height properties. * - * Use mipi_dbi_dev_init() if you don't need custom formats. + * Use mipi_dbi_dev_init() if you want native RGB565 and emulated XRGB8888 format. * * Note: * Some of the helper functions expects RGB565 to be the default format and the @@ -539,6 +661,9 @@ int mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev, drm->mode_config.min_height = dbidev->mode.vdisplay; drm->mode_config.max_height = dbidev->mode.vdisplay; dbidev->rotation = rotation; + dbidev->pixel_format = formats[0]; + if (formats[0] == DRM_FORMAT_RGB888) + dbidev->dbi.write_memory_bpw = 8; DRM_DEBUG_KMS("rotation = %u\n", rotation); @@ -567,7 +692,7 @@ int mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev, const struct drm_simple_display_pipe_funcs *funcs, const struct drm_display_mode *mode, unsigned int rotation) { - size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16); + size_t bufsize = (u32)mode->vdisplay * mode->hdisplay * sizeof(u16); dbidev->drm.mode_config.preferred_depth = 16; @@ -641,6 +766,16 @@ static int mipi_dbi_poweron_reset_conditional(struct mipi_dbi_dev *dbidev, bool } } + if (dbidev->io_regulator) { + ret = regulator_enable(dbidev->io_regulator); + if (ret) { + DRM_DEV_ERROR(dev, "Failed to enable I/O regulator (%d)\n", ret); + if (dbidev->regulator) + regulator_disable(dbidev->regulator); + return ret; + } + } + if (cond && mipi_dbi_display_is_on(dbi)) return 1; @@ -650,6 +785,8 @@ static int mipi_dbi_poweron_reset_conditional(struct mipi_dbi_dev *dbidev, bool DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n", ret); if (dbidev->regulator) regulator_disable(dbidev->regulator); + if (dbidev->io_regulator) + regulator_disable(dbidev->io_regulator); return ret; } @@ -720,15 +857,6 @@ u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len) } EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed); -static bool mipi_dbi_machine_little_endian(void) -{ -#if defined(__LITTLE_ENDIAN) - return true; -#else - return false; -#endif -} - /* * MIPI DBI Type C Option 1 * @@ -751,7 +879,7 @@ static int mipi_dbi_spi1e_transfer(struct mipi_dbi *dbi, int dc, const void *buf, size_t len, unsigned int bpw) { - bool swap_bytes = (bpw == 16 && mipi_dbi_machine_little_endian()); + bool swap_bytes = (bpw == 16); size_t chunk, max_chunk = dbi->tx_buf9_len; struct spi_device *spi = dbi->spi; struct spi_transfer tr = { @@ -900,7 +1028,7 @@ static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc, size_t chunk = min(len, max_chunk); unsigned int i; - if (bpw == 16 && mipi_dbi_machine_little_endian()) { + if (bpw == 16) { for (i = 0; i < (chunk * 2); i += 2) { dst16[i] = *src16 >> 8; dst16[i + 1] = *src16++ & 0xFF; @@ -928,14 +1056,67 @@ static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc, return 0; } +static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd, + u8 *data, size_t len) +{ + struct spi_device *spi = dbi->spi; + u32 speed_hz = min_t(u32, MIPI_DBI_MAX_SPI_READ_SPEED, + spi->max_speed_hz / 2); + struct spi_transfer tr[2] = { + { + .speed_hz = speed_hz, + .bits_per_word = 9, + .tx_buf = dbi->tx_buf9, + .len = 2, + }, { + .speed_hz = speed_hz, + .bits_per_word = 8, + .len = len, + .rx_buf = data, + }, + }; + struct spi_message m; + u16 *dst16; + int ret; + + if (!len) + return -EINVAL; + + if (!spi_is_bpw_supported(spi, 9)) { + /* + * FIXME: implement something like mipi_dbi_spi1e_transfer() but + * for reads using emulation. + */ + dev_err(&spi->dev, + "reading on host not supporting 9 bpw not yet implemented\n"); + return -EOPNOTSUPP; + } + + /* + * Turn the 8bit command into a 16bit version of the command in the + * buffer. Only 9 bits of this will be used when executing the actual + * transfer. + */ + dst16 = dbi->tx_buf9; + dst16[0] = *cmd; + + spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr)); + ret = spi_sync(spi, &m); + + if (!ret) + MIPI_DBI_DEBUG_COMMAND(*cmd, data, len); + + return ret; +} + static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, u8 *parameters, size_t num) { - unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8; + unsigned int bpw = 8; int ret; if (mipi_dbi_command_is_read(dbi, *cmd)) - return -EOPNOTSUPP; + return mipi_dbi_typec1_command_read(dbi, cmd, parameters, num); MIPI_DBI_DEBUG_COMMAND(*cmd, parameters, num); @@ -943,6 +1124,9 @@ static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, if (ret || !num) return ret; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; + return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw); } @@ -988,10 +1172,13 @@ static int mipi_dbi_typec3_command_read(struct mipi_dbi *dbi, u8 *cmd, return -ENOMEM; tr[1].rx_buf = buf; + + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 0); spi_message_init_with_transfers(&m, tr, ARRAY_SIZE(tr)); - ret = spi_sync(spi, &m); + ret = spi_sync_locked(spi, &m); + spi_bus_unlock(spi->controller); if (ret) goto err_free; @@ -1025,19 +1212,24 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, MIPI_DBI_DEBUG_COMMAND(*cmd, par, num); + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 0); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1); ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1); + spi_bus_unlock(spi->controller); if (ret || !num) return ret; - if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes) - bpw = 16; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; + spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 1); speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num); + ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num); + spi_bus_unlock(spi->controller); - return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num); + return ret; } /** @@ -1053,11 +1245,23 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, * If @dc is set, a Type C Option 3 interface is assumed, if not * Type C Option 1. * - * If the SPI master driver doesn't support the necessary bits per word, - * the following transformation is used: + * If the command is %MIPI_DCS_WRITE_MEMORY_START and the pixel format is RGB565, endianness has + * to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are + * assumed stored in memory as little endian (%DRM_FORMAT_BIG_ENDIAN is not supported). + * + * This is how endianness is handled: + * + * Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is + * byteswapped before transfer. + * + * Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be + * sent as-is. If not the caller is responsible for swapping the bytes + * before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. + * + * This handling is optimised for %DRM_FORMAT_RGB565 framebuffers. * - * - 9-bit: reorder buffer as 9x 8-bit words, padded with no-op command. - * - 16-bit: if big endian send as 8-bit, if little endian swap bytes + * If the interface is Option 1 and the SPI controller doesn't support 9 bits per word, + * the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. * * Returns: * Zero on success, negative error code on failure. @@ -1070,8 +1274,8 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, /* * Even though it's not the SPI device that does DMA (the master does), - * the dma mask is necessary for the dma_alloc_wc() in - * drm_gem_cma_create(). The dma_addr returned will be a physical + * the dma mask is necessary for the dma_alloc_wc() in the GEM code + * (e.g., drm_gem_dma_create()). The dma_addr returned will be a physical * address which might be different from the bus address, but this is * not a problem since the address will not be used. * The virtual address is used in the transfer and the SPI core @@ -1088,12 +1292,15 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, dbi->spi = spi; dbi->read_commands = mipi_dbi_dcs_read_commands; + dbi->write_memory_bpw = 16; if (dc) { dbi->command = mipi_dbi_typec3_command; dbi->dc = dc; - if (mipi_dbi_machine_little_endian() && !spi_is_bpw_supported(spi, 16)) + if (!spi_is_bpw_supported(spi, 16)) { + dbi->write_memory_bpw = 8; dbi->swap_bytes = true; + } } else { dbi->command = mipi_dbi_typec1_command; dbi->tx_buf9_len = SZ_16K; @@ -1119,7 +1326,8 @@ EXPORT_SYMBOL(mipi_dbi_spi_init); * @len: Buffer length * * This SPI transfer helper breaks up the transfer of @buf into chunks which - * the SPI controller driver can handle. + * the SPI controller driver can handle. The SPI bus must be locked when + * calling this. * * Returns: * Zero on success, negative error code on failure. @@ -1136,6 +1344,13 @@ int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, size_t chunk; int ret; + /* In __spi_validate, there's a validation that no partial transfers + * are accepted (xfer->len % w_size must be zero). + * Here we align max_chunk to multiple of 2 (16bits), + * to prevent transfers from being rejected. + */ + max_chunk = ALIGN_DOWN(max_chunk, 2); + spi_message_init_with_transfers(&m, &tr, 1); while (len) { @@ -1146,7 +1361,7 @@ int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz, buf += chunk; len -= chunk; - ret = spi_sync(spi, &m); + ret = spi_sync_locked(spi, &m); if (ret) return ret; } @@ -1302,4 +1517,5 @@ EXPORT_SYMBOL(mipi_dbi_debugfs_init); #endif +MODULE_DESCRIPTION("MIPI Display Bus Interface (DBI) LCD controller support"); MODULE_LICENSE("GPL"); |