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path: root/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
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Diffstat (limited to 'drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c')
-rw-r--r--drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c409
1 files changed, 153 insertions, 256 deletions
diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
index bb774202a5a1..76384b4581bf 100644
--- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
+++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
@@ -1,48 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Hisilicon Hi6220 SoC ADE(Advanced Display Engine)'s crtc&plane driver
*
* Copyright (c) 2016 Linaro Limited.
- * Copyright (c) 2014-2016 Hisilicon Limited.
+ * Copyright (c) 2014-2016 HiSilicon Limited.
*
* Author:
* Xinliang Liu <z.liuxinliang@hisilicon.com>
* Xinliang Liu <xinliang.liu@linaro.org>
* Xinwei Kong <kong.kongxinwei@hisilicon.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
*/
#include <linux/bitops.h>
#include <linux/clk.h>
-#include <video/display_timing.h>
#include <linux/mfd/syscon.h>
+#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset.h>
-#include <drm/drmP.h>
-#include <drm/drm_crtc.h>
-#include <drm/drm_crtc_helper.h>
+#include <video/display_timing.h>
+
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
-#include <drm/drm_plane_helper.h>
-#include <drm/drm_gem_cma_helper.h>
-#include <drm/drm_fb_cma_helper.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_fb_dma_helper.h>
+#include <drm/drm_fbdev_dma.h>
+#include <drm/drm_fourcc.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_print.h>
+#include <drm/drm_probe_helper.h>
+#include <drm/drm_vblank.h>
+#include <drm/drm_gem_framebuffer_helper.h>
#include "kirin_drm_drv.h"
#include "kirin_ade_reg.h"
-#define PRIMARY_CH ADE_CH1 /* primary plane */
#define OUT_OVLY ADE_OVLY2 /* output overlay compositor */
#define ADE_DEBUG 1
-#define to_ade_crtc(crtc) \
- container_of(crtc, struct ade_crtc, base)
-
-#define to_ade_plane(plane) \
- container_of(plane, struct ade_plane, base)
struct ade_hw_ctx {
void __iomem *base;
@@ -53,34 +50,11 @@ struct ade_hw_ctx {
struct reset_control *reset;
bool power_on;
int irq;
-};
-
-struct ade_crtc {
- struct drm_crtc base;
- struct ade_hw_ctx *ctx;
- bool enable;
- u32 out_format;
-};
-struct ade_plane {
- struct drm_plane base;
- void *ctx;
- u8 ch; /* channel */
+ struct drm_crtc *crtc;
};
-struct ade_data {
- struct ade_crtc acrtc;
- struct ade_plane aplane[ADE_CH_NUM];
- struct ade_hw_ctx ctx;
-};
-
-/* ade-format info: */
-struct ade_format {
- u32 pixel_format;
- enum ade_fb_format ade_format;
-};
-
-static const struct ade_format ade_formats[] = {
+static const struct kirin_format ade_formats[] = {
/* 16bpp RGB: */
{ DRM_FORMAT_RGB565, ADE_RGB_565 },
{ DRM_FORMAT_BGR565, ADE_BGR_565 },
@@ -96,7 +70,7 @@ static const struct ade_format ade_formats[] = {
{ DRM_FORMAT_ABGR8888, ADE_ABGR_8888 },
};
-static const u32 channel_formats1[] = {
+static const u32 channel_formats[] = {
/* channel 1,2,3,4 */
DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
DRM_FORMAT_BGR888, DRM_FORMAT_XRGB8888, DRM_FORMAT_XBGR8888,
@@ -104,19 +78,6 @@ static const u32 channel_formats1[] = {
DRM_FORMAT_ABGR8888
};
-u32 ade_get_channel_formats(u8 ch, const u32 **formats)
-{
- switch (ch) {
- case ADE_CH1:
- *formats = channel_formats1;
- return ARRAY_SIZE(channel_formats1);
- default:
- DRM_ERROR("no this channel %d\n", ch);
- *formats = NULL;
- return 0;
- }
-}
-
/* convert from fourcc format to ade format */
static u32 ade_get_format(u32 pixel_format)
{
@@ -124,7 +85,7 @@ static u32 ade_get_format(u32 pixel_format)
for (i = 0; i < ARRAY_SIZE(ade_formats); i++)
if (ade_formats[i].pixel_format == pixel_format)
- return ade_formats[i].ade_format;
+ return ade_formats[i].hw_format;
/* not found */
DRM_ERROR("Not found pixel format!!fourcc_format= %d\n",
@@ -182,8 +143,8 @@ static bool ade_crtc_mode_fixup(struct drm_crtc *crtc,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
adjusted_mode->clock =
clk_round_rate(ctx->ade_pix_clk, mode->clock * 1000) / 1000;
@@ -208,11 +169,10 @@ static void ade_set_pix_clk(struct ade_hw_ctx *ctx,
adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000;
}
-static void ade_ldi_set_mode(struct ade_crtc *acrtc,
+static void ade_ldi_set_mode(struct ade_hw_ctx *ctx,
struct drm_display_mode *mode,
struct drm_display_mode *adj_mode)
{
- struct ade_hw_ctx *ctx = acrtc->ctx;
void __iomem *base = ctx->base;
u32 width = mode->hdisplay;
u32 height = mode->vdisplay;
@@ -299,9 +259,8 @@ static void ade_power_down(struct ade_hw_ctx *ctx)
ctx->power_on = false;
}
-static void ade_set_medianoc_qos(struct ade_crtc *acrtc)
+static void ade_set_medianoc_qos(struct ade_hw_ctx *ctx)
{
- struct ade_hw_ctx *ctx = acrtc->ctx;
struct regmap *map = ctx->noc_regmap;
regmap_update_bits(map, ADE0_QOSGENERATOR_MODE,
@@ -317,8 +276,8 @@ static void ade_set_medianoc_qos(struct ade_crtc *acrtc)
static int ade_crtc_enable_vblank(struct drm_crtc *crtc)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
void __iomem *base = ctx->base;
if (!ctx->power_on)
@@ -332,8 +291,8 @@ static int ade_crtc_enable_vblank(struct drm_crtc *crtc)
static void ade_crtc_disable_vblank(struct drm_crtc *crtc)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
void __iomem *base = ctx->base;
if (!ctx->power_on) {
@@ -347,9 +306,8 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc)
static irqreturn_t ade_irq_handler(int irq, void *data)
{
- struct ade_crtc *acrtc = data;
- struct ade_hw_ctx *ctx = acrtc->ctx;
- struct drm_crtc *crtc = &acrtc->base;
+ struct ade_hw_ctx *ctx = data;
+ struct drm_crtc *crtc = ctx->crtc;
void __iomem *base = ctx->base;
u32 status;
@@ -366,11 +324,10 @@ static irqreturn_t ade_irq_handler(int irq, void *data)
return IRQ_HANDLED;
}
-static void ade_display_enable(struct ade_crtc *acrtc)
+static void ade_display_enable(struct ade_hw_ctx *ctx)
{
- struct ade_hw_ctx *ctx = acrtc->ctx;
void __iomem *base = ctx->base;
- u32 out_fmt = acrtc->out_format;
+ u32 out_fmt = LDI_OUT_RGB_888;
/* enable output overlay compositor */
writel(ADE_ENABLE, base + ADE_OVLYX_CTL(OUT_OVLY));
@@ -481,13 +438,13 @@ static void ade_dump_regs(void __iomem *base) { }
#endif
static void ade_crtc_atomic_enable(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state)
+ struct drm_atomic_state *state)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
int ret;
- if (acrtc->enable)
+ if (kcrtc->enable)
return;
if (!ctx->power_on) {
@@ -496,63 +453,63 @@ static void ade_crtc_atomic_enable(struct drm_crtc *crtc,
return;
}
- ade_set_medianoc_qos(acrtc);
- ade_display_enable(acrtc);
+ ade_set_medianoc_qos(ctx);
+ ade_display_enable(ctx);
ade_dump_regs(ctx->base);
drm_crtc_vblank_on(crtc);
- acrtc->enable = true;
+ kcrtc->enable = true;
}
static void ade_crtc_atomic_disable(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state)
+ struct drm_atomic_state *state)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
- if (!acrtc->enable)
+ if (!kcrtc->enable)
return;
drm_crtc_vblank_off(crtc);
ade_power_down(ctx);
- acrtc->enable = false;
+ kcrtc->enable = false;
}
static void ade_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
struct drm_display_mode *mode = &crtc->state->mode;
struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode;
if (!ctx->power_on)
(void)ade_power_up(ctx);
- ade_ldi_set_mode(acrtc, mode, adj_mode);
+ ade_ldi_set_mode(ctx, mode, adj_mode);
}
static void ade_crtc_atomic_begin(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state)
+ struct drm_atomic_state *state)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
struct drm_display_mode *mode = &crtc->state->mode;
struct drm_display_mode *adj_mode = &crtc->state->adjusted_mode;
if (!ctx->power_on)
(void)ade_power_up(ctx);
- ade_ldi_set_mode(acrtc, mode, adj_mode);
+ ade_ldi_set_mode(ctx, mode, adj_mode);
}
static void ade_crtc_atomic_flush(struct drm_crtc *crtc,
- struct drm_crtc_state *old_state)
+ struct drm_atomic_state *state)
{
- struct ade_crtc *acrtc = to_ade_crtc(crtc);
- struct ade_hw_ctx *ctx = acrtc->ctx;
+ struct kirin_crtc *kcrtc = to_kirin_crtc(crtc);
+ struct ade_hw_ctx *ctx = kcrtc->hw_ctx;
struct drm_pending_vblank_event *event = crtc->state->event;
void __iomem *base = ctx->base;
/* only crtc is enabled regs take effect */
- if (acrtc->enable) {
+ if (kcrtc->enable) {
ade_dump_regs(base);
/* flush ade registers */
writel(ADE_ENABLE, base + ADE_EN);
@@ -590,49 +547,19 @@ static const struct drm_crtc_funcs ade_crtc_funcs = {
.disable_vblank = ade_crtc_disable_vblank,
};
-static int ade_crtc_init(struct drm_device *dev, struct drm_crtc *crtc,
- struct drm_plane *plane)
-{
- struct device_node *port;
- int ret;
-
- /* set crtc port so that
- * drm_of_find_possible_crtcs call works
- */
- port = of_get_child_by_name(dev->dev->of_node, "port");
- if (!port) {
- DRM_ERROR("no port node found in %pOF\n", dev->dev->of_node);
- return -EINVAL;
- }
- of_node_put(port);
- crtc->port = port;
-
- ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
- &ade_crtc_funcs, NULL);
- if (ret) {
- DRM_ERROR("failed to init crtc.\n");
- return ret;
- }
-
- drm_crtc_helper_add(crtc, &ade_crtc_helper_funcs);
-
- return 0;
-}
-
static void ade_rdma_set(void __iomem *base, struct drm_framebuffer *fb,
u32 ch, u32 y, u32 in_h, u32 fmt)
{
- struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, 0);
- struct drm_format_name_buf format_name;
+ struct drm_gem_dma_object *obj = drm_fb_dma_get_gem_obj(fb, 0);
u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en;
u32 stride = fb->pitches[0];
- u32 addr = (u32)obj->paddr + y * stride;
+ u32 addr = (u32) obj->dma_addr + y * stride;
DRM_DEBUG_DRIVER("rdma%d: (y=%d, height=%d), stride=%d, paddr=0x%x\n",
- ch + 1, y, in_h, stride, (u32)obj->paddr);
- DRM_DEBUG_DRIVER("addr=0x%x, fb:%dx%d, pixel_format=%d(%s)\n",
+ ch + 1, y, in_h, stride, (u32) obj->dma_addr);
+ DRM_DEBUG_DRIVER("addr=0x%x, fb:%dx%d, pixel_format=%d(%p4cc)\n",
addr, fb->width, fb->height, fmt,
- drm_get_format_name(fb->format->format, &format_name));
+ &fb->format->format);
/* get reg offset */
reg_ctrl = RD_CH_CTRL(ch);
@@ -780,16 +707,16 @@ static void ade_compositor_routing_disable(void __iomem *base, u32 ch)
/*
* Typicaly, a channel looks like: DMA-->clip-->scale-->ctrans-->compositor
*/
-static void ade_update_channel(struct ade_plane *aplane,
+static void ade_update_channel(struct kirin_plane *kplane,
struct drm_framebuffer *fb, int crtc_x,
int crtc_y, unsigned int crtc_w,
unsigned int crtc_h, u32 src_x,
u32 src_y, u32 src_w, u32 src_h)
{
- struct ade_hw_ctx *ctx = aplane->ctx;
+ struct ade_hw_ctx *ctx = kplane->hw_ctx;
void __iomem *base = ctx->base;
u32 fmt = ade_get_format(fb->format->format);
- u32 ch = aplane->ch;
+ u32 ch = kplane->ch;
u32 in_w;
u32 in_h;
@@ -813,11 +740,11 @@ static void ade_update_channel(struct ade_plane *aplane,
ade_compositor_routing_set(base, ch, crtc_x, crtc_y, in_w, in_h, fmt);
}
-static void ade_disable_channel(struct ade_plane *aplane)
+static void ade_disable_channel(struct kirin_plane *kplane)
{
- struct ade_hw_ctx *ctx = aplane->ctx;
+ struct ade_hw_ctx *ctx = kplane->hw_ctx;
void __iomem *base = ctx->base;
- u32 ch = aplane->ch;
+ u32 ch = kplane->ch;
DRM_DEBUG_DRIVER("disable channel%d\n", ch + 1);
@@ -832,19 +759,21 @@ static void ade_disable_channel(struct ade_plane *aplane)
}
static int ade_plane_atomic_check(struct drm_plane *plane,
- struct drm_plane_state *state)
+ struct drm_atomic_state *state)
{
- struct drm_framebuffer *fb = state->fb;
- struct drm_crtc *crtc = state->crtc;
+ struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
+ plane);
+ struct drm_framebuffer *fb = new_plane_state->fb;
+ struct drm_crtc *crtc = new_plane_state->crtc;
struct drm_crtc_state *crtc_state;
- u32 src_x = state->src_x >> 16;
- u32 src_y = state->src_y >> 16;
- u32 src_w = state->src_w >> 16;
- u32 src_h = state->src_h >> 16;
- int crtc_x = state->crtc_x;
- int crtc_y = state->crtc_y;
- u32 crtc_w = state->crtc_w;
- u32 crtc_h = state->crtc_h;
+ u32 src_x = new_plane_state->src_x >> 16;
+ u32 src_y = new_plane_state->src_y >> 16;
+ u32 src_w = new_plane_state->src_w >> 16;
+ u32 src_h = new_plane_state->src_h >> 16;
+ int crtc_x = new_plane_state->crtc_x;
+ int crtc_y = new_plane_state->crtc_y;
+ u32 crtc_w = new_plane_state->crtc_w;
+ u32 crtc_h = new_plane_state->crtc_h;
u32 fmt;
if (!crtc || !fb)
@@ -854,7 +783,7 @@ static int ade_plane_atomic_check(struct drm_plane *plane,
if (fmt == ADE_FORMAT_UNSUPPORT)
return -EINVAL;
- crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
+ crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
@@ -877,23 +806,25 @@ static int ade_plane_atomic_check(struct drm_plane *plane,
}
static void ade_plane_atomic_update(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
- struct drm_plane_state *state = plane->state;
- struct ade_plane *aplane = to_ade_plane(plane);
+ struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
+ plane);
+ struct kirin_plane *kplane = to_kirin_plane(plane);
- ade_update_channel(aplane, state->fb, state->crtc_x, state->crtc_y,
- state->crtc_w, state->crtc_h,
- state->src_x >> 16, state->src_y >> 16,
- state->src_w >> 16, state->src_h >> 16);
+ ade_update_channel(kplane, new_state->fb, new_state->crtc_x,
+ new_state->crtc_y,
+ new_state->crtc_w, new_state->crtc_h,
+ new_state->src_x >> 16, new_state->src_y >> 16,
+ new_state->src_w >> 16, new_state->src_h >> 16);
}
static void ade_plane_atomic_disable(struct drm_plane *plane,
- struct drm_plane_state *old_state)
+ struct drm_atomic_state *state)
{
- struct ade_plane *aplane = to_ade_plane(plane);
+ struct kirin_plane *kplane = to_kirin_plane(plane);
- ade_disable_channel(aplane);
+ ade_disable_channel(kplane);
}
static const struct drm_plane_helper_funcs ade_plane_helper_funcs = {
@@ -911,144 +842,110 @@ static struct drm_plane_funcs ade_plane_funcs = {
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
};
-static int ade_plane_init(struct drm_device *dev, struct ade_plane *aplane,
- enum drm_plane_type type)
+static void *ade_hw_ctx_alloc(struct platform_device *pdev,
+ struct drm_crtc *crtc)
{
- const u32 *fmts;
- u32 fmts_cnt;
- int ret = 0;
-
- /* get properties */
- fmts_cnt = ade_get_channel_formats(aplane->ch, &fmts);
- if (ret)
- return ret;
-
- ret = drm_universal_plane_init(dev, &aplane->base, 1, &ade_plane_funcs,
- fmts, fmts_cnt, NULL, type, NULL);
- if (ret) {
- DRM_ERROR("fail to init plane, ch=%d\n", aplane->ch);
- return ret;
- }
-
- drm_plane_helper_add(&aplane->base, &ade_plane_helper_funcs);
-
- return 0;
-}
-
-static int ade_dts_parse(struct platform_device *pdev, struct ade_hw_ctx *ctx)
-{
- struct resource *res;
struct device *dev = &pdev->dev;
struct device_node *np = pdev->dev.of_node;
+ struct ade_hw_ctx *ctx = NULL;
+ int ret;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- ctx->base = devm_ioremap_resource(dev, res);
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx) {
+ DRM_ERROR("failed to alloc ade_hw_ctx\n");
+ return ERR_PTR(-ENOMEM);
+ }
+
+ ctx->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(ctx->base)) {
DRM_ERROR("failed to remap ade io base\n");
- return PTR_ERR(ctx->base);
+ return ERR_PTR(-EIO);
}
ctx->reset = devm_reset_control_get(dev, NULL);
if (IS_ERR(ctx->reset))
- return PTR_ERR(ctx->reset);
+ return ERR_PTR(-ENODEV);
ctx->noc_regmap =
syscon_regmap_lookup_by_phandle(np, "hisilicon,noc-syscon");
if (IS_ERR(ctx->noc_regmap)) {
DRM_ERROR("failed to get noc regmap\n");
- return PTR_ERR(ctx->noc_regmap);
+ return ERR_PTR(-ENODEV);
}
ctx->irq = platform_get_irq(pdev, 0);
if (ctx->irq < 0) {
DRM_ERROR("failed to get irq\n");
- return -ENODEV;
+ return ERR_PTR(-ENODEV);
}
ctx->ade_core_clk = devm_clk_get(dev, "clk_ade_core");
if (IS_ERR(ctx->ade_core_clk)) {
DRM_ERROR("failed to parse clk ADE_CORE\n");
- return PTR_ERR(ctx->ade_core_clk);
+ return ERR_PTR(-ENODEV);
}
ctx->media_noc_clk = devm_clk_get(dev, "clk_codec_jpeg");
if (IS_ERR(ctx->media_noc_clk)) {
DRM_ERROR("failed to parse clk CODEC_JPEG\n");
- return PTR_ERR(ctx->media_noc_clk);
+ return ERR_PTR(-ENODEV);
}
ctx->ade_pix_clk = devm_clk_get(dev, "clk_ade_pix");
if (IS_ERR(ctx->ade_pix_clk)) {
DRM_ERROR("failed to parse clk ADE_PIX\n");
- return PTR_ERR(ctx->ade_pix_clk);
+ return ERR_PTR(-ENODEV);
}
- return 0;
-}
-
-static int ade_drm_init(struct platform_device *pdev)
-{
- struct drm_device *dev = platform_get_drvdata(pdev);
- struct ade_data *ade;
- struct ade_hw_ctx *ctx;
- struct ade_crtc *acrtc;
- struct ade_plane *aplane;
- enum drm_plane_type type;
- int ret;
- int i;
-
- ade = devm_kzalloc(dev->dev, sizeof(*ade), GFP_KERNEL);
- if (!ade) {
- DRM_ERROR("failed to alloc ade_data\n");
- return -ENOMEM;
- }
- platform_set_drvdata(pdev, ade);
-
- ctx = &ade->ctx;
- acrtc = &ade->acrtc;
- acrtc->ctx = ctx;
- acrtc->out_format = LDI_OUT_RGB_888;
-
- ret = ade_dts_parse(pdev, ctx);
- if (ret)
- return ret;
-
- /*
- * plane init
- * TODO: Now only support primary plane, overlay planes
- * need to do.
- */
- for (i = 0; i < ADE_CH_NUM; i++) {
- aplane = &ade->aplane[i];
- aplane->ch = i;
- aplane->ctx = ctx;
- type = i == PRIMARY_CH ? DRM_PLANE_TYPE_PRIMARY :
- DRM_PLANE_TYPE_OVERLAY;
-
- ret = ade_plane_init(dev, aplane, type);
- if (ret)
- return ret;
- }
-
- /* crtc init */
- ret = ade_crtc_init(dev, &acrtc->base, &ade->aplane[PRIMARY_CH].base);
- if (ret)
- return ret;
-
/* vblank irq init */
- ret = devm_request_irq(dev->dev, ctx->irq, ade_irq_handler,
- IRQF_SHARED, dev->driver->name, acrtc);
+ ret = devm_request_irq(dev, ctx->irq, ade_irq_handler,
+ IRQF_SHARED, dev->driver->name, ctx);
if (ret)
- return ret;
+ return ERR_PTR(-EIO);
- return 0;
+ ctx->crtc = crtc;
+
+ return ctx;
}
-static void ade_drm_cleanup(struct platform_device *pdev)
+static void ade_hw_ctx_cleanup(void *hw_ctx)
{
}
-const struct kirin_dc_ops ade_dc_ops = {
- .init = ade_drm_init,
- .cleanup = ade_drm_cleanup
+static const struct drm_mode_config_funcs ade_mode_config_funcs = {
+ .fb_create = drm_gem_fb_create,
+ .atomic_check = drm_atomic_helper_check,
+ .atomic_commit = drm_atomic_helper_commit,
+
+};
+
+DEFINE_DRM_GEM_DMA_FOPS(ade_fops);
+
+static const struct drm_driver ade_driver = {
+ .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
+ .fops = &ade_fops,
+ DRM_GEM_DMA_DRIVER_OPS,
+ DRM_FBDEV_DMA_DRIVER_OPS,
+ .name = "kirin",
+ .desc = "Hisilicon Kirin620 SoC DRM Driver",
+ .major = 1,
+ .minor = 0,
+};
+
+struct kirin_drm_data ade_driver_data = {
+ .num_planes = ADE_CH_NUM,
+ .prim_plane = ADE_CH1,
+ .channel_formats = channel_formats,
+ .channel_formats_cnt = ARRAY_SIZE(channel_formats),
+ .config_max_width = 2048,
+ .config_max_height = 2048,
+ .driver = &ade_driver,
+ .crtc_helper_funcs = &ade_crtc_helper_funcs,
+ .crtc_funcs = &ade_crtc_funcs,
+ .plane_helper_funcs = &ade_plane_helper_funcs,
+ .plane_funcs = &ade_plane_funcs,
+ .mode_config_funcs = &ade_mode_config_funcs,
+
+ .alloc_hw_ctx = ade_hw_ctx_alloc,
+ .cleanup_hw_ctx = ade_hw_ctx_cleanup,
};