diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_bw.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_bw.h | 50 |
1 files changed, 16 insertions, 34 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h index bbcaaa73ec1b..99b447388245 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.h +++ b/drivers/gpu/drm/i915/display/intel_bw.h @@ -8,37 +8,14 @@ #include <drm/drm_atomic.h> -#include "intel_display.h" -#include "intel_global_state.h" - -struct drm_i915_private; struct intel_atomic_state; +struct intel_bw_state; +struct intel_crtc; struct intel_crtc_state; +struct intel_display; +struct intel_global_state; -struct intel_bw_state { - struct intel_global_state base; - - /* - * Contains a bit mask, used to determine, whether correspondent - * pipe allows SAGV or not. - */ - u8 pipe_sagv_reject; - - /* - * Current QGV points mask, which restricts - * some particular SAGV states, not to confuse - * with pipe_sagv_mask. - */ - u8 qgv_points_mask; - - unsigned int data_rate[I915_MAX_PIPES]; - u8 num_active_planes[I915_MAX_PIPES]; - - /* bitmask of active pipes */ - u8 active_pipes; -}; - -#define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base) +struct intel_bw_state *to_intel_bw_state(struct intel_global_state *obj_state); struct intel_bw_state * intel_atomic_get_old_bw_state(struct intel_atomic_state *state); @@ -49,12 +26,17 @@ intel_atomic_get_new_bw_state(struct intel_atomic_state *state); struct intel_bw_state * intel_atomic_get_bw_state(struct intel_atomic_state *state); -void intel_bw_init_hw(struct drm_i915_private *dev_priv); -int intel_bw_init(struct drm_i915_private *dev_priv); +void intel_bw_init_hw(struct intel_display *display); +int intel_bw_init(struct intel_display *display); int intel_bw_atomic_check(struct intel_atomic_state *state); -void intel_bw_crtc_update(struct intel_bw_state *bw_state, - const struct intel_crtc_state *crtc_state); -int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv, - u32 points_mask); +void intel_bw_update_hw_state(struct intel_display *display); +void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc); + +bool intel_bw_pmdemand_needs_update(struct intel_atomic_state *state); +bool intel_bw_can_enable_sagv(struct intel_display *display, + const struct intel_bw_state *bw_state); +void icl_sagv_pre_plane_update(struct intel_atomic_state *state); +void icl_sagv_post_plane_update(struct intel_atomic_state *state); +int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state); #endif /* __INTEL_BW_H__ */ |