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path: root/drivers/gpu/drm/i915/display/intel_de.h
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_de.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_de.h41
1 files changed, 27 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 00da10bf35f5..9d8c177aa228 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -8,6 +8,7 @@
#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_trace.h"
#include "intel_uncore.h"
static inline u32
@@ -22,26 +23,12 @@ intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
intel_uncore_posting_read(&i915->uncore, reg);
}
-/* Note: read the warnings for intel_uncore_*_fw() functions! */
-static inline u32
-intel_de_read_fw(struct drm_i915_private *i915, i915_reg_t reg)
-{
- return intel_uncore_read_fw(&i915->uncore, reg);
-}
-
static inline void
intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
{
intel_uncore_write(&i915->uncore, reg, val);
}
-/* Note: read the warnings for intel_uncore_*_fw() functions! */
-static inline void
-intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
-{
- intel_uncore_write_fw(&i915->uncore, reg, val);
-}
-
static inline void
intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
{
@@ -69,4 +56,30 @@ intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg,
return intel_de_wait_for_register(i915, reg, mask, 0, timeout);
}
+/*
+ * Unlocked mmio-accessors, think carefully before using these.
+ *
+ * Certain architectures will die if the same cacheline is concurrently accessed
+ * by different clients (e.g. on Ivybridge). Access to registers should
+ * therefore generally be serialised, by either the dev_priv->uncore.lock or
+ * a more localised lock guarding all access to that bank of registers.
+ */
+static inline u32
+intel_de_read_fw(struct drm_i915_private *i915, i915_reg_t reg)
+{
+ u32 val;
+
+ val = intel_uncore_read_fw(&i915->uncore, reg);
+ trace_i915_reg_rw(false, reg, val, sizeof(val), true);
+
+ return val;
+}
+
+static inline void
+intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
+{
+ trace_i915_reg_rw(true, reg, val, sizeof(val), true);
+ intel_uncore_write_fw(&i915->uncore, reg, val);
+}
+
#endif /* __INTEL_DE_H__ */