diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_pipe_crc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pipe_crc.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c index 5a468ed6e26c..82ceede0b2b1 100644 --- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c @@ -34,6 +34,7 @@ #include "intel_de.h" #include "intel_display_types.h" #include "intel_pipe_crc.h" +#include "intel_pipe_crc_regs.h" static const char * const pipe_crc_sources[] = { [INTEL_PIPE_CRC_SOURCE_NONE] = "none", @@ -167,7 +168,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, * - DisplayPort scrambling: used for EMI reduction */ if (need_stable_symbols) { - u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X); + u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv)); tmp |= DC_BALANCE_RESET_VLV; switch (pipe) { @@ -183,7 +184,7 @@ static int vlv_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, default: return -EINVAL; } - intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); + intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp); } return 0; @@ -229,7 +230,7 @@ static int i9xx_pipe_crc_ctl_reg(struct drm_i915_private *dev_priv, static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv, enum pipe pipe) { - u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X); + u32 tmp = intel_de_read(dev_priv, PORT_DFT2_G4X(dev_priv)); switch (pipe) { case PIPE_A: @@ -246,7 +247,7 @@ static void vlv_undo_pipe_scramble_reset(struct drm_i915_private *dev_priv, } if (!(tmp & PIPE_SCRAMBLE_RESET_MASK)) tmp &= ~DC_BALANCE_RESET_VLV; - intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); + intel_de_write(dev_priv, PORT_DFT2_G4X(dev_priv), tmp); } static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source, @@ -608,8 +609,8 @@ int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name) goto out; pipe_crc->source = source; - intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val); - intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); + intel_de_write(dev_priv, PIPE_CRC_CTL(dev_priv, pipe), val); + intel_de_posting_read(dev_priv, PIPE_CRC_CTL(dev_priv, pipe)); if (!source) { if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) @@ -643,8 +644,8 @@ void intel_crtc_enable_pipe_crc(struct intel_crtc *crtc) /* Don't need pipe_crc->lock here, IRQs are not generated. */ pipe_crc->skipped = 0; - intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val); - intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); + intel_de_write(dev_priv, PIPE_CRC_CTL(dev_priv, pipe), val); + intel_de_posting_read(dev_priv, PIPE_CRC_CTL(dev_priv, pipe)); } void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc) @@ -658,7 +659,7 @@ void intel_crtc_disable_pipe_crc(struct intel_crtc *crtc) pipe_crc->skipped = INT_MIN; spin_unlock_irq(&pipe_crc->lock); - intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), 0); - intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); + intel_de_write(dev_priv, PIPE_CRC_CTL(dev_priv, pipe), 0); + intel_de_posting_read(dev_priv, PIPE_CRC_CTL(dev_priv, pipe)); intel_synchronize_irq(dev_priv); } |