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path: root/drivers/gpu/drm/i915/display/intel_tv.c
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Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_tv.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_tv.c357
1 files changed, 183 insertions, 174 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index dcf89d701f0f..e3ab49815a3c 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -33,15 +33,21 @@
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_edid.h>
+#include <drm/drm_print.h>
+#include <drm/drm_probe_helper.h>
-#include "i915_drv.h"
#include "intel_connector.h"
#include "intel_crtc.h"
#include "intel_de.h"
+#include "intel_display_driver.h"
+#include "intel_display_irq.h"
+#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_dpll.h"
#include "intel_hotplug.h"
+#include "intel_load_detect.h"
#include "intel_tv.h"
+#include "intel_tv_regs.h"
enum tv_margin {
TV_MARGIN_LEFT, TV_MARGIN_TOP,
@@ -880,7 +886,8 @@ struct intel_tv_connector_state {
bool bypass_vfilter;
};
-#define to_intel_tv_connector_state(x) container_of(x, struct intel_tv_connector_state, base)
+#define to_intel_tv_connector_state(conn_state) \
+ container_of_const((conn_state), struct intel_tv_connector_state, base)
static struct drm_connector_state *
intel_tv_connector_duplicate_state(struct drm_connector *connector)
@@ -908,8 +915,8 @@ static struct intel_tv *intel_attached_tv(struct intel_connector *connector)
static bool
intel_tv_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- u32 tmp = intel_de_read(dev_priv, TV_CTL);
+ struct intel_display *display = to_intel_display(encoder);
+ u32 tmp = intel_de_read(display, TV_CTL);
*pipe = (tmp & TV_ENC_PIPE_SEL_MASK) >> TV_ENC_PIPE_SEL_SHIFT;
@@ -922,14 +929,12 @@ intel_enable_tv(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
/* Prevents vblank waits from timing out in intel_tv_detect_type() */
intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc));
- intel_de_write(dev_priv, TV_CTL,
- intel_de_read(dev_priv, TV_CTL) | TV_ENC_ENABLE);
+ intel_de_rmw(display, TV_CTL, 0, TV_ENC_ENABLE);
}
static void
@@ -938,29 +943,30 @@ intel_disable_tv(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
- intel_de_write(dev_priv, TV_CTL,
- intel_de_read(dev_priv, TV_CTL) & ~TV_ENC_ENABLE);
+ intel_de_rmw(display, TV_CTL, TV_ENC_ENABLE, 0);
}
static const struct tv_mode *intel_tv_mode_find(const struct drm_connector_state *conn_state)
{
- int format = conn_state->tv.mode;
+ int format = conn_state->tv.legacy_mode;
return &tv_modes[format];
}
static enum drm_mode_status
intel_tv_mode_valid(struct drm_connector *connector,
- struct drm_display_mode *mode)
+ const struct drm_display_mode *mode)
{
+ struct intel_display *display = to_intel_display(connector->dev);
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
- int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
+ int max_dotclk = display->cdclk.max_dotclk_freq;
+ enum drm_mode_status status;
- if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
- return MODE_NO_DBLESCAN;
+ status = intel_cpu_transcoder_mode_valid(display, mode);
+ if (status != MODE_OK)
+ return status;
if (mode->clock > max_dotclk)
return MODE_CLOCK_HIGH;
@@ -1085,7 +1091,7 @@ static void
intel_tv_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct drm_display_mode *adjusted_mode =
&pipe_config->hw.adjusted_mode;
struct drm_display_mode mode = {};
@@ -1097,11 +1103,11 @@ intel_tv_get_config(struct intel_encoder *encoder,
pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT);
- tv_ctl = intel_de_read(dev_priv, TV_CTL);
- hctl1 = intel_de_read(dev_priv, TV_H_CTL_1);
- hctl3 = intel_de_read(dev_priv, TV_H_CTL_3);
- vctl1 = intel_de_read(dev_priv, TV_V_CTL_1);
- vctl2 = intel_de_read(dev_priv, TV_V_CTL_2);
+ tv_ctl = intel_de_read(display, TV_CTL);
+ hctl1 = intel_de_read(display, TV_H_CTL_1);
+ hctl3 = intel_de_read(display, TV_H_CTL_3);
+ vctl1 = intel_de_read(display, TV_V_CTL_1);
+ vctl2 = intel_de_read(display, TV_V_CTL_2);
tv_mode.htotal = (hctl1 & TV_HTOTAL_MASK) >> TV_HTOTAL_SHIFT;
tv_mode.hsync_end = (hctl1 & TV_HSYNC_END_MASK) >> TV_HSYNC_END_SHIFT;
@@ -1136,17 +1142,17 @@ intel_tv_get_config(struct intel_encoder *encoder,
break;
}
- tmp = intel_de_read(dev_priv, TV_WIN_POS);
+ tmp = intel_de_read(display, TV_WIN_POS);
xpos = tmp >> 16;
ypos = tmp & 0xffff;
- tmp = intel_de_read(dev_priv, TV_WIN_SIZE);
+ tmp = intel_de_read(display, TV_WIN_SIZE);
xsize = tmp >> 16;
ysize = tmp & 0xffff;
intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock);
- drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n",
+ drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(&mode));
intel_tv_scale_mode_horiz(&mode, hdisplay,
@@ -1159,15 +1165,15 @@ intel_tv_get_config(struct intel_encoder *encoder,
adjusted_mode->crtc_clock /= 2;
/* pixel counter doesn't work on i965gm TV output */
- if (IS_I965GM(dev_priv))
+ if (display->platform.i965gm)
pipe_config->mode_flags |=
I915_MODE_FLAG_USE_SCANLINE_COUNTER;
}
-static bool intel_tv_source_too_wide(struct drm_i915_private *dev_priv,
+static bool intel_tv_source_too_wide(struct intel_display *display,
int hdisplay)
{
- return DISPLAY_VER(dev_priv) == 3 && hdisplay > 1024;
+ return DISPLAY_VER(display) == 3 && hdisplay > 1024;
}
static bool intel_tv_vert_scaling(const struct drm_display_mode *tv_mode,
@@ -1185,10 +1191,10 @@ intel_tv_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct intel_atomic_state *state =
to_intel_atomic_state(pipe_config->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_tv_connector_state *tv_conn_state =
to_intel_tv_connector_state(conn_state);
const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
@@ -1204,9 +1210,10 @@ intel_tv_compute_config(struct intel_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
return -EINVAL;
+ pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
- drm_dbg_kms(&dev_priv->drm, "forcing bpc to 8 for TV\n");
+ drm_dbg_kms(display->drm, "forcing bpc to 8 for TV\n");
pipe_config->pipe_bpp = 8*3;
pipe_config->port_clock = tv_mode->clock;
@@ -1220,14 +1227,14 @@ intel_tv_compute_config(struct intel_encoder *encoder,
intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock);
drm_mode_set_crtcinfo(adjusted_mode, 0);
- if (intel_tv_source_too_wide(dev_priv, hdisplay) ||
+ if (intel_tv_source_too_wide(display, hdisplay) ||
!intel_tv_vert_scaling(adjusted_mode, conn_state, vdisplay)) {
int extra, top, bottom;
extra = adjusted_mode->crtc_vdisplay - vdisplay;
if (extra < 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"No vertical scaling for >1024 pixel wide modes\n");
return -EINVAL;
}
@@ -1261,7 +1268,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
tv_conn_state->bypass_vfilter = false;
}
- drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n",
+ drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(adjusted_mode));
/*
@@ -1318,7 +1325,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
* the active portion. Hence following this formula seems
* more trouble that it's worth.
*
- * if (GRAPHICS_VER(dev_priv) == 4) {
+ * if (DISPLAY_VER(dev_priv) == 4) {
* num = cdclk * (tv_mode->oversample >> !tv_mode->progressive);
* den = tv_mode->clock;
* } else {
@@ -1339,7 +1346,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
adjusted_mode->name[0] = '\0';
/* pixel counter doesn't work on i965gm TV output */
- if (IS_I965GM(dev_priv))
+ if (display->platform.i965gm)
pipe_config->mode_flags |=
I915_MODE_FLAG_USE_SCANLINE_COUNTER;
@@ -1347,7 +1354,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
}
static void
-set_tv_mode_timings(struct drm_i915_private *dev_priv,
+set_tv_mode_timings(struct intel_display *display,
const struct tv_mode *tv_mode,
bool burst_ena)
{
@@ -1393,35 +1400,32 @@ set_tv_mode_timings(struct drm_i915_private *dev_priv,
vctl7 = (tv_mode->vburst_start_f4 << TV_VBURST_START_F4_SHIFT) |
(tv_mode->vburst_end_f4 << TV_VBURST_END_F4_SHIFT);
- intel_de_write(dev_priv, TV_H_CTL_1, hctl1);
- intel_de_write(dev_priv, TV_H_CTL_2, hctl2);
- intel_de_write(dev_priv, TV_H_CTL_3, hctl3);
- intel_de_write(dev_priv, TV_V_CTL_1, vctl1);
- intel_de_write(dev_priv, TV_V_CTL_2, vctl2);
- intel_de_write(dev_priv, TV_V_CTL_3, vctl3);
- intel_de_write(dev_priv, TV_V_CTL_4, vctl4);
- intel_de_write(dev_priv, TV_V_CTL_5, vctl5);
- intel_de_write(dev_priv, TV_V_CTL_6, vctl6);
- intel_de_write(dev_priv, TV_V_CTL_7, vctl7);
+ intel_de_write(display, TV_H_CTL_1, hctl1);
+ intel_de_write(display, TV_H_CTL_2, hctl2);
+ intel_de_write(display, TV_H_CTL_3, hctl3);
+ intel_de_write(display, TV_V_CTL_1, vctl1);
+ intel_de_write(display, TV_V_CTL_2, vctl2);
+ intel_de_write(display, TV_V_CTL_3, vctl3);
+ intel_de_write(display, TV_V_CTL_4, vctl4);
+ intel_de_write(display, TV_V_CTL_5, vctl5);
+ intel_de_write(display, TV_V_CTL_6, vctl6);
+ intel_de_write(display, TV_V_CTL_7, vctl7);
}
-static void set_color_conversion(struct drm_i915_private *dev_priv,
+static void set_color_conversion(struct intel_display *display,
const struct color_conversion *color_conversion)
{
- if (!color_conversion)
- return;
-
- intel_de_write(dev_priv, TV_CSC_Y,
+ intel_de_write(display, TV_CSC_Y,
(color_conversion->ry << 16) | color_conversion->gy);
- intel_de_write(dev_priv, TV_CSC_Y2,
+ intel_de_write(display, TV_CSC_Y2,
(color_conversion->by << 16) | color_conversion->ay);
- intel_de_write(dev_priv, TV_CSC_U,
+ intel_de_write(display, TV_CSC_U,
(color_conversion->ru << 16) | color_conversion->gu);
- intel_de_write(dev_priv, TV_CSC_U2,
+ intel_de_write(display, TV_CSC_U2,
(color_conversion->bu << 16) | color_conversion->au);
- intel_de_write(dev_priv, TV_CSC_V,
+ intel_de_write(display, TV_CSC_V,
(color_conversion->rv << 16) | color_conversion->gv);
- intel_de_write(dev_priv, TV_CSC_V2,
+ intel_de_write(display, TV_CSC_V2,
(color_conversion->bv << 16) | color_conversion->av);
}
@@ -1430,7 +1434,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_tv *intel_tv = enc_to_tv(encoder);
const struct intel_tv_connector_state *tv_conn_state =
@@ -1445,10 +1449,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
int xpos, ypos;
unsigned int xsize, ysize;
- if (!tv_mode)
- return; /* can't happen (mode_prepare prevents this) */
-
- tv_ctl = intel_de_read(dev_priv, TV_CTL);
+ tv_ctl = intel_de_read(display, TV_CTL);
tv_ctl &= TV_CTL_SAVE;
switch (intel_tv->type) {
@@ -1520,33 +1521,33 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
/* Enable two fixes for the chips that need them. */
- if (IS_I915GM(dev_priv))
+ if (display->platform.i915gm)
tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
- set_tv_mode_timings(dev_priv, tv_mode, burst_ena);
+ set_tv_mode_timings(display, tv_mode, burst_ena);
- intel_de_write(dev_priv, TV_SC_CTL_1, scctl1);
- intel_de_write(dev_priv, TV_SC_CTL_2, scctl2);
- intel_de_write(dev_priv, TV_SC_CTL_3, scctl3);
+ intel_de_write(display, TV_SC_CTL_1, scctl1);
+ intel_de_write(display, TV_SC_CTL_2, scctl2);
+ intel_de_write(display, TV_SC_CTL_3, scctl3);
- set_color_conversion(dev_priv, color_conversion);
+ set_color_conversion(display, color_conversion);
- if (DISPLAY_VER(dev_priv) >= 4)
- intel_de_write(dev_priv, TV_CLR_KNOBS, 0x00404000);
+ if (DISPLAY_VER(display) >= 4)
+ intel_de_write(display, TV_CLR_KNOBS, 0x00404000);
else
- intel_de_write(dev_priv, TV_CLR_KNOBS, 0x00606000);
+ intel_de_write(display, TV_CLR_KNOBS, 0x00606000);
if (video_levels)
- intel_de_write(dev_priv, TV_CLR_LEVEL,
+ intel_de_write(display, TV_CLR_LEVEL,
((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
- assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
+ assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
/* Filter ctl must be set before TV_WIN_SIZE */
tv_filter_ctl = TV_AUTO_SCALE;
if (tv_conn_state->bypass_vfilter)
tv_filter_ctl |= TV_V_FILTER_BYPASS;
- intel_de_write(dev_priv, TV_FILTER_CTL_1, tv_filter_ctl);
+ intel_de_write(display, TV_FILTER_CTL_1, tv_filter_ctl);
xsize = tv_mode->hblank_start - tv_mode->hblank_end;
ysize = intel_tv_mode_vdisplay(tv_mode);
@@ -1557,49 +1558,48 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
conn_state->tv.margins.right);
ysize -= (tv_conn_state->margins.top +
tv_conn_state->margins.bottom);
- intel_de_write(dev_priv, TV_WIN_POS, (xpos << 16) | ypos);
- intel_de_write(dev_priv, TV_WIN_SIZE, (xsize << 16) | ysize);
+ intel_de_write(display, TV_WIN_POS, (xpos << 16) | ypos);
+ intel_de_write(display, TV_WIN_SIZE, (xsize << 16) | ysize);
j = 0;
for (i = 0; i < 60; i++)
- intel_de_write(dev_priv, TV_H_LUMA(i),
+ intel_de_write(display, TV_H_LUMA(i),
tv_mode->filter_table[j++]);
for (i = 0; i < 60; i++)
- intel_de_write(dev_priv, TV_H_CHROMA(i),
+ intel_de_write(display, TV_H_CHROMA(i),
tv_mode->filter_table[j++]);
for (i = 0; i < 43; i++)
- intel_de_write(dev_priv, TV_V_LUMA(i),
+ intel_de_write(display, TV_V_LUMA(i),
tv_mode->filter_table[j++]);
for (i = 0; i < 43; i++)
- intel_de_write(dev_priv, TV_V_CHROMA(i),
+ intel_de_write(display, TV_V_CHROMA(i),
tv_mode->filter_table[j++]);
- intel_de_write(dev_priv, TV_DAC,
- intel_de_read(dev_priv, TV_DAC) & TV_DAC_SAVE);
- intel_de_write(dev_priv, TV_CTL, tv_ctl);
+ intel_de_write(display, TV_DAC,
+ intel_de_read(display, TV_DAC) & TV_DAC_SAVE);
+ intel_de_write(display, TV_CTL, tv_ctl);
}
static int
intel_tv_detect_type(struct intel_tv *intel_tv,
struct drm_connector *connector)
{
+ struct intel_display *display = to_intel_display(connector->dev);
struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc);
- struct drm_device *dev = connector->dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
u32 tv_ctl, save_tv_ctl;
u32 tv_dac, save_tv_dac;
int type;
/* Disable TV interrupts around load detect or we'll recurse */
if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
- spin_lock_irq(&dev_priv->irq_lock);
- i915_disable_pipestat(dev_priv, 0,
+ spin_lock_irq(&display->irq.lock);
+ i915_disable_pipestat(display, 0,
PIPE_HOTPLUG_INTERRUPT_STATUS |
PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
- spin_unlock_irq(&dev_priv->irq_lock);
+ spin_unlock_irq(&display->irq.lock);
}
- save_tv_dac = tv_dac = intel_de_read(dev_priv, TV_DAC);
- save_tv_ctl = tv_ctl = intel_de_read(dev_priv, TV_CTL);
+ save_tv_dac = tv_dac = intel_de_read(display, TV_DAC);
+ save_tv_ctl = tv_ctl = intel_de_read(display, TV_CTL);
/* Poll for TV detection */
tv_ctl &= ~(TV_ENC_ENABLE | TV_ENC_PIPE_SEL_MASK | TV_TEST_MODE_MASK);
@@ -1621,19 +1621,19 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
* The TV sense state should be cleared to zero on cantiga platform. Otherwise
* the TV is misdetected. This is hardware requirement.
*/
- if (IS_GM45(dev_priv))
+ if (display->platform.gm45)
tv_dac &= ~(TVDAC_STATE_CHG_EN | TVDAC_A_SENSE_CTL |
TVDAC_B_SENSE_CTL | TVDAC_C_SENSE_CTL);
- intel_de_write(dev_priv, TV_CTL, tv_ctl);
- intel_de_write(dev_priv, TV_DAC, tv_dac);
- intel_de_posting_read(dev_priv, TV_DAC);
+ intel_de_write(display, TV_CTL, tv_ctl);
+ intel_de_write(display, TV_DAC, tv_dac);
+ intel_de_posting_read(display, TV_DAC);
intel_crtc_wait_for_next_vblank(crtc);
type = -1;
- tv_dac = intel_de_read(dev_priv, TV_DAC);
- drm_dbg_kms(&dev_priv->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac);
+ tv_dac = intel_de_read(display, TV_DAC);
+ drm_dbg_kms(display->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac);
/*
* A B C
* 0 1 1 Composite
@@ -1641,36 +1641,36 @@ intel_tv_detect_type(struct intel_tv *intel_tv,
* 0 0 0 Component
*/
if ((tv_dac & TVDAC_SENSE_MASK) == (TVDAC_B_SENSE | TVDAC_C_SENSE)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Detected Composite TV connection\n");
type = DRM_MODE_CONNECTOR_Composite;
} else if ((tv_dac & (TVDAC_A_SENSE|TVDAC_B_SENSE)) == TVDAC_A_SENSE) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Detected S-Video TV connection\n");
type = DRM_MODE_CONNECTOR_SVIDEO;
} else if ((tv_dac & TVDAC_SENSE_MASK) == 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Detected Component TV connection\n");
type = DRM_MODE_CONNECTOR_Component;
} else {
- drm_dbg_kms(&dev_priv->drm, "Unrecognised TV connection\n");
+ drm_dbg_kms(display->drm, "Unrecognised TV connection\n");
type = -1;
}
- intel_de_write(dev_priv, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN);
- intel_de_write(dev_priv, TV_CTL, save_tv_ctl);
- intel_de_posting_read(dev_priv, TV_CTL);
+ intel_de_write(display, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN);
+ intel_de_write(display, TV_CTL, save_tv_ctl);
+ intel_de_posting_read(display, TV_CTL);
/* For unknown reasons the hw barfs if we don't do this vblank wait. */
intel_crtc_wait_for_next_vblank(crtc);
/* Restore interrupt config */
if (connector->polled & DRM_CONNECTOR_POLL_HPD) {
- spin_lock_irq(&dev_priv->irq_lock);
- i915_enable_pipestat(dev_priv, 0,
+ spin_lock_irq(&display->irq.lock);
+ i915_enable_pipestat(display, 0,
PIPE_HOTPLUG_INTERRUPT_STATUS |
PIPE_HOTPLUG_TV_INTERRUPT_STATUS);
- spin_unlock_irq(&dev_priv->irq_lock);
+ spin_unlock_irq(&display->irq.lock);
}
return type;
@@ -1701,7 +1701,7 @@ static void intel_tv_find_better_format(struct drm_connector *connector)
break;
}
- connector->state->tv.mode = i;
+ connector->state->tv.legacy_mode = i;
}
static int
@@ -1709,33 +1709,36 @@ intel_tv_detect(struct drm_connector *connector,
struct drm_modeset_acquire_ctx *ctx,
bool force)
{
- struct drm_i915_private *i915 = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
struct intel_tv *intel_tv = intel_attached_tv(to_intel_connector(connector));
enum drm_connector_status status;
int type;
- drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] force=%d\n",
+ drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n",
connector->base.id, connector->name, force);
- if (!INTEL_DISPLAY_ENABLED(i915))
+ if (!intel_display_device_enabled(display))
return connector_status_disconnected;
+ if (!intel_display_driver_check_access(display))
+ return connector->status;
+
if (force) {
- struct intel_load_detect_pipe tmp;
- int ret;
+ struct drm_atomic_state *state;
- ret = intel_get_load_detect_pipe(connector, &tmp, ctx);
- if (ret < 0)
- return ret;
+ state = intel_load_detect_get_pipe(connector, ctx);
+ if (IS_ERR(state))
+ return PTR_ERR(state);
- if (ret > 0) {
+ if (state) {
type = intel_tv_detect_type(intel_tv, connector);
- intel_release_load_detect_pipe(connector, &tmp, ctx);
+ intel_load_detect_release_pipe(connector, state, ctx);
status = type < 0 ?
connector_status_disconnected :
connector_status_connected;
- } else
+ } else {
status = connector_status_unknown;
+ }
if (status == connector_status_connected) {
intel_tv->type = type;
@@ -1786,7 +1789,7 @@ intel_tv_set_mode_type(struct drm_display_mode *mode,
static int
intel_tv_get_modes(struct drm_connector *connector)
{
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
int i, count = 0;
@@ -1800,7 +1803,7 @@ intel_tv_get_modes(struct drm_connector *connector)
continue;
/* no vertical scaling with wide sources on gen3 */
- if (DISPLAY_VER(dev_priv) == 3 && input->w > 1024 &&
+ if (DISPLAY_VER(display) == 3 && input->w > 1024 &&
input->h > intel_tv_mode_vdisplay(tv_mode))
continue;
@@ -1817,7 +1820,8 @@ intel_tv_get_modes(struct drm_connector *connector)
*/
intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock);
if (count == 0) {
- drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n",
+ drm_dbg_kms(display->drm,
+ "TV mode: " DRM_MODE_FMT "\n",
DRM_MODE_ARG(mode));
}
intel_tv_scale_mode_horiz(mode, input->w, 0, 0);
@@ -1856,7 +1860,7 @@ static int intel_tv_atomic_check(struct drm_connector *connector,
old_state = drm_atomic_get_old_connector_state(state, connector);
new_crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
- if (old_state->tv.mode != new_state->tv.mode ||
+ if (old_state->tv.legacy_mode != new_state->tv.legacy_mode ||
old_state->tv.margins.left != new_state->tv.margins.left ||
old_state->tv.margins.right != new_state->tv.margins.right ||
old_state->tv.margins.top != new_state->tv.margins.top ||
@@ -1880,24 +1884,62 @@ static const struct drm_encoder_funcs intel_tv_enc_funcs = {
.destroy = intel_encoder_destroy,
};
+static void intel_tv_add_properties(struct drm_connector *connector)
+{
+ struct intel_display *display = to_intel_display(connector->dev);
+ struct drm_connector_state *conn_state = connector->state;
+ const char *tv_format_names[ARRAY_SIZE(tv_modes)];
+ int i;
+
+ /* BIOS margin values */
+ conn_state->tv.margins.left = 54;
+ conn_state->tv.margins.top = 36;
+ conn_state->tv.margins.right = 46;
+ conn_state->tv.margins.bottom = 37;
+
+ conn_state->tv.legacy_mode = 0;
+
+ /* Create TV properties then attach current values */
+ for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
+ /* 1080p50/1080p60 not supported on gen3 */
+ if (DISPLAY_VER(display) == 3 && tv_modes[i].oversample == 1)
+ break;
+
+ tv_format_names[i] = tv_modes[i].name;
+ }
+ drm_mode_create_tv_properties_legacy(display->drm, i, tv_format_names);
+
+ drm_object_attach_property(&connector->base,
+ display->drm->mode_config.legacy_tv_mode_property,
+ conn_state->tv.legacy_mode);
+ drm_object_attach_property(&connector->base,
+ display->drm->mode_config.tv_left_margin_property,
+ conn_state->tv.margins.left);
+ drm_object_attach_property(&connector->base,
+ display->drm->mode_config.tv_top_margin_property,
+ conn_state->tv.margins.top);
+ drm_object_attach_property(&connector->base,
+ display->drm->mode_config.tv_right_margin_property,
+ conn_state->tv.margins.right);
+ drm_object_attach_property(&connector->base,
+ display->drm->mode_config.tv_bottom_margin_property,
+ conn_state->tv.margins.bottom);
+}
+
void
-intel_tv_init(struct drm_i915_private *dev_priv)
+intel_tv_init(struct intel_display *display)
{
- struct drm_device *dev = &dev_priv->drm;
struct drm_connector *connector;
struct intel_tv *intel_tv;
struct intel_encoder *intel_encoder;
struct intel_connector *intel_connector;
u32 tv_dac_on, tv_dac_off, save_tv_dac;
- const char *tv_format_names[ARRAY_SIZE(tv_modes)];
- int i, initial_mode = 0;
- struct drm_connector_state *state;
- if ((intel_de_read(dev_priv, TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED)
+ if ((intel_de_read(display, TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED)
return;
- if (!intel_bios_is_tv_present(dev_priv)) {
- drm_dbg_kms(&dev_priv->drm, "Integrated TV is not present.\n");
+ if (!intel_bios_is_tv_present(display)) {
+ drm_dbg_kms(display->drm, "Integrated TV is not present.\n");
return;
}
@@ -1905,15 +1947,15 @@ intel_tv_init(struct drm_i915_private *dev_priv)
* Sanity check the TV output by checking to see if the
* DAC register holds a value
*/
- save_tv_dac = intel_de_read(dev_priv, TV_DAC);
+ save_tv_dac = intel_de_read(display, TV_DAC);
- intel_de_write(dev_priv, TV_DAC, save_tv_dac | TVDAC_STATE_CHG_EN);
- tv_dac_on = intel_de_read(dev_priv, TV_DAC);
+ intel_de_write(display, TV_DAC, save_tv_dac | TVDAC_STATE_CHG_EN);
+ tv_dac_on = intel_de_read(display, TV_DAC);
- intel_de_write(dev_priv, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN);
- tv_dac_off = intel_de_read(dev_priv, TV_DAC);
+ intel_de_write(display, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN);
+ tv_dac_off = intel_de_read(display, TV_DAC);
- intel_de_write(dev_priv, TV_DAC, save_tv_dac);
+ intel_de_write(display, TV_DAC, save_tv_dac);
/*
* If the register does not hold the state change enable
@@ -1937,7 +1979,6 @@ intel_tv_init(struct drm_i915_private *dev_priv)
intel_encoder = &intel_tv->base;
connector = &intel_connector->base;
- state = connector->state;
/*
* The documentation, for the older chipsets at least, recommend
@@ -1950,11 +1991,13 @@ intel_tv_init(struct drm_i915_private *dev_priv)
* More recent chipsets favour HDMI rather than integrated S-Video.
*/
intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
+ intel_connector->base.polled = intel_connector->polled;
- drm_connector_init(dev, connector, &intel_tv_connector_funcs,
+ drm_connector_init(display->drm, connector, &intel_tv_connector_funcs,
DRM_MODE_CONNECTOR_SVIDEO);
- drm_encoder_init(dev, &intel_encoder->base, &intel_tv_enc_funcs,
+ drm_encoder_init(display->drm, &intel_encoder->base,
+ &intel_tv_enc_funcs,
DRM_MODE_ENCODER_TVDAC, "TV");
intel_encoder->compute_config = intel_tv_compute_config;
@@ -1974,41 +2017,7 @@ intel_tv_init(struct drm_i915_private *dev_priv)
intel_encoder->cloneable = 0;
intel_tv->type = DRM_MODE_CONNECTOR_Unknown;
- /* BIOS margin values */
- state->tv.margins.left = 54;
- state->tv.margins.top = 36;
- state->tv.margins.right = 46;
- state->tv.margins.bottom = 37;
-
- state->tv.mode = initial_mode;
-
drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs);
- connector->interlace_allowed = false;
- connector->doublescan_allowed = false;
- /* Create TV properties then attach current values */
- for (i = 0; i < ARRAY_SIZE(tv_modes); i++) {
- /* 1080p50/1080p60 not supported on gen3 */
- if (DISPLAY_VER(dev_priv) == 3 &&
- tv_modes[i].oversample == 1)
- break;
-
- tv_format_names[i] = tv_modes[i].name;
- }
- drm_mode_create_tv_properties(dev, i, tv_format_names);
-
- drm_object_attach_property(&connector->base, dev->mode_config.tv_mode_property,
- state->tv.mode);
- drm_object_attach_property(&connector->base,
- dev->mode_config.tv_left_margin_property,
- state->tv.margins.left);
- drm_object_attach_property(&connector->base,
- dev->mode_config.tv_top_margin_property,
- state->tv.margins.top);
- drm_object_attach_property(&connector->base,
- dev->mode_config.tv_right_margin_property,
- state->tv.margins.right);
- drm_object_attach_property(&connector->base,
- dev->mode_config.tv_bottom_margin_property,
- state->tv.margins.bottom);
+ intel_tv_add_properties(connector);
}