diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_driver.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_driver.c | 892 |
1 files changed, 399 insertions, 493 deletions
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index f2a15d8155f4..c97b76771917 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -27,6 +27,7 @@ * */ +#include <linux/aperture.h> #include <linux/acpi.h> #include <linux/device.h> #include <linux/module.h> @@ -34,33 +35,40 @@ #include <linux/pci.h> #include <linux/pm.h> #include <linux/pm_runtime.h> -#include <linux/pnp.h> #include <linux/slab.h> #include <linux/string_helpers.h> #include <linux/vga_switcheroo.h> #include <linux/vt.h> -#include <drm/drm_aperture.h> #include <drm/drm_atomic_helper.h> +#include <drm/drm_client.h> +#include <drm/drm_client_event.h> #include <drm/drm_ioctl.h> #include <drm/drm_managed.h> #include <drm/drm_probe_helper.h> +#include <drm/intel/display_member.h> +#include <drm/intel/display_parent_interface.h> -#include "display/intel_acpi.h" +#include "display/i9xx_display_sr.h" #include "display/intel_bw.h" #include "display/intel_cdclk.h" -#include "display/intel_display_types.h" +#include "display/intel_crtc.h" +#include "display/intel_display_device.h" +#include "display/intel_display_driver.h" +#include "display/intel_display_power.h" #include "display/intel_dmc.h" #include "display/intel_dp.h" #include "display/intel_dpt.h" +#include "display/intel_encoder.h" #include "display/intel_fbdev.h" +#include "display/intel_gmbus.h" #include "display/intel_hotplug.h" +#include "display/intel_opregion.h" #include "display/intel_overlay.h" #include "display/intel_pch_refclk.h" -#include "display/intel_pipe_crc.h" #include "display/intel_pps.h" -#include "display/intel_sprite.h" -#include "display/intel_vga.h" +#include "display/intel_sbi.h" +#include "display/intel_sprite_uapi.h" #include "display/skl_watermark.h" #include "gem/i915_gem_context.h" @@ -71,176 +79,46 @@ #include "gem/i915_gem_pm.h" #include "gt/intel_gt.h" #include "gt/intel_gt_pm.h" +#include "gt/intel_gt_print.h" #include "gt/intel_rc6.h" +#include "pxp/intel_pxp.h" +#include "pxp/intel_pxp_debugfs.h" #include "pxp/intel_pxp_pm.h" -#include "i915_file_private.h" +#include "soc/intel_dram.h" +#include "soc/intel_gmch.h" + #include "i915_debugfs.h" #include "i915_driver.h" #include "i915_drm_client.h" #include "i915_drv.h" +#include "i915_file_private.h" #include "i915_getparam.h" +#include "i915_hwmon.h" #include "i915_ioc32.h" #include "i915_ioctl.h" #include "i915_irq.h" #include "i915_memcpy.h" #include "i915_perf.h" #include "i915_query.h" -#include "i915_suspend.h" +#include "i915_reg.h" #include "i915_switcheroo.h" #include "i915_sysfs.h" #include "i915_utils.h" #include "i915_vgpu.h" -#include "intel_dram.h" +#include "intel_clock_gating.h" +#include "intel_cpu_info.h" #include "intel_gvt.h" #include "intel_memory_region.h" #include "intel_pci_config.h" #include "intel_pcode.h" -#include "intel_pm.h" #include "intel_region_ttm.h" +#include "vlv_iosf_sb.h" #include "vlv_suspend.h" -/* Intel Rapid Start Technology ACPI device name */ -static const char irst_name[] = "INT3392"; - static const struct drm_driver i915_drm_driver; -static void i915_release_bridge_dev(struct drm_device *dev, - void *bridge) -{ - pci_dev_put(bridge); -} - -static int i915_get_bridge_dev(struct drm_i915_private *dev_priv) -{ - int domain = pci_domain_nr(to_pci_dev(dev_priv->drm.dev)->bus); - - dev_priv->bridge_dev = - pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0)); - if (!dev_priv->bridge_dev) { - drm_err(&dev_priv->drm, "bridge device not found\n"); - return -EIO; - } - - return drmm_add_action_or_reset(&dev_priv->drm, i915_release_bridge_dev, - dev_priv->bridge_dev); -} - -/* Allocate space for the MCH regs if needed, return nonzero on error */ -static int -intel_alloc_mchbar_resource(struct drm_i915_private *dev_priv) -{ - int reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915; - u32 temp_lo, temp_hi = 0; - u64 mchbar_addr; - int ret; - - if (GRAPHICS_VER(dev_priv) >= 4) - pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi); - pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo); - mchbar_addr = ((u64)temp_hi << 32) | temp_lo; - - /* If ACPI doesn't have it, assume we need to allocate it ourselves */ -#ifdef CONFIG_PNP - if (mchbar_addr && - pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) - return 0; -#endif - - /* Get some space for it */ - dev_priv->mch_res.name = "i915 MCHBAR"; - dev_priv->mch_res.flags = IORESOURCE_MEM; - ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus, - &dev_priv->mch_res, - MCHBAR_SIZE, MCHBAR_SIZE, - PCIBIOS_MIN_MEM, - 0, pcibios_align_resource, - dev_priv->bridge_dev); - if (ret) { - drm_dbg(&dev_priv->drm, "failed bus alloc: %d\n", ret); - dev_priv->mch_res.start = 0; - return ret; - } - - if (GRAPHICS_VER(dev_priv) >= 4) - pci_write_config_dword(dev_priv->bridge_dev, reg + 4, - upper_32_bits(dev_priv->mch_res.start)); - - pci_write_config_dword(dev_priv->bridge_dev, reg, - lower_32_bits(dev_priv->mch_res.start)); - return 0; -} - -/* Setup MCHBAR if possible, return true if we should disable it again */ -static void -intel_setup_mchbar(struct drm_i915_private *dev_priv) -{ - int mchbar_reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915; - u32 temp; - bool enabled; - - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) - return; - - dev_priv->mchbar_need_disable = false; - - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { - pci_read_config_dword(dev_priv->bridge_dev, DEVEN, &temp); - enabled = !!(temp & DEVEN_MCHBAR_EN); - } else { - pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp); - enabled = temp & 1; - } - - /* If it's already enabled, don't have to do anything */ - if (enabled) - return; - - if (intel_alloc_mchbar_resource(dev_priv)) - return; - - dev_priv->mchbar_need_disable = true; - - /* Space is allocated or reserved, so enable it. */ - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { - pci_write_config_dword(dev_priv->bridge_dev, DEVEN, - temp | DEVEN_MCHBAR_EN); - } else { - pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp); - pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1); - } -} - -static void -intel_teardown_mchbar(struct drm_i915_private *dev_priv) -{ - int mchbar_reg = GRAPHICS_VER(dev_priv) >= 4 ? MCHBAR_I965 : MCHBAR_I915; - - if (dev_priv->mchbar_need_disable) { - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) { - u32 deven_val; - - pci_read_config_dword(dev_priv->bridge_dev, DEVEN, - &deven_val); - deven_val &= ~DEVEN_MCHBAR_EN; - pci_write_config_dword(dev_priv->bridge_dev, DEVEN, - deven_val); - } else { - u32 mchbar_val; - - pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, - &mchbar_val); - mchbar_val &= ~1; - pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, - mchbar_val); - } - } - - if (dev_priv->mch_res.start) - release_resource(&dev_priv->mch_res); -} - static int i915_workqueues_init(struct drm_i915_private *dev_priv) { /* @@ -261,8 +139,14 @@ static int i915_workqueues_init(struct drm_i915_private *dev_priv) if (dev_priv->wq == NULL) goto out_err; - dev_priv->display.hotplug.dp_wq = alloc_ordered_workqueue("i915-dp", 0); - if (dev_priv->display.hotplug.dp_wq == NULL) + /* + * The unordered i915 workqueue should be used for all work + * scheduling that do not require running in order, which used + * to be scheduled on the system_wq before moving to a driver + * instance due deprecation of flush_scheduled_work(). + */ + dev_priv->unordered_wq = alloc_workqueue("i915-unordered", 0, 0); + if (dev_priv->unordered_wq == NULL) goto out_free_wq; return 0; @@ -277,7 +161,7 @@ out_err: static void i915_workqueues_cleanup(struct drm_i915_private *dev_priv) { - destroy_workqueue(dev_priv->display.hotplug.dp_wq); + destroy_workqueue(dev_priv->unordered_wq); destroy_workqueue(dev_priv->wq); } @@ -295,12 +179,17 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv) { bool pre = false; - pre |= IS_HSW_EARLY_SDV(dev_priv); + pre |= IS_HASWELL_EARLY_SDV(dev_priv); pre |= IS_SKYLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x6; pre |= IS_BROXTON(dev_priv) && INTEL_REVID(dev_priv) < 0xA; pre |= IS_KABYLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x1; pre |= IS_GEMINILAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x3; pre |= IS_ICELAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x7; + pre |= IS_TIGERLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x1; + pre |= IS_DG1(dev_priv) && INTEL_REVID(dev_priv) < 0x1; + pre |= IS_DG2_G10(dev_priv) && INTEL_REVID(dev_priv) < 0x8; + pre |= IS_DG2_G11(dev_priv) && INTEL_REVID(dev_priv) < 0x5; + pre |= IS_DG2_G12(dev_priv) && INTEL_REVID(dev_priv) < 0x1; if (pre) { drm_err(&dev_priv->drm, "This is a pre-production stepping. " @@ -311,12 +200,12 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv) static void sanitize_gpu(struct drm_i915_private *i915) { - if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) { + if (!intel_gt_gpu_reset_clobbers_display(to_gt(i915))) { struct intel_gt *gt; unsigned int i; for_each_gt(gt, i915, i) - __intel_gt_reset(gt, ALL_ENGINES); + intel_gt_reset_all_engines(gt); } } @@ -332,28 +221,23 @@ static void sanitize_gpu(struct drm_i915_private *i915) */ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; int ret = 0; if (i915_inject_probe_failure(dev_priv)) return -ENODEV; - intel_device_info_subplatform_init(dev_priv); + intel_device_info_runtime_init_early(dev_priv); + intel_step_init(dev_priv); intel_uncore_mmio_debug_init_early(dev_priv); - spin_lock_init(&dev_priv->irq_lock); spin_lock_init(&dev_priv->gpu_error.lock); - mutex_init(&dev_priv->display.backlight.lock); + intel_sbi_init(display); + vlv_iosf_sb_init(dev_priv); mutex_init(&dev_priv->sb_lock); - cpu_latency_qos_add_request(&dev_priv->sb_qos, PM_QOS_DEFAULT_VALUE); - - mutex_init(&dev_priv->display.audio.mutex); - mutex_init(&dev_priv->display.wm.wm_mutex); - mutex_init(&dev_priv->display.pps.mutex); - mutex_init(&dev_priv->display.hdcp.comp_mutex); - spin_lock_init(&dev_priv->display.dkl.phy_lock); i915_memcpy_init_early(dev_priv); intel_runtime_pm_init_early(&dev_priv->runtime_pm); @@ -370,35 +254,20 @@ static int i915_driver_early_probe(struct drm_i915_private *dev_priv) if (ret) goto err_ttm; - intel_wopcm_init_early(&dev_priv->wopcm); - ret = intel_root_gt_init_early(dev_priv); if (ret < 0) goto err_rootgt; - i915_drm_clients_init(&dev_priv->clients, dev_priv); - i915_gem_init_early(dev_priv); - /* This must be called before any calls to HAS_PCH_* */ - intel_detect_pch(dev_priv); - - intel_pm_setup(dev_priv); - ret = intel_power_domains_init(dev_priv); - if (ret < 0) - goto err_gem; intel_irq_init(dev_priv); - intel_init_display_hooks(dev_priv); - intel_init_clock_gating_hooks(dev_priv); + intel_display_driver_early_probe(display); + intel_clock_gating_hooks_init(dev_priv); intel_detect_preproduction_hw(dev_priv); return 0; -err_gem: - i915_gem_cleanup_early(dev_priv); - intel_gt_driver_late_release_all(dev_priv); - i915_drm_clients_fini(&dev_priv->clients); err_rootgt: intel_region_ttm_device_fini(dev_priv); err_ttm: @@ -415,19 +284,23 @@ err_workqueues: */ static void i915_driver_late_release(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; + intel_irq_fini(dev_priv); - intel_power_domains_cleanup(dev_priv); + intel_power_domains_cleanup(display); i915_gem_cleanup_early(dev_priv); intel_gt_driver_late_release_all(dev_priv); - i915_drm_clients_fini(&dev_priv->clients); intel_region_ttm_device_fini(dev_priv); vlv_suspend_cleanup(dev_priv); i915_workqueues_cleanup(dev_priv); - cpu_latency_qos_remove_request(&dev_priv->sb_qos); mutex_destroy(&dev_priv->sb_lock); + vlv_iosf_sb_fini(dev_priv); + intel_sbi_fini(display); i915_params_free(&dev_priv->params); + + intel_display_device_remove(display); } /** @@ -441,13 +314,14 @@ static void i915_driver_late_release(struct drm_i915_private *dev_priv) */ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; struct intel_gt *gt; int ret, i; if (i915_inject_probe_failure(dev_priv)) return -ENODEV; - ret = i915_get_bridge_dev(dev_priv); + ret = intel_gmch_bridge_setup(dev_priv); if (ret < 0) return ret; @@ -464,8 +338,9 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) } /* Try to make sure MCHBAR is enabled before poking at it */ - intel_setup_mchbar(dev_priv); + intel_gmch_bar_setup(dev_priv); intel_device_info_runtime_init(dev_priv); + intel_display_device_info_runtime_init(display); for_each_gt(gt, dev_priv, i) { ret = intel_gt_init_mmio(gt); @@ -479,7 +354,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv) return 0; err_uncore: - intel_teardown_mchbar(dev_priv); + intel_gmch_bar_teardown(dev_priv); return ret; } @@ -490,7 +365,7 @@ err_uncore: */ static void i915_driver_mmio_release(struct drm_i915_private *dev_priv) { - intel_teardown_mchbar(dev_priv); + intel_gmch_bar_teardown(dev_priv); } /** @@ -548,6 +423,18 @@ mask_err: return ret; } +/* Wa_14022698537:dg2 */ +static void i915_enable_g8(struct drm_i915_private *i915) +{ + if (IS_DG2(i915)) { + if (IS_DG2_D(i915) && !intel_match_g8_cpu()) + return; + + snb_pcode_write_p(&i915->uncore, PCODE_POWER_SETUP, + POWER_SETUP_SUBCOMMAND_G8_ENABLE, 0, 0); + } +} + static int i915_pcode_init(struct drm_i915_private *i915) { struct intel_gt *gt; @@ -556,11 +443,12 @@ static int i915_pcode_init(struct drm_i915_private *i915) for_each_gt(gt, i915, id) { ret = intel_pcode_init(gt->uncore); if (ret) { - drm_err(>->i915->drm, "gt%d: intel_pcode_init failed %d\n", id, ret); + gt_err(gt, "intel_pcode_init failed %d\n", ret); return ret; } } + i915_enable_g8(i915); return 0; } @@ -573,8 +461,8 @@ static int i915_pcode_init(struct drm_i915_private *i915) */ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); - struct pci_dev *root_pdev; int ret; if (i915_inject_probe_failure(dev_priv)) @@ -583,8 +471,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (HAS_PPGTT(dev_priv)) { if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_full_ppgtt(dev_priv)) { - i915_report_error(dev_priv, - "incompatible vGPU found, support for isolated ppGTT required\n"); + drm_err(&dev_priv->drm, + "incompatible vGPU found, support for isolated ppGTT required\n"); return -ENXIO; } } @@ -597,8 +485,8 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) */ if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_hwsp_emulation(dev_priv)) { - i915_report_error(dev_priv, - "old vGPU host found, support for HWSP emulation required\n"); + drm_err(&dev_priv->drm, + "old vGPU host found, support for HWSP emulation required\n"); return -ENXIO; } } @@ -610,17 +498,15 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) return ret; - i915_perf_init(dev_priv); - - ret = intel_gt_assign_ggtt(to_gt(dev_priv)); + ret = i915_perf_init(dev_priv); if (ret) - goto err_perf; + return ret; ret = i915_ggtt_probe_hw(dev_priv); if (ret) goto err_perf; - ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, dev_priv->drm.driver); + ret = aperture_remove_conflicting_pci_devices(pdev, dev_priv->drm.driver->name); if (ret) goto err_ggtt; @@ -628,13 +514,17 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) goto err_ggtt; - ret = intel_memory_regions_hw_probe(dev_priv); + /* + * Make sure we probe lmem before we probe stolen-lmem. The BAR size + * might be different due to bar resizing. + */ + ret = intel_gt_tiles_init(dev_priv); if (ret) goto err_ggtt; - ret = intel_gt_tiles_init(dev_priv); + ret = intel_memory_regions_hw_probe(dev_priv); if (ret) - goto err_mem_regions; + goto err_ggtt; ret = i915_ggtt_enable_hw(dev_priv); if (ret) { @@ -672,31 +562,26 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv) if (ret) goto err_msi; - intel_opregion_setup(dev_priv); + intel_opregion_setup(display); ret = i915_pcode_init(dev_priv); if (ret) - goto err_msi; + goto err_opregion; /* * Fill the dram structure to get the system dram info. This will be * used for memory latency calculation. */ - intel_dram_detect(dev_priv); - - intel_bw_init_hw(dev_priv); + ret = intel_dram_detect(dev_priv); + if (ret) + goto err_opregion; - /* - * FIXME: Temporary hammer to avoid freezing the machine on our DGFX - * This should be totally removed when we handle the pci states properly - * on runtime PM and on s2idle cases. - */ - root_pdev = pcie_find_root_port(pdev); - if (root_pdev) - pci_d3cold_disable(root_pdev); + intel_bw_init_hw(display); return 0; +err_opregion: + intel_opregion_cleanup(display); err_msi: if (pdev->msi_enabled) pci_disable_msi(pdev); @@ -717,17 +602,15 @@ err_perf: */ static void i915_driver_hw_remove(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); - struct pci_dev *root_pdev; i915_perf_fini(dev_priv); + intel_opregion_cleanup(display); + if (pdev->msi_enabled) pci_disable_msi(pdev); - - root_pdev = pcie_find_root_port(pdev); - if (root_pdev) - pci_d3cold_enable(root_pdev); } /** @@ -737,11 +620,12 @@ static void i915_driver_hw_remove(struct drm_i915_private *dev_priv) * Perform any steps necessary to make the driver available via kernel * internal or userspace interfaces. */ -static void i915_driver_register(struct drm_i915_private *dev_priv) +static int i915_driver_register(struct drm_i915_private *dev_priv) { - struct drm_device *dev = &dev_priv->drm; + struct intel_display *display = dev_priv->display; struct intel_gt *gt; unsigned int i; + int ret; i915_gem_driver_register(dev_priv); i915_pmu_register(dev_priv); @@ -749,10 +633,14 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) intel_vgpu_register(dev_priv); /* Reveal our presence to userspace */ - if (drm_dev_register(dev, 0)) { - drm_err(&dev_priv->drm, - "Failed to register driver for userspace access!\n"); - return; + ret = drm_dev_register(&dev_priv->drm, 0); + if (ret) { + i915_probe_error(dev_priv, + "Failed to register driver for userspace access!\n"); + drm_dev_unregister(&dev_priv->drm); + i915_pmu_unregister(dev_priv); + i915_gem_driver_unregister(dev_priv); + return ret; } i915_debugfs_register(dev_priv); @@ -764,15 +652,19 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) for_each_gt(gt, dev_priv, i) intel_gt_driver_register(gt); - intel_display_driver_register(dev_priv); + intel_pxp_debugfs_register(dev_priv->pxp); - intel_power_domains_enable(dev_priv); - intel_runtime_pm_enable(&dev_priv->runtime_pm); + i915_hwmon_register(dev_priv); - intel_register_dsm_handler(); + intel_display_driver_register(display); + + intel_power_domains_enable(display); + intel_runtime_pm_enable(&dev_priv->runtime_pm); if (i915_switcheroo_register(dev_priv)) drm_err(&dev_priv->drm, "Failed to register vga switcheroo!\n"); + + return 0; } /** @@ -781,21 +673,24 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) */ static void i915_driver_unregister(struct drm_i915_private *dev_priv) { + struct intel_display *display = dev_priv->display; struct intel_gt *gt; unsigned int i; i915_switcheroo_unregister(dev_priv); - intel_unregister_dsm_handler(); - intel_runtime_pm_disable(&dev_priv->runtime_pm); - intel_power_domains_disable(dev_priv); + intel_power_domains_disable(display); + + intel_display_driver_unregister(display); - intel_display_driver_unregister(dev_priv); + intel_pxp_fini(dev_priv); for_each_gt(gt, dev_priv, i) intel_gt_driver_unregister(gt); + i915_hwmon_unregister(dev_priv); + i915_perf_unregister(dev_priv); i915_pmu_unregister(dev_priv); @@ -815,7 +710,8 @@ i915_print_iommu_status(struct drm_i915_private *i915, struct drm_printer *p) static void i915_welcome_messages(struct drm_i915_private *dev_priv) { if (drm_debug_enabled(DRM_UT_DRIVER)) { - struct drm_printer p = drm_debug_printer("i915 device info:"); + struct drm_printer p = drm_dbg_printer(&dev_priv->drm, DRM_UT_DRIVER, + "device info:"); struct intel_gt *gt; unsigned int i; @@ -843,33 +739,44 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv) "DRM_I915_DEBUG_RUNTIME_PM enabled\n"); } +static const struct intel_display_parent_interface parent = { + .rpm = &i915_display_rpm_interface, +}; + +const struct intel_display_parent_interface *i915_driver_parent_interface(void) +{ + return &parent; +} + +/* Ensure drm and display members are placed properly. */ +INTEL_DISPLAY_MEMBER_STATIC_ASSERT(struct drm_i915_private, drm, display); + static struct drm_i915_private * i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) { const struct intel_device_info *match_info = (struct intel_device_info *)ent->driver_data; - struct intel_device_info *device_info; - struct intel_runtime_info *runtime; struct drm_i915_private *i915; + struct intel_display *display; i915 = devm_drm_dev_alloc(&pdev->dev, &i915_drm_driver, struct drm_i915_private, drm); if (IS_ERR(i915)) return i915; - pci_set_drvdata(pdev, i915); + pci_set_drvdata(pdev, &i915->drm); /* Device parameters start as a copy of module parameters. */ i915_params_copy(&i915->params, &i915_modparams); - /* Setup the write-once "constant" device info */ - device_info = mkwrite_device_info(i915); - memcpy(device_info, match_info, sizeof(*device_info)); + /* Set up device info and initial runtime info. */ + intel_device_info_driver_create(i915, pdev->device, match_info); - /* Initialize initial runtime info from static const data and pdev. */ - runtime = RUNTIME_INFO(i915); - memcpy(runtime, &INTEL_INFO(i915)->__runtime, sizeof(*runtime)); - runtime->device_id = pdev->device; + display = intel_display_device_probe(pdev, &parent); + if (IS_ERR(display)) + return ERR_CAST(display); + + i915->display = display; return i915; } @@ -880,7 +787,7 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) * @ent: matching PCI ID entry * * The driver probe routine has to do several things: - * - drive output discovery via intel_modeset_init() + * - drive output discovery via intel_display_driver_probe() * - initialize the memory manager * - allocate initial config memory * - setup the DRM framebuffer with the allocated memory @@ -888,19 +795,22 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct drm_i915_private *i915; + struct intel_display *display; int ret; + ret = pci_enable_device(pdev); + if (ret) { + pr_err("Failed to enable graphics device: %pe\n", ERR_PTR(ret)); + return ret; + } + i915 = i915_driver_create(pdev, ent); - if (IS_ERR(i915)) + if (IS_ERR(i915)) { + pci_disable_device(pdev); return PTR_ERR(i915); + } - /* Disable nuclear pageflip by default on pre-ILK */ - if (!i915->params.nuclear_pageflip && DISPLAY_VER(i915) < 5) - i915->drm.driver_features &= ~DRIVER_ATOMIC; - - ret = pci_enable_device(pdev); - if (ret) - goto out_fini; + display = i915->display; ret = i915_driver_early_probe(i915); if (ret < 0) @@ -916,13 +826,13 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) ret = i915_driver_mmio_probe(i915); if (ret < 0) - goto out_tiles_cleanup; + goto out_runtime_pm_put; ret = i915_driver_hw_probe(i915); if (ret < 0) goto out_cleanup_mmio; - ret = intel_modeset_init_noirq(i915); + ret = intel_display_driver_probe_noirq(display); if (ret < 0) goto out_cleanup_hw; @@ -930,7 +840,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto out_cleanup_modeset; - ret = intel_modeset_init_nogem(i915); + ret = intel_display_driver_probe_nogem(display); if (ret) goto out_cleanup_irq; @@ -938,11 +848,17 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if (ret) goto out_cleanup_modeset2; - ret = intel_modeset_init(i915); + ret = intel_pxp_init(i915); + if (ret && ret != -ENODEV) + drm_dbg(&i915->drm, "pxp init failed with %d\n", ret); + + ret = intel_display_driver_probe(display); if (ret) goto out_cleanup_gem; - i915_driver_register(i915); + ret = i915_driver_register(i915); + if (ret) + goto out_cleanup_gem; enable_rpm_wakeref_asserts(&i915->runtime_pm); @@ -953,19 +869,20 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) return 0; out_cleanup_gem: + intel_pxp_fini(i915); i915_gem_suspend(i915); i915_gem_driver_remove(i915); i915_gem_driver_release(i915); out_cleanup_modeset2: /* FIXME clean up the error path */ - intel_modeset_driver_remove(i915); + intel_display_driver_remove(display); intel_irq_uninstall(i915); - intel_modeset_driver_remove_noirq(i915); + intel_display_driver_remove_noirq(display); goto out_cleanup_modeset; out_cleanup_irq: intel_irq_uninstall(i915); out_cleanup_modeset: - intel_modeset_driver_remove_nogem(i915); + intel_display_driver_remove_nogem(display); out_cleanup_hw: i915_driver_hw_remove(i915); intel_memory_regions_driver_release(i915); @@ -974,20 +891,18 @@ out_cleanup_hw: i915_ggtt_driver_late_release(i915); out_cleanup_mmio: i915_driver_mmio_release(i915); -out_tiles_cleanup: - intel_gt_release_all(i915); out_runtime_pm_put: enable_rpm_wakeref_asserts(&i915->runtime_pm); i915_driver_late_release(i915); out_pci_disable: pci_disable_device(pdev); -out_fini: i915_probe_error(i915, "Device initialization failed (%d)\n", ret); return ret; } void i915_driver_remove(struct drm_i915_private *i915) { + struct intel_display *display = i915->display; intel_wakeref_t wakeref; wakeref = intel_runtime_pm_get(&i915->runtime_pm); @@ -1001,16 +916,16 @@ void i915_driver_remove(struct drm_i915_private *i915) intel_gvt_driver_remove(i915); - intel_modeset_driver_remove(i915); + intel_display_driver_remove(display); intel_irq_uninstall(i915); - intel_modeset_driver_remove_noirq(i915); + intel_display_driver_remove_noirq(display); i915_reset_error_state(i915); i915_gem_driver_remove(i915); - intel_modeset_driver_remove_nogem(i915); + intel_display_driver_remove_nogem(display); i915_driver_hw_remove(i915); @@ -1056,28 +971,6 @@ static int i915_driver_open(struct drm_device *dev, struct drm_file *file) return 0; } -/** - * i915_driver_lastclose - clean up after all DRM clients have exited - * @dev: DRM device - * - * Take care of cleaning up after all DRM clients have exited. In the - * mode setting case, we want to restore the kernel's initial mode (just - * in case the last client left us in a bad state). - * - * Additionally, in the non-mode setting case, we'll tear down the GTT - * and DMA structures, since the kernel won't be using them, and clea - * up any GEM state. - */ -static void i915_driver_lastclose(struct drm_device *dev) -{ - struct drm_i915_private *i915 = to_i915(dev); - - intel_fbdev_restore_mode(dev); - - if (HAS_DISPLAY(i915)) - vga_switcheroo_process_delayed_switch(); -} - static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) { struct drm_i915_file_private *file_priv = file->driver_priv; @@ -1091,57 +984,34 @@ static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file) i915_gem_flush_free_objects(to_i915(dev)); } -static void intel_suspend_encoders(struct drm_i915_private *dev_priv) -{ - struct drm_device *dev = &dev_priv->drm; - struct intel_encoder *encoder; - - if (!HAS_DISPLAY(dev_priv)) - return; - - drm_modeset_lock_all(dev); - for_each_intel_encoder(dev, encoder) - if (encoder->suspend) - encoder->suspend(encoder); - drm_modeset_unlock_all(dev); -} - -static void intel_shutdown_encoders(struct drm_i915_private *dev_priv) -{ - struct drm_device *dev = &dev_priv->drm; - struct intel_encoder *encoder; - - if (!HAS_DISPLAY(dev_priv)) - return; - - drm_modeset_lock_all(dev); - for_each_intel_encoder(dev, encoder) - if (encoder->shutdown) - encoder->shutdown(encoder); - drm_modeset_unlock_all(dev); -} - void i915_driver_shutdown(struct drm_i915_private *i915) { + struct intel_display *display = i915->display; + disable_rpm_wakeref_asserts(&i915->runtime_pm); intel_runtime_pm_disable(&i915->runtime_pm); - intel_power_domains_disable(i915); + intel_power_domains_disable(display); - if (HAS_DISPLAY(i915)) { + drm_client_dev_suspend(&i915->drm); + if (intel_display_device_present(display)) { drm_kms_helper_poll_disable(&i915->drm); + intel_display_driver_disable_user_access(display); drm_atomic_helper_shutdown(&i915->drm); } - intel_dp_mst_suspend(i915); + intel_dp_mst_suspend(display); - intel_runtime_pm_disable_interrupts(i915); - intel_hpd_cancel_work(i915); + intel_irq_suspend(i915); + intel_hpd_cancel_work(display); - intel_suspend_encoders(i915); - intel_shutdown_encoders(i915); + if (intel_display_device_present(display)) + intel_display_driver_suspend_access(display); - intel_dmc_ucode_suspend(i915); + intel_encoder_suspend_all(display); + intel_encoder_shutdown_all(display); + + intel_dmc_suspend(display); i915_gem_suspend(i915); @@ -1156,10 +1026,10 @@ void i915_driver_shutdown(struct drm_i915_private *i915) * - unify the driver remove and system/runtime suspend sequences with * the above unified shutdown/poweroff sequence. */ - intel_power_domains_driver_remove(i915); + intel_power_domains_driver_remove(display); enable_rpm_wakeref_asserts(&i915->runtime_pm); - intel_runtime_pm_driver_release(&i915->runtime_pm); + intel_runtime_pm_driver_last_release(&i915->runtime_pm); } static bool suspend_to_idle(struct drm_i915_private *dev_priv) @@ -1171,12 +1041,21 @@ static bool suspend_to_idle(struct drm_i915_private *dev_priv) return false; } +static void i915_drm_complete(struct drm_device *dev) +{ + struct drm_i915_private *i915 = to_i915(dev); + + intel_pxp_resume_complete(i915->pxp); +} + static int i915_drm_prepare(struct drm_device *dev) { struct drm_i915_private *i915 = to_i915(dev); + intel_pxp_suspend_prepare(i915->pxp); + /* - * NB intel_display_suspend() may issue new requests after we've + * NB intel_display_driver_suspend() may issue new requests after we've * ostensibly marked the GPU as ready-to-sleep here. We need to * split out that work and pull it forward so that after point, * the GPU is not woken again. @@ -1187,44 +1066,42 @@ static int i915_drm_prepare(struct drm_device *dev) static int i915_drm_suspend(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct intel_display *display = dev_priv->display; pci_power_t opregion_target_state; disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); /* We do a lot of poking in a lot of registers, make sure they work * properly. */ - intel_power_domains_disable(dev_priv); - if (HAS_DISPLAY(dev_priv)) + intel_power_domains_disable(display); + drm_client_dev_suspend(dev); + if (intel_display_device_present(display)) { drm_kms_helper_poll_disable(dev); + intel_display_driver_disable_user_access(display); + } - pci_save_state(pdev); - - intel_display_suspend(dev); - - intel_dp_mst_suspend(dev_priv); + intel_display_driver_suspend(display); - intel_runtime_pm_disable_interrupts(dev_priv); - intel_hpd_cancel_work(dev_priv); + intel_irq_suspend(dev_priv); + intel_hpd_cancel_work(display); - intel_suspend_encoders(dev_priv); + if (intel_display_device_present(display)) + intel_display_driver_suspend_access(display); - intel_suspend_hw(dev_priv); + intel_encoder_suspend_all(display); /* Must be called before GGTT is suspended. */ - intel_dpt_suspend(dev_priv); + intel_dpt_suspend(display); i915_ggtt_suspend(to_gt(dev_priv)->ggtt); - i915_save_display(dev_priv); + i9xx_display_sr_save(display); opregion_target_state = suspend_to_idle(dev_priv) ? PCI_D1 : PCI_D3cold; - intel_opregion_suspend(dev_priv, opregion_target_state); - - intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true); + intel_opregion_suspend(display, opregion_target_state); dev_priv->suspend_count++; - intel_dmc_ucode_suspend(dev_priv); + intel_dmc_suspend(display); enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); @@ -1233,73 +1110,70 @@ static int i915_drm_suspend(struct drm_device *dev) return 0; } -static enum i915_drm_suspend_mode -get_suspend_mode(struct drm_i915_private *dev_priv, bool hibernate) -{ - if (hibernate) - return I915_DRM_SUSPEND_HIBERNATE; - - if (suspend_to_idle(dev_priv)) - return I915_DRM_SUSPEND_IDLE; - - return I915_DRM_SUSPEND_MEM; -} - static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) { struct drm_i915_private *dev_priv = to_i915(dev); - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct intel_display *display = dev_priv->display; struct intel_runtime_pm *rpm = &dev_priv->runtime_pm; struct intel_gt *gt; int ret, i; + bool s2idle = !hibernation && suspend_to_idle(dev_priv); disable_rpm_wakeref_asserts(rpm); + intel_pxp_suspend(dev_priv->pxp); + i915_gem_suspend_late(dev_priv); for_each_gt(gt, dev_priv, i) intel_uncore_suspend(gt->uncore); - intel_power_domains_suspend(dev_priv, - get_suspend_mode(dev_priv, hibernation)); - - intel_display_power_suspend_late(dev_priv); + intel_display_power_suspend_late(display, s2idle); ret = vlv_suspend_complete(dev_priv); if (ret) { drm_err(&dev_priv->drm, "Suspend complete failed: %d\n", ret); - intel_power_domains_resume(dev_priv); - - goto out; + intel_display_power_resume_early(display); } - pci_disable_device(pdev); + enable_rpm_wakeref_asserts(rpm); + + if (!dev_priv->uncore.user_forcewake_count) + intel_runtime_pm_driver_release(rpm); + + return ret; +} + +static int i915_drm_suspend_noirq(struct drm_device *dev, bool hibernation) +{ + struct drm_i915_private *dev_priv = to_i915(dev); + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + /* * During hibernation on some platforms the BIOS may try to access * the device even though it's already in D3 and hang the machine. So * leave the device in D0 on those platforms and hope the BIOS will * power down the device properly. The issue was seen on multiple old * GENs with different BIOS vendors, so having an explicit blacklist - * is inpractical; apply the workaround on everything pre GEN6. The + * is impractical; apply the workaround on everything pre GEN6. The * platforms where the issue was seen: * Lenovo Thinkpad X301, X61s, X60, T60, X41 * Fujitsu FSC S7110 * Acer Aspire 1830T + * + * pci_save_state() prevents drivers/pci from + * automagically putting the device into D3. */ - if (!(hibernation && GRAPHICS_VER(dev_priv) < 6)) - pci_set_power_state(pdev, PCI_D3hot); + if (hibernation && GRAPHICS_VER(dev_priv) < 6) + pci_save_state(pdev); -out: - enable_rpm_wakeref_asserts(rpm); - if (!dev_priv->uncore.user_forcewake_count) - intel_runtime_pm_driver_release(rpm); - - return ret; + return 0; } int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, pm_message_t state) { + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); int error; if (drm_WARN_ON_ONCE(&i915->drm, state.event != PM_EVENT_SUSPEND && @@ -1313,13 +1187,22 @@ int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, if (error) return error; - return i915_drm_suspend_late(&i915->drm, false); + error = i915_drm_suspend_late(&i915->drm, false); + if (error) + return error; + + pci_save_state(pdev); + pci_set_power_state(pdev, PCI_D3hot); + + return 0; } static int i915_drm_resume(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); - int ret; + struct intel_display *display = dev_priv->display; + struct intel_gt *gt; + int ret, i; disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); @@ -1334,15 +1217,23 @@ static int i915_drm_resume(struct drm_device *dev) drm_err(&dev_priv->drm, "failed to re-enable GGTT\n"); i915_ggtt_resume(to_gt(dev_priv)->ggtt); + + for_each_gt(gt, dev_priv, i) + if (GRAPHICS_VER(gt->i915) >= 8) + setup_private_pat(gt); + /* Must be called after GGTT is resumed. */ - intel_dpt_resume(dev_priv); + intel_dpt_resume(display); + + intel_dmc_resume(display); + + i9xx_display_sr_restore(display); - intel_dmc_ucode_resume(dev_priv); + intel_gmbus_reset(display); - i915_restore_display(dev_priv); - intel_pps_unlock_regs_wa(dev_priv); + intel_pps_unlock_regs_wa(display); - intel_init_pch_refclk(dev_priv); + intel_init_pch_refclk(display); /* * Interrupts have to be enabled before any batches are run. If not the @@ -1351,33 +1242,38 @@ static int i915_drm_resume(struct drm_device *dev) * * drm_mode_config_reset() needs AUX interrupts. * - * Modeset enabling in intel_modeset_init_hw() also needs working + * Modeset enabling in intel_display_driver_init_hw() also needs working * interrupts. */ - intel_runtime_pm_enable_interrupts(dev_priv); + intel_irq_resume(dev_priv); - if (HAS_DISPLAY(dev_priv)) + if (intel_display_device_present(display)) drm_mode_config_reset(dev); i915_gem_resume(dev_priv); - intel_modeset_init_hw(dev_priv); - intel_init_clock_gating(dev_priv); - intel_hpd_init(dev_priv); + intel_display_driver_init_hw(display); + + intel_clock_gating_init(dev_priv); + + if (intel_display_device_present(display)) + intel_display_driver_resume_access(display); - /* MST sideband requires HPD interrupts enabled */ - intel_dp_mst_resume(dev_priv); - intel_display_resume(dev); + intel_hpd_init(display); - intel_hpd_poll_disable(dev_priv); - if (HAS_DISPLAY(dev_priv)) + intel_display_driver_resume(display); + + if (intel_display_device_present(display)) { + intel_display_driver_enable_user_access(display); drm_kms_helper_poll_enable(dev); + } + intel_hpd_poll_disable(display); - intel_opregion_resume(dev_priv); + intel_opregion_resume(display); - intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false); + drm_client_dev_resume(dev); - intel_power_domains_enable(dev_priv); + intel_power_domains_enable(display); intel_gvt_resume(dev_priv); @@ -1389,7 +1285,7 @@ static int i915_drm_resume(struct drm_device *dev) static int i915_drm_resume_early(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct intel_display *display = dev_priv->display; struct intel_gt *gt; int ret, i; @@ -1403,41 +1299,6 @@ static int i915_drm_resume_early(struct drm_device *dev) * similar so that power domains can be employed. */ - /* - * Note that we need to set the power state explicitly, since we - * powered off the device during freeze and the PCI core won't power - * it back up for us during thaw. Powering off the device during - * freeze is not a hard requirement though, and during the - * suspend/resume phases the PCI core makes sure we get here with the - * device powered on. So in case we change our freeze logic and keep - * the device powered we can also remove the following set power state - * call. - */ - ret = pci_set_power_state(pdev, PCI_D0); - if (ret) { - drm_err(&dev_priv->drm, - "failed to set PCI D0 power state (%d)\n", ret); - return ret; - } - - /* - * Note that pci_enable_device() first enables any parent bridge - * device and only then sets the power state for this device. The - * bridge enabling is a nop though, since bridge devices are resumed - * first. The order of enabling power and enabling the device is - * imposed by the PCI core as described above, so here we preserve the - * same order for the freeze/thaw phases. - * - * TODO: eventually we should remove pci_disable_device() / - * pci_enable_enable_device() from suspend/resume. Due to how they - * depend on the device enable refcount we can't anyway depend on them - * disabling/enabling the device. - */ - if (pci_enable_device(pdev)) - return -EIO; - - pci_set_master(pdev); - disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); ret = vlv_resume_prepare(dev_priv, false); @@ -1445,14 +1306,10 @@ static int i915_drm_resume_early(struct drm_device *dev) drm_err(&dev_priv->drm, "Resume prepare failed: %d, continuing anyway\n", ret); - for_each_gt(gt, dev_priv, i) { - intel_uncore_resume_early(gt->uncore); - intel_gt_check_and_clear_faults(gt); - } - - intel_display_power_resume_early(dev_priv); + for_each_gt(gt, dev_priv, i) + intel_gt_resume_early(gt); - intel_power_domains_resume(dev_priv); + intel_display_power_resume_early(display); enable_rpm_wakeref_asserts(&dev_priv->runtime_pm); @@ -1461,11 +1318,18 @@ static int i915_drm_resume_early(struct drm_device *dev) int i915_driver_resume_switcheroo(struct drm_i915_private *i915) { + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); int ret; if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) return 0; + ret = pci_set_power_state(pdev, PCI_D0); + if (ret) + return ret; + + pci_restore_state(pdev); + ret = i915_drm_resume_early(&i915->drm); if (ret) return ret; @@ -1497,8 +1361,6 @@ static int i915_pm_suspend(struct device *kdev) return -ENODEV; } - i915_ggtt_mark_pte_lost(i915, false); - if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) return 0; @@ -1524,6 +1386,16 @@ static int i915_pm_suspend_late(struct device *kdev) return i915_drm_suspend_late(&i915->drm, false); } +static int i915_pm_suspend_noirq(struct device *kdev) +{ + struct drm_i915_private *i915 = kdev_to_i915(kdev); + + if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) + return 0; + + return i915_drm_suspend_noirq(&i915->drm, false); +} + static int i915_pm_poweroff_late(struct device *kdev) { struct drm_i915_private *i915 = kdev_to_i915(kdev); @@ -1534,6 +1406,16 @@ static int i915_pm_poweroff_late(struct device *kdev) return i915_drm_suspend_late(&i915->drm, true); } +static int i915_pm_poweroff_noirq(struct device *kdev) +{ + struct drm_i915_private *i915 = kdev_to_i915(kdev); + + if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) + return 0; + + return i915_drm_suspend_noirq(&i915->drm, true); +} + static int i915_pm_resume_early(struct device *kdev) { struct drm_i915_private *i915 = kdev_to_i915(kdev); @@ -1551,17 +1433,19 @@ static int i915_pm_resume(struct device *kdev) if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) return 0; - /* - * If IRST is enabled, or if we can't detect whether it's enabled, - * then we must assume we lost the GGTT page table entries, since - * they are not retained if IRST decided to enter S4. - */ - if (!IS_ENABLED(CONFIG_ACPI) || acpi_dev_present(irst_name, NULL, -1)) - i915_ggtt_mark_pte_lost(i915, true); - return i915_drm_resume(&i915->drm); } +static void i915_pm_complete(struct device *kdev) +{ + struct drm_i915_private *i915 = kdev_to_i915(kdev); + + if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) + return; + + i915_drm_complete(&i915->drm); +} + /* freeze: before creating the hibernation_image */ static int i915_pm_freeze(struct device *kdev) { @@ -1618,16 +1502,16 @@ static int i915_pm_restore_early(struct device *kdev) static int i915_pm_restore(struct device *kdev) { - struct drm_i915_private *i915 = kdev_to_i915(kdev); - - i915_ggtt_mark_pte_lost(i915, true); return i915_pm_resume(kdev); } static int intel_runtime_suspend(struct device *kdev) { struct drm_i915_private *dev_priv = kdev_to_i915(kdev); + struct intel_display *display = dev_priv->display; struct intel_runtime_pm *rpm = &dev_priv->runtime_pm; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct pci_dev *root_pdev; struct intel_gt *gt; int ret, i; @@ -1644,15 +1528,17 @@ static int intel_runtime_suspend(struct device *kdev) */ i915_gem_runtime_suspend(dev_priv); + intel_pxp_runtime_suspend(dev_priv->pxp); + for_each_gt(gt, dev_priv, i) intel_gt_runtime_suspend(gt); - intel_runtime_pm_disable_interrupts(dev_priv); + intel_irq_suspend(dev_priv); for_each_gt(gt, dev_priv, i) intel_uncore_suspend(gt->uncore); - intel_display_power_suspend(dev_priv); + intel_display_power_suspend(display); ret = vlv_suspend_complete(dev_priv); if (ret) { @@ -1660,9 +1546,10 @@ static int intel_runtime_suspend(struct device *kdev) "Runtime suspend failed, disabling it (%d)\n", ret); intel_uncore_runtime_resume(&dev_priv->uncore); - intel_runtime_pm_enable_interrupts(dev_priv); + intel_irq_resume(dev_priv); - intel_gt_runtime_resume(to_gt(dev_priv)); + for_each_gt(gt, dev_priv, i) + intel_gt_runtime_resume(gt); enable_rpm_wakeref_asserts(rpm); @@ -1676,7 +1563,14 @@ static int intel_runtime_suspend(struct device *kdev) drm_err(&dev_priv->drm, "Unclaimed access detected prior to suspending\n"); - rpm->suspended = true; + /* + * FIXME: Temporary hammer to avoid freezing the machine on our DGFX + * This should be totally removed when we handle the pci states properly + * on runtime PM. + */ + root_pdev = pcie_find_root_port(pdev); + if (root_pdev) + pci_d3cold_disable(root_pdev); /* * FIXME: We really should find a document that references the arguments @@ -1689,7 +1583,7 @@ static int intel_runtime_suspend(struct device *kdev) * won't be able to restore them. Since PCI_D3hot matches the * actual specification and appears to be working, use it. */ - intel_opregion_notify_adapter(dev_priv, PCI_D3hot); + intel_opregion_notify_adapter(display, PCI_D3hot); } else { /* * current versions of firmware which depend on this opregion @@ -1698,13 +1592,13 @@ static int intel_runtime_suspend(struct device *kdev) * to distinguish it from notifications that might be sent via * the suspend path. */ - intel_opregion_notify_adapter(dev_priv, PCI_D1); + intel_opregion_notify_adapter(display, PCI_D1); } assert_forcewakes_inactive(&dev_priv->uncore); if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) - intel_hpd_poll_enable(dev_priv); + intel_hpd_poll_enable(display); drm_dbg(&dev_priv->drm, "Device suspended\n"); return 0; @@ -1713,7 +1607,10 @@ static int intel_runtime_suspend(struct device *kdev) static int intel_runtime_resume(struct device *kdev) { struct drm_i915_private *dev_priv = kdev_to_i915(kdev); + struct intel_display *display = dev_priv->display; struct intel_runtime_pm *rpm = &dev_priv->runtime_pm; + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + struct pci_dev *root_pdev; struct intel_gt *gt; int ret, i; @@ -1725,20 +1622,24 @@ static int intel_runtime_resume(struct device *kdev) drm_WARN_ON_ONCE(&dev_priv->drm, atomic_read(&rpm->wakeref_count)); disable_rpm_wakeref_asserts(rpm); - intel_opregion_notify_adapter(dev_priv, PCI_D0); - rpm->suspended = false; + intel_opregion_notify_adapter(display, PCI_D0); + + root_pdev = pcie_find_root_port(pdev); + if (root_pdev) + pci_d3cold_enable(root_pdev); + if (intel_uncore_unclaimed_mmio(&dev_priv->uncore)) drm_dbg(&dev_priv->drm, "Unclaimed access during suspend, bios?\n"); - intel_display_power_resume(dev_priv); + intel_display_power_resume(display); ret = vlv_resume_prepare(dev_priv, true); for_each_gt(gt, dev_priv, i) intel_uncore_runtime_resume(gt->uncore); - intel_runtime_pm_enable_interrupts(dev_priv); + intel_irq_resume(dev_priv); /* * No point of rolling back things in case of an error, as the best @@ -1747,17 +1648,19 @@ static int intel_runtime_resume(struct device *kdev) for_each_gt(gt, dev_priv, i) intel_gt_runtime_resume(gt); + intel_pxp_runtime_resume(dev_priv->pxp); + /* * On VLV/CHV display interrupts are part of the display * power well, so hpd is reinitialized from there. For * everyone else do it here. */ if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { - intel_hpd_init(dev_priv); - intel_hpd_poll_disable(dev_priv); + intel_hpd_init(display); + intel_hpd_poll_disable(display); } - skl_watermark_ipc_update(dev_priv); + skl_watermark_ipc_update(display); enable_rpm_wakeref_asserts(rpm); @@ -1778,23 +1681,25 @@ const struct dev_pm_ops i915_pm_ops = { .prepare = i915_pm_prepare, .suspend = i915_pm_suspend, .suspend_late = i915_pm_suspend_late, + .suspend_noirq = i915_pm_suspend_noirq, .resume_early = i915_pm_resume_early, .resume = i915_pm_resume, + .complete = i915_pm_complete, /* * S4 event handlers - * @freeze, @freeze_late : called (1) before creating the - * hibernation image [PMSG_FREEZE] and - * (2) after rebooting, before restoring - * the image [PMSG_QUIESCE] - * @thaw, @thaw_early : called (1) after creating the hibernation - * image, before writing it [PMSG_THAW] - * and (2) after failing to create or - * restore the image [PMSG_RECOVER] - * @poweroff, @poweroff_late: called after writing the hibernation - * image, before rebooting [PMSG_HIBERNATE] - * @restore, @restore_early : called after rebooting and restoring the - * hibernation image [PMSG_RESTORE] + * @freeze* : called (1) before creating the + * hibernation image [PMSG_FREEZE] and + * (2) after rebooting, before restoring + * the image [PMSG_QUIESCE] + * @thaw* : called (1) after creating the hibernation + * image, before writing it [PMSG_THAW] + * and (2) after failing to create or + * restore the image [PMSG_RECOVER] + * @poweroff* : called after writing the hibernation + * image, before rebooting [PMSG_HIBERNATE] + * @restore* : called after rebooting and restoring the + * hibernation image [PMSG_RESTORE] */ .freeze = i915_pm_freeze, .freeze_late = i915_pm_freeze_late, @@ -1802,6 +1707,7 @@ const struct dev_pm_ops i915_pm_ops = { .thaw = i915_pm_thaw, .poweroff = i915_pm_suspend, .poweroff_late = i915_pm_poweroff_late, + .poweroff_noirq = i915_pm_poweroff_noirq, .restore_early = i915_pm_restore_early, .restore = i915_pm_restore, @@ -1821,8 +1727,9 @@ static const struct file_operations i915_driver_fops = { .compat_ioctl = i915_ioc32_compat_ioctl, .llseek = noop_llseek, #ifdef CONFIG_PROC_FS - .show_fdinfo = i915_drm_client_fdinfo, + .show_fdinfo = drm_show_fdinfo, #endif + .fop_flags = FOP_UNSIGNED_OFFSET, }; static int @@ -1845,9 +1752,9 @@ static const struct drm_ioctl_desc i915_ioctls[] = { DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH), DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, drm_noop, DRM_AUTH), - DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), - DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, drm_noop, DRM_AUTH), + DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), + DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, drm_noop, DRM_AUTH), DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, drm_noop, DRM_AUTH), DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), DRM_IOCTL_DEF_DRV(I915_GEM_INIT, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), @@ -1872,7 +1779,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = { DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id_ioctl, 0), + DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_crtc_get_pipe_from_crtc_id_ioctl, 0), DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image_ioctl, DRM_MASTER), DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs_ioctl, DRM_MASTER), @@ -1919,22 +1826,21 @@ static const struct drm_driver i915_drm_driver = { DRIVER_SYNCOBJ_TIMELINE, .release = i915_driver_release, .open = i915_driver_open, - .lastclose = i915_driver_lastclose, .postclose = i915_driver_postclose, + .show_fdinfo = PTR_IF(IS_ENABLED(CONFIG_PROC_FS), i915_drm_client_fdinfo), - .prime_handle_to_fd = drm_gem_prime_handle_to_fd, - .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import = i915_gem_prime_import, .dumb_create = i915_gem_dumb_create, .dumb_map_offset = i915_gem_dumb_mmap_offset, + INTEL_FBDEV_DRIVER_OPS, + .ioctls = i915_ioctls, .num_ioctls = ARRAY_SIZE(i915_ioctls), .fops = &i915_driver_fops, .name = DRIVER_NAME, .desc = DRIVER_DESC, - .date = DRIVER_DATE, .major = DRIVER_MAJOR, .minor = DRIVER_MINOR, .patchlevel = DRIVER_PATCHLEVEL, |