diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_gvt_mmio_table.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 378 |
1 files changed, 193 insertions, 185 deletions
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index 87ecc5104fd9..ee1cd2126f97 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -3,16 +3,24 @@ * Copyright © 2020 Intel Corporation */ +#include "display/bxt_dpio_phy_regs.h" +#include "display/i9xx_plane_regs.h" +#include "display/i9xx_wm_regs.h" #include "display/intel_audio_regs.h" #include "display/intel_backlight_regs.h" #include "display/intel_color_regs.h" +#include "display/intel_crt_regs.h" +#include "display/intel_cursor_regs.h" #include "display/intel_display_types.h" #include "display/intel_dmc_regs.h" #include "display/intel_dp_aux_regs.h" #include "display/intel_dpio_phy.h" +#include "display/intel_fbc_regs.h" #include "display/intel_fdi_regs.h" #include "display/intel_lvds_regs.h" #include "display/intel_psr_regs.h" +#include "display/intel_sprite_regs.h" +#include "display/skl_universal_plane_regs.h" #include "display/skl_watermark_regs.h" #include "display/vlv_dsi_pll_regs.h" #include "gt/intel_engine_regs.h" @@ -120,38 +128,38 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(_MMIO(0x650b4)); MMIO_D(_MMIO(0xc4040)); MMIO_D(DERRMR); - MMIO_D(PIPEDSL(PIPE_A)); - MMIO_D(PIPEDSL(PIPE_B)); - MMIO_D(PIPEDSL(PIPE_C)); - MMIO_D(PIPEDSL(_PIPE_EDP)); - MMIO_D(TRANSCONF(TRANSCODER_A)); - MMIO_D(TRANSCONF(TRANSCODER_B)); - MMIO_D(TRANSCONF(TRANSCODER_C)); - MMIO_D(TRANSCONF(TRANSCODER_EDP)); - MMIO_D(PIPESTAT(PIPE_A)); - MMIO_D(PIPESTAT(PIPE_B)); - MMIO_D(PIPESTAT(PIPE_C)); - MMIO_D(PIPESTAT(_PIPE_EDP)); - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_A)); - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_B)); - MMIO_D(PIPE_FLIPCOUNT_G4X(PIPE_C)); - MMIO_D(PIPE_FLIPCOUNT_G4X(_PIPE_EDP)); - MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_A)); - MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_B)); - MMIO_D(PIPE_FRMCOUNT_G4X(PIPE_C)); - MMIO_D(PIPE_FRMCOUNT_G4X(_PIPE_EDP)); - MMIO_D(CURCNTR(PIPE_A)); - MMIO_D(CURCNTR(PIPE_B)); - MMIO_D(CURCNTR(PIPE_C)); - MMIO_D(CURPOS(PIPE_A)); - MMIO_D(CURPOS(PIPE_B)); - MMIO_D(CURPOS(PIPE_C)); - MMIO_D(CURBASE(PIPE_A)); - MMIO_D(CURBASE(PIPE_B)); - MMIO_D(CURBASE(PIPE_C)); - MMIO_D(CUR_FBC_CTL(PIPE_A)); - MMIO_D(CUR_FBC_CTL(PIPE_B)); - MMIO_D(CUR_FBC_CTL(PIPE_C)); + MMIO_D(PIPEDSL(dev_priv, PIPE_A)); + MMIO_D(PIPEDSL(dev_priv, PIPE_B)); + MMIO_D(PIPEDSL(dev_priv, PIPE_C)); + MMIO_D(PIPEDSL(dev_priv, _PIPE_EDP)); + MMIO_D(TRANSCONF(dev_priv, TRANSCODER_A)); + MMIO_D(TRANSCONF(dev_priv, TRANSCODER_B)); + MMIO_D(TRANSCONF(dev_priv, TRANSCODER_C)); + MMIO_D(TRANSCONF(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPESTAT(dev_priv, PIPE_A)); + MMIO_D(PIPESTAT(dev_priv, PIPE_B)); + MMIO_D(PIPESTAT(dev_priv, PIPE_C)); + MMIO_D(PIPESTAT(dev_priv, _PIPE_EDP)); + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_A)); + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_B)); + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, PIPE_C)); + MMIO_D(PIPE_FLIPCOUNT_G4X(dev_priv, _PIPE_EDP)); + MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_A)); + MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_B)); + MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, PIPE_C)); + MMIO_D(PIPE_FRMCOUNT_G4X(dev_priv, _PIPE_EDP)); + MMIO_D(CURCNTR(dev_priv, PIPE_A)); + MMIO_D(CURCNTR(dev_priv, PIPE_B)); + MMIO_D(CURCNTR(dev_priv, PIPE_C)); + MMIO_D(CURPOS(dev_priv, PIPE_A)); + MMIO_D(CURPOS(dev_priv, PIPE_B)); + MMIO_D(CURPOS(dev_priv, PIPE_C)); + MMIO_D(CURBASE(dev_priv, PIPE_A)); + MMIO_D(CURBASE(dev_priv, PIPE_B)); + MMIO_D(CURBASE(dev_priv, PIPE_C)); + MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_A)); + MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_B)); + MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_C)); MMIO_D(_MMIO(0x700ac)); MMIO_D(_MMIO(0x710ac)); MMIO_D(_MMIO(0x720ac)); @@ -159,32 +167,32 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(_MMIO(0x70094)); MMIO_D(_MMIO(0x70098)); MMIO_D(_MMIO(0x7009c)); - MMIO_D(DSPCNTR(PIPE_A)); - MMIO_D(DSPADDR(PIPE_A)); - MMIO_D(DSPSTRIDE(PIPE_A)); - MMIO_D(DSPPOS(PIPE_A)); - MMIO_D(DSPSIZE(PIPE_A)); - MMIO_D(DSPSURF(PIPE_A)); - MMIO_D(DSPOFFSET(PIPE_A)); - MMIO_D(DSPSURFLIVE(PIPE_A)); + MMIO_D(DSPCNTR(dev_priv, PIPE_A)); + MMIO_D(DSPADDR(dev_priv, PIPE_A)); + MMIO_D(DSPSTRIDE(dev_priv, PIPE_A)); + MMIO_D(DSPPOS(dev_priv, PIPE_A)); + MMIO_D(DSPSIZE(dev_priv, PIPE_A)); + MMIO_D(DSPSURF(dev_priv, PIPE_A)); + MMIO_D(DSPOFFSET(dev_priv, PIPE_A)); + MMIO_D(DSPSURFLIVE(dev_priv, PIPE_A)); MMIO_D(REG_50080(PIPE_A, PLANE_PRIMARY)); - MMIO_D(DSPCNTR(PIPE_B)); - MMIO_D(DSPADDR(PIPE_B)); - MMIO_D(DSPSTRIDE(PIPE_B)); - MMIO_D(DSPPOS(PIPE_B)); - MMIO_D(DSPSIZE(PIPE_B)); - MMIO_D(DSPSURF(PIPE_B)); - MMIO_D(DSPOFFSET(PIPE_B)); - MMIO_D(DSPSURFLIVE(PIPE_B)); + MMIO_D(DSPCNTR(dev_priv, PIPE_B)); + MMIO_D(DSPADDR(dev_priv, PIPE_B)); + MMIO_D(DSPSTRIDE(dev_priv, PIPE_B)); + MMIO_D(DSPPOS(dev_priv, PIPE_B)); + MMIO_D(DSPSIZE(dev_priv, PIPE_B)); + MMIO_D(DSPSURF(dev_priv, PIPE_B)); + MMIO_D(DSPOFFSET(dev_priv, PIPE_B)); + MMIO_D(DSPSURFLIVE(dev_priv, PIPE_B)); MMIO_D(REG_50080(PIPE_B, PLANE_PRIMARY)); - MMIO_D(DSPCNTR(PIPE_C)); - MMIO_D(DSPADDR(PIPE_C)); - MMIO_D(DSPSTRIDE(PIPE_C)); - MMIO_D(DSPPOS(PIPE_C)); - MMIO_D(DSPSIZE(PIPE_C)); - MMIO_D(DSPSURF(PIPE_C)); - MMIO_D(DSPOFFSET(PIPE_C)); - MMIO_D(DSPSURFLIVE(PIPE_C)); + MMIO_D(DSPCNTR(dev_priv, PIPE_C)); + MMIO_D(DSPADDR(dev_priv, PIPE_C)); + MMIO_D(DSPSTRIDE(dev_priv, PIPE_C)); + MMIO_D(DSPPOS(dev_priv, PIPE_C)); + MMIO_D(DSPSIZE(dev_priv, PIPE_C)); + MMIO_D(DSPSURF(dev_priv, PIPE_C)); + MMIO_D(DSPOFFSET(dev_priv, PIPE_C)); + MMIO_D(DSPSURFLIVE(dev_priv, PIPE_C)); MMIO_D(REG_50080(PIPE_C, PLANE_PRIMARY)); MMIO_D(SPRCTL(PIPE_A)); MMIO_D(SPRLINOFF(PIPE_A)); @@ -225,73 +233,73 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(SPRSCALE(PIPE_C)); MMIO_D(SPRSURFLIVE(PIPE_C)); MMIO_D(REG_50080(PIPE_C, PLANE_SPRITE0)); - MMIO_D(TRANS_HTOTAL(TRANSCODER_A)); - MMIO_D(TRANS_HBLANK(TRANSCODER_A)); - MMIO_D(TRANS_HSYNC(TRANSCODER_A)); - MMIO_D(TRANS_VTOTAL(TRANSCODER_A)); - MMIO_D(TRANS_VBLANK(TRANSCODER_A)); - MMIO_D(TRANS_VSYNC(TRANSCODER_A)); - MMIO_D(BCLRPAT(TRANSCODER_A)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_A)); - MMIO_D(PIPESRC(TRANSCODER_A)); - MMIO_D(TRANS_HTOTAL(TRANSCODER_B)); - MMIO_D(TRANS_HBLANK(TRANSCODER_B)); - MMIO_D(TRANS_HSYNC(TRANSCODER_B)); - MMIO_D(TRANS_VTOTAL(TRANSCODER_B)); - MMIO_D(TRANS_VBLANK(TRANSCODER_B)); - MMIO_D(TRANS_VSYNC(TRANSCODER_B)); - MMIO_D(BCLRPAT(TRANSCODER_B)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_B)); - MMIO_D(PIPESRC(TRANSCODER_B)); - MMIO_D(TRANS_HTOTAL(TRANSCODER_C)); - MMIO_D(TRANS_HBLANK(TRANSCODER_C)); - MMIO_D(TRANS_HSYNC(TRANSCODER_C)); - MMIO_D(TRANS_VTOTAL(TRANSCODER_C)); - MMIO_D(TRANS_VBLANK(TRANSCODER_C)); - MMIO_D(TRANS_VSYNC(TRANSCODER_C)); - MMIO_D(BCLRPAT(TRANSCODER_C)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_C)); - MMIO_D(PIPESRC(TRANSCODER_C)); - MMIO_D(TRANS_HTOTAL(TRANSCODER_EDP)); - MMIO_D(TRANS_HBLANK(TRANSCODER_EDP)); - MMIO_D(TRANS_HSYNC(TRANSCODER_EDP)); - MMIO_D(TRANS_VTOTAL(TRANSCODER_EDP)); - MMIO_D(TRANS_VBLANK(TRANSCODER_EDP)); - MMIO_D(TRANS_VSYNC(TRANSCODER_EDP)); - MMIO_D(BCLRPAT(TRANSCODER_EDP)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_EDP)); - MMIO_D(PIPE_DATA_M1(TRANSCODER_A)); - MMIO_D(PIPE_DATA_N1(TRANSCODER_A)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_A)); - MMIO_D(PIPE_DATA_N2(TRANSCODER_A)); - MMIO_D(PIPE_LINK_M1(TRANSCODER_A)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_A)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_A)); - MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); - MMIO_D(PIPE_DATA_M1(TRANSCODER_B)); - MMIO_D(PIPE_DATA_N1(TRANSCODER_B)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_B)); - MMIO_D(PIPE_DATA_N2(TRANSCODER_B)); - MMIO_D(PIPE_LINK_M1(TRANSCODER_B)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_B)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_B)); - MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); - MMIO_D(PIPE_DATA_M1(TRANSCODER_C)); - MMIO_D(PIPE_DATA_N1(TRANSCODER_C)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_C)); - MMIO_D(PIPE_DATA_N2(TRANSCODER_C)); - MMIO_D(PIPE_LINK_M1(TRANSCODER_C)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_C)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_C)); - MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); - MMIO_D(PIPE_DATA_M1(TRANSCODER_EDP)); - MMIO_D(PIPE_DATA_N1(TRANSCODER_EDP)); - MMIO_D(PIPE_DATA_M2(TRANSCODER_EDP)); - MMIO_D(PIPE_DATA_N2(TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_M1(TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP)); + MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_A)); + MMIO_D(BCLRPAT(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_A)); + MMIO_D(PIPESRC(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_B)); + MMIO_D(BCLRPAT(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_B)); + MMIO_D(PIPESRC(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_C)); + MMIO_D(BCLRPAT(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_C)); + MMIO_D(PIPESRC(dev_priv, TRANSCODER_C)); + MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_HSYNC(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_VTOTAL(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_EDP)); + MMIO_D(BCLRPAT(dev_priv, TRANSCODER_EDP)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_LINK_N2(dev_priv, TRANSCODER_A)); + MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_LINK_N2(dev_priv, TRANSCODER_B)); + MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_LINK_N2(dev_priv, TRANSCODER_C)); + MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_N2(dev_priv, TRANSCODER_EDP)); MMIO_D(PF_CTL(PIPE_A)); MMIO_D(PF_WIN_SZ(PIPE_A)); MMIO_D(PF_WIN_POS(PIPE_A)); @@ -500,18 +508,18 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(GAMMA_MODE(PIPE_A)); MMIO_D(GAMMA_MODE(PIPE_B)); MMIO_D(GAMMA_MODE(PIPE_C)); - MMIO_D(TRANS_MULT(TRANSCODER_A)); - MMIO_D(TRANS_MULT(TRANSCODER_B)); - MMIO_D(TRANS_MULT(TRANSCODER_C)); - MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_A)); - MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_B)); - MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_C)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_A)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_B)); + MMIO_D(TRANS_MULT(dev_priv, TRANSCODER_C)); + MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_A)); + MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_B)); + MMIO_D(HSW_TVIDEO_DIP_CTL(dev_priv, TRANSCODER_C)); MMIO_D(SFUSE_STRAP); MMIO_D(SBI_ADDR); MMIO_D(SBI_DATA); MMIO_D(SBI_CTL_STAT); MMIO_D(PIXCLK_GATE); - MMIO_F(_MMIO(_DPA_AUX_CH_CTL), 6 * 4); + MMIO_F(DP_AUX_CH_CTL(AUX_CH_A), 6 * 4); MMIO_D(DDI_BUF_CTL(PORT_A)); MMIO_D(DDI_BUF_CTL(PORT_B)); MMIO_D(DDI_BUF_CTL(PORT_C)); @@ -882,9 +890,9 @@ static int iterate_pre_skl_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(FORCEWAKE_MT); MMIO_D(PCH_ADPA); - MMIO_F(_MMIO(_PCH_DPB_AUX_CH_CTL), 6 * 4); - MMIO_F(_MMIO(_PCH_DPC_AUX_CH_CTL), 6 * 4); - MMIO_F(_MMIO(_PCH_DPD_AUX_CH_CTL), 6 * 4); + MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_B), 6 * 4); + MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_C), 6 * 4); + MMIO_F(PCH_DP_AUX_CH_CTL(AUX_CH_D), 6 * 4); MMIO_F(_MMIO(0x70440), 0xc); MMIO_F(_MMIO(0x71440), 0xc); @@ -1001,36 +1009,36 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 1)); MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 2)); MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 3)); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 4))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 4))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 4))); - MMIO_D(_MMIO(_REG_701C4(PIPE_A, 1))); - MMIO_D(_MMIO(_REG_701C4(PIPE_A, 2))); - MMIO_D(_MMIO(_REG_701C4(PIPE_A, 3))); - MMIO_D(_MMIO(_REG_701C4(PIPE_A, 4))); - MMIO_D(_MMIO(_REG_701C4(PIPE_B, 1))); - MMIO_D(_MMIO(_REG_701C4(PIPE_B, 2))); - MMIO_D(_MMIO(_REG_701C4(PIPE_B, 3))); - MMIO_D(_MMIO(_REG_701C4(PIPE_B, 4))); - MMIO_D(_MMIO(_REG_701C4(PIPE_C, 1))); - MMIO_D(_MMIO(_REG_701C4(PIPE_C, 2))); - MMIO_D(_MMIO(_REG_701C4(PIPE_C, 3))); - MMIO_D(_MMIO(_REG_701C4(PIPE_C, 4))); - MMIO_D(_MMIO(_PLANE_CTL_3_A)); - MMIO_D(_MMIO(_PLANE_CTL_3_B)); - MMIO_D(_MMIO(0x72380)); - MMIO_D(_MMIO(0x7239c)); - MMIO_D(_MMIO(_PLANE_SURF_3_A)); - MMIO_D(_MMIO(_PLANE_SURF_3_B)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 3)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 3)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 3)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_A, 0)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_A, 1)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_A, 2)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_A, 3)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_B, 0)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_B, 1)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_B, 2)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_B, 3)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 0)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 1)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 2)); + MMIO_D(PLANE_AUX_OFFSET(PIPE_C, 3)); + MMIO_D(PLANE_CTL(PIPE_A, 2)); + MMIO_D(PLANE_CTL(PIPE_B, 2)); + MMIO_D(PLANE_CTL(PIPE_C, 2)); + MMIO_D(PLANE_SURF(PIPE_A, 2)); + MMIO_D(PLANE_SURF(PIPE_B, 2)); + MMIO_D(PLANE_SURF(PIPE_C, 2)); MMIO_D(DMC_SSP_BASE); MMIO_D(DMC_HTP_SKL); MMIO_D(DMC_LAST_WRITE); @@ -1070,15 +1078,15 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(_MMIO(0x70034)); MMIO_D(_MMIO(0x71034)); MMIO_D(_MMIO(0x72034)); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYVAL_1(PIPE_C))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYMAX_1(PIPE_C))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_A))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_B))); - MMIO_D(_MMIO(_PLANE_KEYMSK_1(PIPE_C))); + MMIO_D(PLANE_KEYVAL(PIPE_A, 0)); + MMIO_D(PLANE_KEYVAL(PIPE_B, 0)); + MMIO_D(PLANE_KEYVAL(PIPE_C, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_A, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_B, 0)); + MMIO_D(PLANE_KEYMAX(PIPE_C, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_A, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_B, 0)); + MMIO_D(PLANE_KEYMSK(PIPE_C, 0)); MMIO_D(_MMIO(0x44500)); #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4) MMIO_RING_D(CSFE_CHICKEN1_REG); @@ -1155,11 +1163,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0)); MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0)); MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY0, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH0)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 1)); @@ -1180,11 +1188,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH1)); MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH1)); MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1)); - MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH1)); + MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY0, DPIO_CH1, 0)); MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1)); - MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH1)); + MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0)); MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH1)); - MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY0, DPIO_CH1)); + MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY0, DPIO_CH1, 0)); MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH1)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 0)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH1, 1)); @@ -1205,11 +1213,11 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY1, DPIO_CH0)); MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY1, DPIO_CH0)); MMIO_D(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY1, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW2_LN(DPIO_PHY1, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY1, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY1, DPIO_CH0)); - MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY1, DPIO_CH0)); + MMIO_D(BXT_PORT_TX_DW4_LN(DPIO_PHY1, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY1, DPIO_CH0)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 0)); MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 1)); @@ -1229,9 +1237,9 @@ static int iterate_bxt_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(BXT_DSI_PLL_ENABLE); MMIO_D(GEN9_CLKGATE_DIS_0); MMIO_D(GEN9_CLKGATE_DIS_4); - MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_A)); - MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_B)); - MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_C)); + MMIO_D(HSW_TVIDEO_DIP_GCP(dev_priv, TRANSCODER_A)); + MMIO_D(HSW_TVIDEO_DIP_GCP(dev_priv, TRANSCODER_B)); + MMIO_D(HSW_TVIDEO_DIP_GCP(dev_priv, TRANSCODER_C)); MMIO_D(RC6_CTX_BASE); MMIO_D(GEN8_PUSHBUS_CONTROL); MMIO_D(GEN8_PUSHBUS_ENABLE); @@ -1302,4 +1310,4 @@ int intel_gvt_iterate_mmio_table(struct intel_gvt_mmio_table_iter *iter) err: return ret; } -EXPORT_SYMBOL_NS_GPL(intel_gvt_iterate_mmio_table, I915_GVT); +EXPORT_SYMBOL_NS_GPL(intel_gvt_iterate_mmio_table, "I915_GVT"); |