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path: root/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
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Diffstat (limited to 'drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h')
-rw-r--r--drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h115
1 files changed, 32 insertions, 83 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
index 74b98b6b3bc3..bdac5c04bf79 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
@@ -12,6 +12,8 @@
struct dpu_hw_sspp;
+#define DPU_SSPP_MAX_PITCH_SIZE 0xffff
+
/**
* Flags
*/
@@ -22,21 +24,6 @@ struct dpu_hw_sspp;
#define DPU_SSPP_SOLID_FILL BIT(4)
/**
- * Define all scaler feature bits in catalog
- */
-#define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \
- BIT(DPU_SSPP_SCALER_QSEED2) | \
- BIT(DPU_SSPP_SCALER_QSEED3) | \
- BIT(DPU_SSPP_SCALER_QSEED3LITE) | \
- BIT(DPU_SSPP_SCALER_QSEED4))
-
-/*
- * Define all CSC feature bits in catalog
- */
-#define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \
- BIT(DPU_SSPP_CSC_10BIT))
-
-/**
* Component indices
*/
enum {
@@ -157,32 +144,12 @@ struct dpu_hw_pixel_ext {
* @src_rect: src ROI, caller takes into account the different operations
* such as decimation, flip etc to program this field
* @dest_rect: destination ROI.
+ * @rotation: simplified drm rotation hint
*/
struct dpu_sw_pipe_cfg {
struct drm_rect src_rect;
struct drm_rect dst_rect;
-};
-
-/**
- * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration
- * @creq_vblank: creq value generated to vbif during vertical blanking
- * @danger_vblank: danger value generated during vertical blanking
- * @vblank_en: enable creq_vblank and danger_vblank during vblank
- * @danger_safe_en: enable danger safe generation
- */
-struct dpu_hw_pipe_qos_cfg {
- u32 creq_vblank;
- u32 danger_vblank;
- bool vblank_en;
- bool danger_safe_en;
-};
-
-/**
- * enum CDP preload ahead address size
- */
-enum {
- DPU_SSPP_CDP_PRELOAD_AHEAD_32,
- DPU_SSPP_CDP_PRELOAD_AHEAD_64
+ unsigned int rotation;
};
/**
@@ -220,7 +187,7 @@ struct dpu_hw_sspp_ops {
* @flags: Extra flags for format config
*/
void (*setup_format)(struct dpu_sw_pipe *pipe,
- const struct dpu_format *fmt, u32 flags);
+ const struct msm_format *fmt, u32 flags);
/**
* setup_rects - setup pipe ROI rectangles
@@ -276,34 +243,30 @@ struct dpu_hw_sspp_ops {
void (*setup_sharpening)(struct dpu_hw_sspp *ctx,
struct dpu_hw_sharp_cfg *cfg);
+
/**
- * setup_danger_safe_lut - setup danger safe LUTs
+ * setup_qos_lut - setup QoS LUTs
* @ctx: Pointer to pipe context
- * @danger_lut: LUT for generate danger level based on fill level
- * @safe_lut: LUT for generate safe level based on fill level
- *
+ * @cfg: LUT configuration
*/
- void (*setup_danger_safe_lut)(struct dpu_hw_sspp *ctx,
- u32 danger_lut,
- u32 safe_lut);
+ void (*setup_qos_lut)(struct dpu_hw_sspp *ctx,
+ struct dpu_hw_qos_cfg *cfg);
/**
- * setup_creq_lut - setup CREQ LUT
+ * setup_qos_ctrl - setup QoS control
* @ctx: Pointer to pipe context
- * @creq_lut: LUT for generate creq level based on fill level
- *
+ * @danger_safe_en: flags controlling enabling of danger/safe QoS/LUT
*/
- void (*setup_creq_lut)(struct dpu_hw_sspp *ctx,
- u64 creq_lut);
+ void (*setup_qos_ctrl)(struct dpu_hw_sspp *ctx,
+ bool danger_safe_en);
/**
- * setup_qos_ctrl - setup QoS control
+ * setup_clk_force_ctrl - setup clock force control
* @ctx: Pointer to pipe context
- * @cfg: Pointer to pipe QoS configuration
- *
+ * @enable: enable clock force if true
*/
- void (*setup_qos_ctrl)(struct dpu_hw_sspp *ctx,
- struct dpu_hw_pipe_qos_cfg *cfg);
+ bool (*setup_clk_force_ctrl)(struct dpu_hw_sspp *ctx,
+ bool enable);
/**
* setup_histogram - setup histograms
@@ -320,29 +283,24 @@ struct dpu_hw_sspp_ops {
*/
void (*setup_scaler)(struct dpu_hw_sspp *ctx,
struct dpu_hw_scaler3_cfg *scaler3_cfg,
- const struct dpu_format *format);
-
- /**
- * get_scaler_ver - get scaler h/w version
- * @ctx: Pointer to pipe context
- */
- u32 (*get_scaler_ver)(struct dpu_hw_sspp *ctx);
+ const struct msm_format *format);
/**
* setup_cdp - setup client driven prefetch
* @pipe: Pointer to software pipe context
- * @cfg: Pointer to cdp configuration
+ * @fmt: format used by the sw pipe
+ * @enable: whether the CDP should be enabled for this pipe
*/
void (*setup_cdp)(struct dpu_sw_pipe *pipe,
- struct dpu_hw_cdp_cfg *cfg);
+ const struct msm_format *fmt,
+ bool enable);
};
/**
* struct dpu_hw_sspp - pipe description
* @base: hardware block base structure
* @hw: block hardware details
- * @catalog: back pointer to catalog
- * @ubwc: ubwc configuration data
+ * @ubwc: UBWC configuration data
* @idx: pipe index
* @cap: pointer to layer_cfg
* @ops: pointer to operations possible for this pipe
@@ -350,34 +308,25 @@ struct dpu_hw_sspp_ops {
struct dpu_hw_sspp {
struct dpu_hw_blk base;
struct dpu_hw_blk_reg_map hw;
- const struct dpu_mdss_cfg *catalog;
- const struct dpu_ubwc_cfg *ubwc;
+ const struct qcom_ubwc_cfg_data *ubwc;
/* Pipe */
enum dpu_sspp idx;
const struct dpu_sspp_cfg *cap;
+ const struct dpu_mdss_version *mdss_ver;
+
/* Ops */
struct dpu_hw_sspp_ops ops;
};
struct dpu_kms;
-/**
- * dpu_hw_sspp_init - initializes the sspp hw driver object.
- * Should be called once before accessing every pipe.
- * @idx: Pipe index for which driver object is required
- * @addr: Mapped register io address of MDP
- * @catalog : Pointer to mdss catalog data
- */
-struct dpu_hw_sspp *dpu_hw_sspp_init(enum dpu_sspp idx,
- void __iomem *addr, const struct dpu_mdss_cfg *catalog);
-/**
- * dpu_hw_sspp_destroy(): Destroys SSPP driver context
- * should be called during Hw pipe cleanup.
- * @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init
- */
-void dpu_hw_sspp_destroy(struct dpu_hw_sspp *ctx);
+struct dpu_hw_sspp *dpu_hw_sspp_init(struct drm_device *dev,
+ const struct dpu_sspp_cfg *cfg,
+ void __iomem *addr,
+ const struct qcom_ubwc_cfg_data *mdss_data,
+ const struct dpu_mdss_version *mdss_rev);
int _dpu_hw_sspp_init_debugfs(struct dpu_hw_sspp *hw_pipe, struct dpu_kms *kms,
struct dentry *entry);