diff options
Diffstat (limited to 'drivers/gpu/drm/msm/msm_drv.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_drv.h | 501 |
1 files changed, 255 insertions, 246 deletions
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index d7574e6bd4e4..6d847d593f1a 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/clk.h> #include <linux/cpufreq.h> +#include <linux/devfreq.h> #include <linux/module.h> #include <linux/component.h> #include <linux/platform_device.h> @@ -27,12 +28,18 @@ #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> -#include <drm/drm_plane_helper.h> +#include <drm/drm_print.h> #include <drm/drm_probe_helper.h> -#include <drm/drm_fb_helper.h> +#include <drm/display/drm_dsc.h> #include <drm/msm_drm.h> #include <drm/drm_gem.h> +extern struct fault_attr fail_gem_alloc; +extern struct fault_attr fail_gem_iova; + +struct drm_fb_helper; +struct drm_fb_helper_surface_size; + struct msm_kms; struct msm_gpu; struct msm_mmu; @@ -41,121 +48,38 @@ struct msm_rd_state; struct msm_perf_state; struct msm_gem_submit; struct msm_fence_context; -struct msm_gem_address_space; -struct msm_gem_vma; struct msm_disp_state; #define MAX_CRTCS 8 -#define MAX_PLANES 20 -#define MAX_ENCODERS 8 -#define MAX_BRIDGES 8 -#define MAX_CONNECTORS 8 #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) -enum msm_mdp_plane_property { - PLANE_PROP_ZPOS, - PLANE_PROP_ALPHA, - PLANE_PROP_PREMULTIPLIED, - PLANE_PROP_MAX_NUM -}; - enum msm_dp_controller { MSM_DP_CONTROLLER_0, MSM_DP_CONTROLLER_1, MSM_DP_CONTROLLER_2, + MSM_DP_CONTROLLER_3, MSM_DP_CONTROLLER_COUNT, }; -#define MSM_GPU_MAX_RINGS 4 -#define MAX_H_TILES_PER_DISPLAY 2 - -/** - * enum msm_display_caps - features/capabilities supported by displays - * @MSM_DISPLAY_CAP_VID_MODE: Video or "active" mode supported - * @MSM_DISPLAY_CAP_CMD_MODE: Command mode supported - * @MSM_DISPLAY_CAP_HOT_PLUG: Hot plug detection supported - * @MSM_DISPLAY_CAP_EDID: EDID supported - */ -enum msm_display_caps { - MSM_DISPLAY_CAP_VID_MODE = BIT(0), - MSM_DISPLAY_CAP_CMD_MODE = BIT(1), - MSM_DISPLAY_CAP_HOT_PLUG = BIT(2), - MSM_DISPLAY_CAP_EDID = BIT(3), +enum msm_dsi_controller { + MSM_DSI_CONTROLLER_0, + MSM_DSI_CONTROLLER_1, + MSM_DSI_CONTROLLER_COUNT, }; -/** - * enum msm_event_wait - type of HW events to wait for - * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW - * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel - * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters) - */ -enum msm_event_wait { - MSM_ENC_COMMIT_DONE = 0, - MSM_ENC_TX_COMPLETE, - MSM_ENC_VBLANK, -}; - -/** - * struct msm_display_topology - defines a display topology pipeline - * @num_lm: number of layer mixers used - * @num_enc: number of compression encoder blocks used - * @num_intf: number of interfaces the panel is mounted on - */ -struct msm_display_topology { - u32 num_lm; - u32 num_enc; - u32 num_intf; - u32 num_dspp; -}; - -/** - * struct msm_display_info - defines display properties - * @intf_type: DRM_MODE_ENCODER_ type - * @capabilities: Bitmask of display flags - * @num_of_h_tiles: Number of horizontal tiles in case of split interface - * @h_tile_instance: Controller instance used per tile. Number of elements is - * based on num_of_h_tiles - * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is - * used instead of panel TE in cmd mode panels - */ -struct msm_display_info { - int intf_type; - uint32_t capabilities; - uint32_t num_of_h_tiles; - uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; - bool is_te_using_watchdog_timer; -}; - -/* Commit/Event thread specific structure */ -struct msm_drm_thread { - struct drm_device *dev; - unsigned int crtc_id; - struct kthread_worker *worker; -}; +#define MSM_GPU_MAX_RINGS 4 struct msm_drm_private { struct drm_device *dev; struct msm_kms *kms; + int (*kms_init)(struct drm_device *dev); /* subordinate devices, if present: */ struct platform_device *gpu_pdev; - /* top level MDSS wrapper device (for MDP5/DPU only) */ - struct msm_mdss *mdss; - - /* possibly this should be in the kms component, but it is - * shared by both mdp4 and mdp5.. - */ - struct hdmi *hdmi; - - /* DSI is shared by mdp4 and mdp5 */ - struct msm_dsi *dsi[2]; - - struct msm_dp *dp[MSM_DP_CONTROLLER_COUNT]; - /* when we have more than one 'msm_gpu' these need to be an array: */ struct msm_gpu *gpu; @@ -163,13 +87,16 @@ struct msm_drm_private { bool is_a2xx; bool has_cached_coherent; - struct drm_fb_helper *fbdev; - struct msm_rd_state *rd; /* debugfs to dump all submits */ struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */ struct msm_perf_state *perf; /** + * total_mem: Total/global amount of memory backing GEM objects. + */ + atomic64_t total_mem; + + /** * List of all GEM objects (mainly for debugfs, protected by obj_lock * (acquire before per GEM object lock) */ @@ -177,70 +104,81 @@ struct msm_drm_private { struct mutex obj_lock; /** - * LRUs of inactive GEM objects. Every bo is either in one of the - * inactive lists (depending on whether or not it is shrinkable) or - * gpu->active_list (for the gpu it is active on[1]), or transiently - * on a temporary list as the shrinker is running. + * lru: * - * Note that inactive_willneed also contains pinned and vmap'd bos, - * but the number of pinned-but-not-active objects is small (scanout - * buffers, ringbuffer, etc). + * The various LRU's that a GEM object is in at various stages of + * it's lifetime. Objects start out in the unbacked LRU. When + * pinned (for scannout or permanently mapped GPU buffers, like + * ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When + * unpinned, it moves into willneed or dontneed LRU depending on + * madvise state. When backing pages are evicted (willneed) or + * purged (dontneed) it moves back into the unbacked LRU. * - * These lists are protected by mm_lock (which should be acquired - * before per GEM object lock). One should *not* hold mm_lock in - * get_pages()/vmap()/etc paths, as they can trigger the shrinker. - * - * [1] if someone ever added support for the old 2d cores, there could be - * more than one gpu object + * The dontneed LRU is considered by the shrinker for objects + * that are candidate for purging, and the willneed LRU is + * considered for objects that could be evicted. */ - struct list_head inactive_willneed; /* inactive + potentially unpin/evictable */ - struct list_head inactive_dontneed; /* inactive + shrinkable */ - struct list_head inactive_unpinned; /* inactive + purged or unpinned */ - long shrinkable_count; /* write access under mm_lock */ - long evictable_count; /* write access under mm_lock */ - struct mutex mm_lock; - - struct workqueue_struct *wq; - - unsigned int num_planes; - struct drm_plane *planes[MAX_PLANES]; - - unsigned int num_crtcs; - struct drm_crtc *crtcs[MAX_CRTCS]; - - struct msm_drm_thread event_thread[MAX_CRTCS]; - - unsigned int num_encoders; - struct drm_encoder *encoders[MAX_ENCODERS]; + struct { + /** + * unbacked: + * + * The LRU for GEM objects without backing pages allocated. + * This mostly exists so that objects are always is one + * LRU. + */ + struct drm_gem_lru unbacked; - unsigned int num_bridges; - struct drm_bridge *bridges[MAX_BRIDGES]; + /** + * pinned: + * + * The LRU for pinned GEM objects + */ + struct drm_gem_lru pinned; - unsigned int num_connectors; - struct drm_connector *connectors[MAX_CONNECTORS]; + /** + * willneed: + * + * The LRU for unpinned GEM objects which are in madvise + * WILLNEED state (ie. can be evicted) + */ + struct drm_gem_lru willneed; - /* Properties */ - struct drm_property *plane_property[PLANE_PROP_MAX_NUM]; + /** + * dontneed: + * + * The LRU for unpinned GEM objects which are in madvise + * DONTNEED state (ie. can be purged) + */ + struct drm_gem_lru dontneed; - /* VRAM carveout, used when no IOMMU: */ - struct { - unsigned long size; - dma_addr_t paddr; - /* NOTE: mm managed at the page level, size is in # of pages - * and position mm_node->start is in # of pages: + /** + * lock: + * + * Protects manipulation of all of the LRUs. */ - struct drm_mm mm; - spinlock_t lock; /* Protects drm_mm node allocation/removal */ - } vram; + struct mutex lock; + } lru; struct notifier_block vmap_notifier; - struct shrinker shrinker; + struct shrinker *shrinker; - struct drm_atomic_state *pm_state; - - /* For hang detection, in ms */ + /** + * hangcheck_period: For hang detection, in ms + * + * Note that in practice, a submit/job will get at least two hangcheck + * periods, due to checking for progress being implemented as simply + * "have the CP position registers changed since last time?" + */ unsigned int hangcheck_period; + /** gpu_devfreq_config: Devfreq tuning config for the GPU. */ + struct devfreq_simple_ondemand_data gpu_devfreq_config; + + /** + * gpu_clamp_to_idle: Enable clamping to idle freq when inactive + */ + bool gpu_clamp_to_idle; + /** * disable_err_irq: * @@ -249,94 +187,109 @@ struct msm_drm_private { * the sw hangcheck mechanism. */ bool disable_err_irq; -}; -struct msm_format { - uint32_t pixel_format; + /** + * @fault_stall_lock: + * + * Serialize changes to stall-on-fault state. + */ + spinlock_t fault_stall_lock; + + /** + * @fault_stall_reenable_time: + * + * If stall_enabled is false, when to reenable stall-on-fault. + * Protected by @fault_stall_lock. + */ + ktime_t stall_reenable_time; + + /** + * @stall_enabled: + * + * Whether stall-on-fault is currently enabled. Protected by + * @fault_stall_lock. + */ + bool stall_enabled; }; +const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, uint64_t modifier); + struct msm_pending_timer; -int msm_atomic_prepare_fb(struct drm_plane *plane, - struct drm_plane_state *new_state); int msm_atomic_init_pending_timer(struct msm_pending_timer *timer, struct msm_kms *kms, int crtc_idx); void msm_atomic_destroy_pending_timer(struct msm_pending_timer *timer); void msm_atomic_commit_tail(struct drm_atomic_state *state); +int msm_atomic_check(struct drm_device *dev, struct drm_atomic_state *state); struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); -void msm_atomic_state_clear(struct drm_atomic_state *state); -void msm_atomic_state_free(struct drm_atomic_state *state); int msm_crtc_enable_vblank(struct drm_crtc *crtc); void msm_crtc_disable_vblank(struct drm_crtc *crtc); -int msm_gem_init_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int npages, - u64 range_start, u64 range_end); -void msm_gem_purge_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -int msm_gem_map_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int prot, - struct sg_table *sgt, int npages); -void msm_gem_close_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); - - -struct msm_gem_address_space * -msm_gem_address_space_get(struct msm_gem_address_space *aspace); - -void msm_gem_address_space_put(struct msm_gem_address_space *aspace); - -struct msm_gem_address_space * -msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, - u64 va_start, u64 size); - int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); +struct drm_gpuvm *msm_kms_init_vm(struct drm_device *dev, struct device *mdss_dev); bool msm_use_mmu(struct drm_device *dev); int msm_ioctl_gem_submit(struct drm_device *dev, void *data, - struct drm_file *file); + struct drm_file *file); +int msm_ioctl_vm_bind(struct drm_device *dev, void *data, + struct drm_file *file); #ifdef CONFIG_DEBUG_FS unsigned long msm_gem_shrinker_shrink(struct drm_device *dev, unsigned long nr_to_scan); #endif -void msm_gem_shrinker_init(struct drm_device *dev); +int msm_gem_shrinker_init(struct drm_device *dev); void msm_gem_shrinker_cleanup(struct drm_device *dev); struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); -int msm_gem_prime_vmap(struct drm_gem_object *obj, struct dma_buf_map *map); -void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct dma_buf_map *map); +int msm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map); +void msm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map); +struct drm_gem_object *msm_gem_prime_import(struct drm_device *dev, struct dma_buf *buf); struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, struct dma_buf_attachment *attach, struct sg_table *sg); +struct dma_buf *msm_gem_prime_export(struct drm_gem_object *obj, int flags); int msm_gem_prime_pin(struct drm_gem_object *obj); void msm_gem_prime_unpin(struct drm_gem_object *obj); -int msm_framebuffer_prepare(struct drm_framebuffer *fb, - struct msm_gem_address_space *aspace); -void msm_framebuffer_cleanup(struct drm_framebuffer *fb, - struct msm_gem_address_space *aspace); -uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, - struct msm_gem_address_space *aspace, int plane); +int msm_framebuffer_prepare(struct drm_framebuffer *fb, bool needs_dirtyfb); +void msm_framebuffer_cleanup(struct drm_framebuffer *fb, bool needed_dirtyfb); +uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int plane); struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane); const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb); struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, - struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); + struct drm_file *file, const struct drm_format_info *info, + const struct drm_mode_fb_cmd2 *mode_cmd); struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev, int w, int h, int p, uint32_t format); -struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev); -void msm_fbdev_free(struct drm_device *dev); +#ifdef CONFIG_DRM_MSM_KMS_FBDEV +int msm_fbdev_driver_fbdev_probe(struct drm_fb_helper *helper, + struct drm_fb_helper_surface_size *sizes); +#define MSM_FBDEV_DRIVER_OPS \ + .fbdev_probe = msm_fbdev_driver_fbdev_probe +#else +#define MSM_FBDEV_DRIVER_OPS \ + .fbdev_probe = NULL +#endif struct hdmi; +#ifdef CONFIG_DRM_MSM_HDMI int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, struct drm_encoder *encoder); void __init msm_hdmi_register(void); void __exit msm_hdmi_unregister(void); +#else +static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, + struct drm_encoder *encoder) +{ + return -EINVAL; +} +static inline void __init msm_hdmi_register(void) {} +static inline void __exit msm_hdmi_unregister(void) {} +#endif struct msm_dsi; #ifdef CONFIG_DRM_MSM_DSI @@ -350,6 +303,9 @@ void msm_dsi_snapshot(struct msm_disp_state *disp_state, struct msm_dsi *msm_dsi bool msm_dsi_is_cmd_mode(struct msm_dsi *msm_dsi); bool msm_dsi_is_bonded_dsi(struct msm_dsi *msm_dsi); bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi); +bool msm_dsi_wide_bus_enabled(struct msm_dsi *msm_dsi); +struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi); +const char *msm_dsi_get_te_source(struct msm_dsi *msm_dsi); #else static inline void __init msm_dsi_register(void) { @@ -378,27 +334,34 @@ static inline bool msm_dsi_is_master_dsi(struct msm_dsi *msm_dsi) { return false; } +static inline bool msm_dsi_wide_bus_enabled(struct msm_dsi *msm_dsi) +{ + return false; +} + +static inline struct drm_dsc_config *msm_dsi_get_dsc_config(struct msm_dsi *msm_dsi) +{ + return NULL; +} + +static inline const char *msm_dsi_get_te_source(struct msm_dsi *msm_dsi) +{ + return NULL; +} #endif +struct msm_dp; #ifdef CONFIG_DRM_MSM_DP int __init msm_dp_register(void); void __exit msm_dp_unregister(void); int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, - struct drm_encoder *encoder); -int msm_dp_display_enable(struct msm_dp *dp, struct drm_encoder *encoder); -int msm_dp_display_disable(struct msm_dp *dp, struct drm_encoder *encoder); -int msm_dp_display_pre_disable(struct msm_dp *dp, struct drm_encoder *encoder); -void msm_dp_display_mode_set(struct msm_dp *dp, struct drm_encoder *encoder, - const struct drm_display_mode *mode, - const struct drm_display_mode *adjusted_mode); - -struct drm_bridge *msm_dp_bridge_init(struct msm_dp *dp_display, - struct drm_device *dev, - struct drm_encoder *encoder); -void msm_dp_irq_postinstall(struct msm_dp *dp_display); + struct drm_encoder *encoder, bool yuv_supported); void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display); - -void msm_dp_debugfs_init(struct msm_dp *dp_display, struct drm_minor *minor); +bool msm_dp_is_yuv_420_enabled(const struct msm_dp *dp_display, + const struct drm_display_mode *mode); +bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display, + const struct drm_display_mode *mode); +bool msm_dp_wide_bus_available(const struct msm_dp *dp_display); #else static inline int __init msm_dp_register(void) @@ -410,51 +373,66 @@ static inline void __exit msm_dp_unregister(void) } static inline int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, - struct drm_encoder *encoder) -{ - return -EINVAL; -} -static inline int msm_dp_display_enable(struct msm_dp *dp, - struct drm_encoder *encoder) -{ - return -EINVAL; -} -static inline int msm_dp_display_disable(struct msm_dp *dp, - struct drm_encoder *encoder) -{ - return -EINVAL; -} -static inline int msm_dp_display_pre_disable(struct msm_dp *dp, - struct drm_encoder *encoder) + struct drm_encoder *encoder, + bool yuv_supported) { return -EINVAL; } -static inline void msm_dp_display_mode_set(struct msm_dp *dp, - struct drm_encoder *encoder, - const struct drm_display_mode *mode, - const struct drm_display_mode *adjusted_mode) + +static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display) { } -static inline void msm_dp_irq_postinstall(struct msm_dp *dp_display) +static inline bool msm_dp_is_yuv_420_enabled(const struct msm_dp *dp_display, + const struct drm_display_mode *mode) { + return false; } -static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display) +static inline bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display, + const struct drm_display_mode *mode) { + return false; } -static inline void msm_dp_debugfs_init(struct msm_dp *dp_display, - struct drm_minor *minor) +static inline bool msm_dp_wide_bus_available(const struct msm_dp *dp_display) { + return false; } #endif -void __init msm_mdp_register(void); -void __exit msm_mdp_unregister(void); -void __init msm_dpu_register(void); -void __exit msm_dpu_unregister(void); +#ifdef CONFIG_DRM_MSM_MDP4 +void msm_mdp4_register(void); +void msm_mdp4_unregister(void); +#else +static inline void msm_mdp4_register(void) {} +static inline void msm_mdp4_unregister(void) {} +#endif + +#ifdef CONFIG_DRM_MSM_MDP5 +void msm_mdp_register(void); +void msm_mdp_unregister(void); +#else +static inline void msm_mdp_register(void) {} +static inline void msm_mdp_unregister(void) {} +#endif + +#ifdef CONFIG_DRM_MSM_DPU +void msm_dpu_register(void); +void msm_dpu_unregister(void); +#else +static inline void msm_dpu_register(void) {} +static inline void msm_dpu_unregister(void) {} +#endif + +#ifdef CONFIG_DRM_MSM_MDSS +void msm_mdss_register(void); +void msm_mdss_unregister(void); +#else +static inline void msm_mdss_register(void) {} +static inline void msm_mdss_unregister(void) {} +#endif #ifdef CONFIG_DEBUG_FS void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); @@ -480,15 +458,23 @@ struct clk *msm_clk_get(struct platform_device *pdev, const char *name); struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count, const char *name); -void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, - const char *dbgname); +void __iomem *msm_ioremap(struct platform_device *pdev, const char *name); void __iomem *msm_ioremap_size(struct platform_device *pdev, const char *name, - const char *dbgname, phys_addr_t *size); -void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name, - const char *dbgname); -void msm_writel(u32 data, void __iomem *addr); -u32 msm_readl(const void __iomem *addr); -void msm_rmw(void __iomem *addr, u32 mask, u32 or); + phys_addr_t *size); +void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name); +void __iomem *msm_ioremap_mdss(struct platform_device *mdss_pdev, + struct platform_device *dev, + const char *name); + +struct icc_path *msm_icc_get(struct device *dev, const char *name); + +static inline void msm_rmw(void __iomem *addr, u32 mask, u32 or) +{ + u32 val = readl(addr); + + val &= ~mask; + writel(val | or, addr); +} /** * struct msm_hrtimer_work - a helper to combine an hrtimer with kthread_work @@ -512,6 +498,12 @@ void msm_hrtimer_work_init(struct msm_hrtimer_work *work, clockid_t clock_id, enum hrtimer_mode mode); +/* Helper for returning a UABI error with optional logging which can make + * it easier for userspace to understand what it is doing wrong. + */ +#define UERR(err, drm, fmt, ...) \ + ({ DRM_DEV_DEBUG_DRIVER((drm)->dev, fmt, ##__VA_ARGS__); -(err); }) + #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) @@ -536,16 +528,33 @@ static inline int align_pitch(int width, int bpp) static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) { ktime_t now = ktime_get(); - s64 remaining_jiffies; - if (ktime_compare(*timeout, now) < 0) { - remaining_jiffies = 0; - } else { - ktime_t rem = ktime_sub(*timeout, now); - remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); - } + if (ktime_compare(*timeout, now) <= 0) + return 0; - return clamp(remaining_jiffies, 0LL, (s64)INT_MAX); + ktime_t rem = ktime_sub(*timeout, now); + s64 remaining_jiffies = ktime_divns(rem, NSEC_PER_SEC / HZ); + return clamp(remaining_jiffies, 1LL, (s64)INT_MAX); } +/* Driver helpers */ + +extern const struct component_master_ops msm_drm_ops; + +int msm_kms_pm_prepare(struct device *dev); +void msm_kms_pm_complete(struct device *dev); + +int msm_gpu_probe(struct platform_device *pdev, + const struct component_ops *ops); +void msm_gpu_remove(struct platform_device *pdev, + const struct component_ops *ops); +int msm_drv_probe(struct device *dev, + int (*kms_init)(struct drm_device *dev), + struct msm_kms *kms); +void msm_kms_shutdown(struct platform_device *pdev); + +bool msm_disp_drv_should_bind(struct device *dev, bool dpu_driver); + +bool msm_gpu_no_components(void); + #endif /* __MSM_DRV_H__ */ |