diff options
Diffstat (limited to 'drivers/gpu/drm/panel/panel-simple.c')
| -rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 6764ac630e22..95eb2122a767 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -687,6 +687,7 @@ static const struct panel_desc auo_b101aw03 = { .width = 223, .height = 125, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct display_timing auo_b101ean01_timing = { @@ -1296,6 +1297,60 @@ static const struct panel_desc cdtech_s043wq26h_ct7 = { .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }; +/* S070PWS19HP-FC21 2017/04/22 */ +static const struct drm_display_mode cdtech_s070pws19hp_fc21_mode = { + .clock = 51200, + .hdisplay = 1024, + .hsync_start = 1024 + 160, + .hsync_end = 1024 + 160 + 20, + .htotal = 1024 + 160 + 20 + 140, + .vdisplay = 600, + .vsync_start = 600 + 12, + .vsync_end = 600 + 12 + 3, + .vtotal = 600 + 12 + 3 + 20, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +}; + +static const struct panel_desc cdtech_s070pws19hp_fc21 = { + .modes = &cdtech_s070pws19hp_fc21_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 154, + .height = 86, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + +/* S070SWV29HG-DC44 2017/09/21 */ +static const struct drm_display_mode cdtech_s070swv29hg_dc44_mode = { + .clock = 33300, + .hdisplay = 800, + .hsync_start = 800 + 210, + .hsync_end = 800 + 210 + 2, + .htotal = 800 + 210 + 2 + 44, + .vdisplay = 480, + .vsync_start = 480 + 22, + .vsync_end = 480 + 22 + 2, + .vtotal = 480 + 22 + 2 + 21, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, +}; + +static const struct panel_desc cdtech_s070swv29hg_dc44 = { + .modes = &cdtech_s070swv29hg_dc44_mode, + .num_modes = 1, + .bpc = 6, + .size = { + .width = 154, + .height = 86, + }, + .bus_format = MEDIA_BUS_FMT_RGB666_1X18, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE, + .connector_type = DRM_MODE_CONNECTOR_DPI, +}; + static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { .clock = 35000, .hdisplay = 800, @@ -1340,6 +1395,7 @@ static const struct panel_desc chunghwa_claa070wp03xg = { .width = 94, .height = 150, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode chunghwa_claa101wa01a_mode = { @@ -1362,6 +1418,7 @@ static const struct panel_desc chunghwa_claa101wa01a = { .width = 220, .height = 120, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode chunghwa_claa101wb01_mode = { @@ -1384,6 +1441,7 @@ static const struct panel_desc chunghwa_claa101wb01 = { .width = 223, .height = 125, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { @@ -1573,6 +1631,7 @@ static const struct panel_desc edt_et057090dhu = { }, .bus_format = MEDIA_BUS_FMT_RGB666_1X18, .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode edt_etm0700g0dh6_mode = { @@ -2055,6 +2114,7 @@ static const struct panel_desc innolux_n156bge_l21 = { .width = 344, .height = 193, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode innolux_p120zdg_bf1_mode = { @@ -3001,6 +3061,7 @@ static const struct panel_desc samsung_ltn101nt05 = { .width = 223, .height = 125, }, + .connector_type = DRM_MODE_CONNECTOR_LVDS, }; static const struct drm_display_mode samsung_ltn140at29_301_mode = { @@ -3326,6 +3387,18 @@ static const struct panel_desc tianma_tm070jdhg30 = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct panel_desc tianma_tm070jvhg33 = { + .timings = &tianma_tm070jdhg30_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 150, + .height = 94, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct display_timing tianma_tm070rvhg71_timing = { .pixelclock = { 27700000, 29200000, 39600000 }, .hactive = { 800, 800, 800 }, @@ -3675,6 +3748,12 @@ static const struct of_device_id platform_of_match[] = { .compatible = "cdtech,s043wq26h-ct7", .data = &cdtech_s043wq26h_ct7, }, { + .compatible = "cdtech,s070pws19hp-fc21", + .data = &cdtech_s070pws19hp_fc21, + }, { + .compatible = "cdtech,s070swv29hg-dc44", + .data = &cdtech_s070swv29hg_dc44, + }, { .compatible = "cdtech,s070wv95-ct16", .data = &cdtech_s070wv95_ct16, }, { @@ -3924,6 +4003,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "tianma,tm070jdhg30", .data = &tianma_tm070jdhg30, }, { + .compatible = "tianma,tm070jvhg33", + .data = &tianma_tm070jvhg33, + }, { .compatible = "tianma,tm070rvhg71", .data = &tianma_tm070rvhg71, }, { |