diff options
Diffstat (limited to 'drivers/gpu/drm/pl111/pl111_display.c')
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_display.c | 28 |
1 files changed, 17 insertions, 11 deletions
diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 443e3b932322..3a9661b9b1fc 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -12,12 +12,15 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/dma-buf.h> +#include <linux/media-bus-format.h> #include <linux/of_graph.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> +#include <drm/drm_framebuffer.h> #include <drm/drm_gem_atomic_helper.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> +#include <drm/drm_print.h> #include <drm/drm_vblank.h> #include "pl111_drm.h" @@ -51,7 +54,7 @@ pl111_mode_valid(struct drm_simple_display_pipe *pipe, { struct drm_device *drm = pipe->crtc.dev; struct pl111_drm_dev_private *priv = drm->dev_private; - u32 cpp = priv->variant->fb_bpp / 8; + u32 cpp = DIV_ROUND_UP(priv->variant->fb_depth, 8); u64 bw; /* @@ -92,7 +95,7 @@ static int pl111_display_check(struct drm_simple_display_pipe *pipe, return -EINVAL; if (fb) { - u32 offset = drm_fb_cma_get_gem_addr(fb, pstate, 0); + u32 offset = drm_fb_dma_get_gem_addr(fb, pstate, 0); /* FB base address must be dword aligned. */ if (offset & 3) @@ -248,7 +251,7 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, cntl |= CNTL_ST_CDWID_24; /* - * Note that the the ARM hardware's format reader takes 'r' from + * Note that the ARM hardware's format reader takes 'r' from * the low bit, while DRM formats list channels from high bit * to low bit as you read left to right. The ST Micro version of * the PL110 (LCDC) however uses the standard DRM format. @@ -396,7 +399,7 @@ static void pl111_display_update(struct drm_simple_display_pipe *pipe, struct drm_framebuffer *fb = pstate->fb; if (fb) { - u32 addr = drm_fb_cma_get_gem_addr(fb, pstate, 0); + u32 addr = drm_fb_dma_get_gem_addr(fb, pstate, 0); writel(addr, priv->regs + CLCD_UBAS); } @@ -471,12 +474,15 @@ static int pl111_clk_div_choose_div(struct clk_hw *hw, unsigned long rate, return best_div; } -static long pl111_clk_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int pl111_clk_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - int div = pl111_clk_div_choose_div(hw, rate, prate, true); + int div = pl111_clk_div_choose_div(hw, req->rate, + &req->best_parent_rate, true); - return DIV_ROUND_UP_ULL(*prate, div); + req->rate = DIV_ROUND_UP_ULL(req->best_parent_rate, div); + + return 0; } static unsigned long pl111_clk_div_recalc_rate(struct clk_hw *hw, @@ -526,7 +532,7 @@ static int pl111_clk_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops pl111_clk_div_ops = { .recalc_rate = pl111_clk_div_recalc_rate, - .round_rate = pl111_clk_div_round_rate, + .determine_rate = pl111_clk_div_determine_rate, .set_rate = pl111_clk_div_set_rate, }; |