diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/ci_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/ci_dpm.c | 48 |
1 files changed, 18 insertions, 30 deletions
diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index abe9d65cc460..ba8db1d07c07 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -2457,7 +2457,7 @@ static void ci_register_patching_mc_arb(struct radeon_device *rdev, u32 tmp, tmp2; tmp = RREG32(MC_SEQ_MISC0); - patch = ((tmp & 0x0000f00) == 0x300) ? true : false; + patch = (tmp & 0x0000f00) == 0x300; if (patch && ((rdev->pdev->device == 0x67B0) || @@ -3238,7 +3238,8 @@ static int ci_populate_all_graphic_levels(struct radeon_device *rdev) u32 level_array_size = sizeof(SMU7_Discrete_GraphicsLevel) * SMU7_MAX_LEVELS_GRAPHICS; SMU7_Discrete_GraphicsLevel *levels = pi->smc_state_table.GraphicsLevel; - u32 i, ret; + int ret; + u32 i; memset(levels, 0, level_array_size); @@ -3285,7 +3286,8 @@ static int ci_populate_all_memory_levels(struct radeon_device *rdev) u32 level_array_size = sizeof(SMU7_Discrete_MemoryLevel) * SMU7_MAX_LEVELS_MEMORY; SMU7_Discrete_MemoryLevel *levels = pi->smc_state_table.MemoryLevel; - u32 i, ret; + int ret; + u32 i; memset(levels, 0, level_array_size); @@ -3405,12 +3407,8 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) &rdev->pm.dpm.dyn_state.cac_leakage_table; u32 i; - if (allowed_sclk_vddc_table == NULL) - return -EINVAL; if (allowed_sclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_table == NULL) - return -EINVAL; if (allowed_mclk_table->count < 1) return -EINVAL; @@ -3440,7 +3438,7 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = allowed_sclk_vddc_table->entries[i].clk; pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = - (i == 0) ? true : false; + i == 0; pi->dpm_table.sclk_table.count++; } } @@ -3453,7 +3451,7 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = allowed_mclk_table->entries[i].clk; pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = - (i == 0) ? true : false; + i == 0; pi->dpm_table.mclk_table.count++; } } @@ -3468,24 +3466,20 @@ static int ci_setup_default_dpm_tables(struct radeon_device *rdev) pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; allowed_mclk_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; - if (allowed_mclk_table) { - for (i = 0; i < allowed_mclk_table->count; i++) { - pi->dpm_table.vddci_table.dpm_levels[i].value = - allowed_mclk_table->entries[i].v; - pi->dpm_table.vddci_table.dpm_levels[i].enabled = true; - } - pi->dpm_table.vddci_table.count = allowed_mclk_table->count; + for (i = 0; i < allowed_mclk_table->count; i++) { + pi->dpm_table.vddci_table.dpm_levels[i].value = + allowed_mclk_table->entries[i].v; + pi->dpm_table.vddci_table.dpm_levels[i].enabled = true; } + pi->dpm_table.vddci_table.count = allowed_mclk_table->count; allowed_mclk_table = &rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk; - if (allowed_mclk_table) { - for (i = 0; i < allowed_mclk_table->count; i++) { - pi->dpm_table.mvdd_table.dpm_levels[i].value = - allowed_mclk_table->entries[i].v; - pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true; - } - pi->dpm_table.mvdd_table.count = allowed_mclk_table->count; + for (i = 0; i < allowed_mclk_table->count; i++) { + pi->dpm_table.mvdd_table.dpm_levels[i].value = + allowed_mclk_table->entries[i].v; + pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true; } + pi->dpm_table.mvdd_table.count = allowed_mclk_table->count; ci_setup_default_pcie_tables(rdev); @@ -4495,7 +4489,7 @@ static int ci_register_patching_mc_seq(struct radeon_device *rdev, bool patch; tmp = RREG32(MC_SEQ_MISC0); - patch = ((tmp & 0x0000f00) == 0x300) ? true : false; + patch = (tmp & 0x0000f00) == 0x300; if (patch && ((rdev->pdev->device == 0x67B0) || @@ -4880,16 +4874,10 @@ static int ci_set_private_data_variables_based_on_pptable(struct radeon_device * struct radeon_clock_voltage_dependency_table *allowed_mclk_vddci_table = &rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk; - if (allowed_sclk_vddc_table == NULL) - return -EINVAL; if (allowed_sclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_vddc_table == NULL) - return -EINVAL; if (allowed_mclk_vddc_table->count < 1) return -EINVAL; - if (allowed_mclk_vddci_table == NULL) - return -EINVAL; if (allowed_mclk_vddci_table->count < 1) return -EINVAL; |