diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_legacy_tv.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_tv.c | 30 |
1 files changed, 9 insertions, 21 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c index 49750d07ab7d..7883e9ec0bae 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c @@ -1,5 +1,7 @@ -#include <drm/drmP.h> -#include <drm/drm_crtc_helper.h> +// SPDX-License-Identifier: MIT + +#include <drm/drm_device.h> + #include "radeon.h" /* @@ -420,24 +422,14 @@ static void radeon_legacy_write_tv_restarts(struct radeon_encoder *radeon_encode static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder) { - struct drm_device *dev = encoder->dev; - struct radeon_device *rdev = dev->dev_private; struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; - struct radeon_crtc *radeon_crtc; int restart; unsigned int h_total, v_total, f_total; int v_offset, h_offset; u16 p1, p2, h_inc; bool h_changed; const struct radeon_tv_mode_constants *const_ptr; - struct radeon_pll *pll; - - radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); - if (radeon_crtc->crtc_id == 1) - pll = &rdev->clock.p2pll; - else - pll = &rdev->clock.p1pll; const_ptr = radeon_legacy_tv_get_std_mode(radeon_encoder, NULL); if (!const_ptr) @@ -544,7 +536,7 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, uint32_t tv_master_cntl, tv_rgb_cntl, tv_dac_cntl; uint32_t tv_modulator_cntl1, tv_modulator_cntl2; uint32_t tv_vscaler_cntl1, tv_vscaler_cntl2; - uint32_t tv_pll_cntl, tv_pll_cntl1, tv_ftotal; + uint32_t tv_pll_cntl, tv_ftotal; uint32_t tv_y_fall_cntl, tv_y_rise_cntl, tv_y_saw_tooth_cntl; uint32_t m, n, p; const uint16_t *hor_timing; @@ -716,12 +708,6 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, (((n >> 9) & RADEON_TV_N0HI_MASK) << RADEON_TV_N0HI_SHIFT) | ((p & RADEON_TV_P_MASK) << RADEON_TV_P_SHIFT); - tv_pll_cntl1 = (((4 & RADEON_TVPCP_MASK) << RADEON_TVPCP_SHIFT) | - ((4 & RADEON_TVPVG_MASK) << RADEON_TVPVG_SHIFT) | - ((1 & RADEON_TVPDC_MASK) << RADEON_TVPDC_SHIFT) | - RADEON_TVCLK_SRC_SEL_TVPLL | - RADEON_TVPLL_TEST_DIS); - tv_dac->tv.tv_uv_adr = 0xc8; if (tv_dac->tv_std == TV_STD_NTSC || @@ -738,12 +724,14 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder, } for (i = 0; i < MAX_H_CODE_TIMING_LEN; i++) { - if ((tv_dac->tv.h_code_timing[i] = hor_timing[i]) == 0) + tv_dac->tv.h_code_timing[i] = hor_timing[i]; + if (tv_dac->tv.h_code_timing[i] == 0) break; } for (i = 0; i < MAX_V_CODE_TIMING_LEN; i++) { - if ((tv_dac->tv.v_code_timing[i] = vert_timing[i]) == 0) + tv_dac->tv.v_code_timing[i] = vert_timing[i]; + if (tv_dac->tv.v_code_timing[i] == 0) break; } |