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path: root/drivers/gpu/drm/sun4i/sun4i_backend.c
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Diffstat (limited to 'drivers/gpu/drm/sun4i/sun4i_backend.c')
-rw-r--r--drivers/gpu/drm/sun4i/sun4i_backend.c74
1 files changed, 37 insertions, 37 deletions
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c
index bf8cfefa0365..40405a52a073 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -17,11 +17,13 @@
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
+#include <drm/drm_blend.h>
#include <drm/drm_crtc.h>
-#include <drm/drm_fb_cma_helper.h>
+#include <drm/drm_fb_dma_helper.h>
#include <drm/drm_fourcc.h>
-#include <drm/drm_gem_cma_helper.h>
-#include <drm/drm_plane_helper.h>
+#include <drm/drm_framebuffer.h>
+#include <drm/drm_gem_dma_helper.h>
+#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>
#include "sun4i_backend.h"
@@ -68,7 +70,9 @@ static void sun4i_backend_disable_color_correction(struct sunxi_engine *engine)
SUN4I_BACKEND_OCCTL_ENABLE, 0);
}
-static void sun4i_backend_commit(struct sunxi_engine *engine)
+static void sun4i_backend_commit(struct sunxi_engine *engine,
+ struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
{
DRM_DEBUG_DRIVER("Committing changes\n");
@@ -172,14 +176,6 @@ int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
DRM_DEBUG_DRIVER("Updating layer %d\n", layer);
- if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
- DRM_DEBUG_DRIVER("Primary layer, updating global size W: %u H: %u\n",
- state->crtc_w, state->crtc_h);
- regmap_write(backend->engine.regs, SUN4I_BACKEND_DISSIZE_REG,
- SUN4I_BACKEND_DISSIZE(state->crtc_w,
- state->crtc_h));
- }
-
/* Set height and width */
DRM_DEBUG_DRIVER("Layer size W: %u H: %u\n",
state->crtc_w, state->crtc_h);
@@ -259,7 +255,6 @@ int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
{
struct drm_plane_state *state = plane->state;
struct drm_framebuffer *fb = state->fb;
- bool interlaced = false;
u32 val;
int ret;
@@ -267,17 +262,6 @@ int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_ATTCTL_REG0(layer),
SUN4I_BACKEND_ATTCTL_REG0_LAY_YUVEN, 0);
- if (plane->state->crtc)
- interlaced = plane->state->crtc->state->adjusted_mode.flags
- & DRM_MODE_FLAG_INTERLACE;
-
- regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG,
- SUN4I_BACKEND_MODCTL_ITLMOD_EN,
- interlaced ? SUN4I_BACKEND_MODCTL_ITLMOD_EN : 0);
-
- DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",
- interlaced ? "on" : "off");
-
val = SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(state->alpha >> 8);
if (state->alpha != DRM_BLEND_ALPHA_OPAQUE)
val |= SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA_EN;
@@ -348,7 +332,7 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
struct drm_plane_state *state = plane->state;
struct drm_framebuffer *fb = state->fb;
u32 lo_paddr, hi_paddr;
- dma_addr_t paddr;
+ dma_addr_t dma_addr;
/* Set the line width */
DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8);
@@ -357,21 +341,21 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
fb->pitches[0] * 8);
/* Get the start of the displayed memory */
- paddr = drm_fb_cma_get_gem_addr(fb, state, 0);
- DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
+ dma_addr = drm_fb_dma_get_gem_addr(fb, state, 0);
+ DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr);
if (fb->format->is_yuv)
- return sun4i_backend_update_yuv_buffer(backend, fb, paddr);
+ return sun4i_backend_update_yuv_buffer(backend, fb, dma_addr);
/* Write the 32 lower bits of the address (in bits) */
- lo_paddr = paddr << 3;
+ lo_paddr = dma_addr << 3;
DRM_DEBUG_DRIVER("Setting address lower bits to 0x%x\n", lo_paddr);
regmap_write(backend->engine.regs,
SUN4I_BACKEND_LAYFB_L32ADD_REG(layer),
lo_paddr);
/* And the upper bits */
- hi_paddr = paddr >> 29;
+ hi_paddr = dma_addr >> 29;
DRM_DEBUG_DRIVER("Setting address high bits to 0x%x\n", hi_paddr);
regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG,
SUN4I_BACKEND_LAYFB_H4ADD_MSK(layer),
@@ -654,6 +638,25 @@ static void sun4i_backend_vblank_quirk(struct sunxi_engine *engine)
spin_unlock(&backend->frontend_lock);
};
+static void sun4i_backend_mode_set(struct sunxi_engine *engine,
+ const struct drm_display_mode *mode)
+{
+ bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
+
+ DRM_DEBUG_DRIVER("Updating global size W: %u H: %u\n",
+ mode->hdisplay, mode->vdisplay);
+
+ regmap_write(engine->regs, SUN4I_BACKEND_DISSIZE_REG,
+ SUN4I_BACKEND_DISSIZE(mode->hdisplay, mode->vdisplay));
+
+ regmap_update_bits(engine->regs, SUN4I_BACKEND_MODCTL_REG,
+ SUN4I_BACKEND_MODCTL_ITLMOD_EN,
+ interlaced ? SUN4I_BACKEND_MODCTL_ITLMOD_EN : 0);
+
+ DRM_DEBUG_DRIVER("Switching display backend interlaced mode %s\n",
+ interlaced ? "on" : "off");
+}
+
static int sun4i_backend_init_sat(struct device *dev) {
struct sun4i_backend *backend = dev_get_drvdata(dev);
int ret;
@@ -765,6 +768,7 @@ static const struct sunxi_engine_ops sun4i_backend_engine_ops = {
.apply_color_correction = sun4i_backend_apply_color_correction,
.disable_color_correction = sun4i_backend_disable_color_correction,
.vblank_quirk = sun4i_backend_vblank_quirk,
+ .mode_set = sun4i_backend_mode_set,
};
static const struct regmap_config sun4i_backend_regmap_config = {
@@ -782,7 +786,6 @@ static int sun4i_backend_bind(struct device *dev, struct device *master,
struct sun4i_drv *drv = drm->dev_private;
struct sun4i_backend *backend;
const struct sun4i_backend_quirks *quirks;
- struct resource *res;
void __iomem *regs;
int i, ret;
@@ -792,7 +795,7 @@ static int sun4i_backend_bind(struct device *dev, struct device *master,
dev_set_drvdata(dev, backend);
spin_lock_init(&backend->frontend_lock);
- if (of_find_property(dev->of_node, "interconnects", NULL)) {
+ if (of_property_present(dev->of_node, "interconnects")) {
/*
* This assume we have the same DMA constraints for all our the
* devices in our pipeline (all the backends, but also the
@@ -815,8 +818,7 @@ static int sun4i_backend_bind(struct device *dev, struct device *master,
if (IS_ERR(backend->frontend))
dev_warn(dev, "Couldn't find matching frontend, frontend features disabled\n");
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- regs = devm_ioremap_resource(dev, res);
+ regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(regs))
return PTR_ERR(regs);
@@ -966,11 +968,9 @@ static int sun4i_backend_probe(struct platform_device *pdev)
return component_add(&pdev->dev, &sun4i_backend_ops);
}
-static int sun4i_backend_remove(struct platform_device *pdev)
+static void sun4i_backend_remove(struct platform_device *pdev)
{
component_del(&pdev->dev, &sun4i_backend_ops);
-
- return 0;
}
static const struct sun4i_backend_quirks sun4i_backend_quirks = {