diff options
Diffstat (limited to 'drivers/gpu/drm/tegra/falcon.c')
| -rw-r--r-- | drivers/gpu/drm/tegra/falcon.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/falcon.c b/drivers/gpu/drm/tegra/falcon.c index 223ab2ceb7e6..17f616bbcb45 100644 --- a/drivers/gpu/drm/tegra/falcon.c +++ b/drivers/gpu/drm/tegra/falcon.c @@ -30,6 +30,14 @@ int falcon_wait_idle(struct falcon *falcon) (value == 0), 10, 100000); } +static int falcon_dma_wait_not_full(struct falcon *falcon) +{ + u32 value; + + return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value, + !(value & FALCON_DMATRFCMD_FULL), 10, 100000); +} + static int falcon_dma_wait_idle(struct falcon *falcon) { u32 value; @@ -44,15 +52,28 @@ static int falcon_copy_chunk(struct falcon *falcon, enum falcon_memory target) { u32 cmd = FALCON_DMATRFCMD_SIZE_256B; + int err; if (target == FALCON_MEMORY_IMEM) cmd |= FALCON_DMATRFCMD_IMEM; + /* + * Use second DMA context (i.e. the one for firmware). Strictly + * speaking, at this point both DMA contexts point to the firmware + * stream ID, but this register's value will be reused by the firmware + * for later DMA transactions, so we need to use the correct value. + */ + cmd |= FALCON_DMATRFCMD_DMACTX(1); + + err = falcon_dma_wait_not_full(falcon); + if (err < 0) + return err; + falcon_writel(falcon, offset, FALCON_DMATRFMOFFS); falcon_writel(falcon, base, FALCON_DMATRFFBOFFS); falcon_writel(falcon, cmd, FALCON_DMATRFCMD); - return falcon_dma_wait_idle(falcon); + return 0; } static void falcon_copy_firmware_image(struct falcon *falcon, @@ -63,7 +84,7 @@ static void falcon_copy_firmware_image(struct falcon *falcon, /* copy the whole thing taking into account endianness */ for (i = 0; i < firmware->size / sizeof(u32); i++) - virt[i] = le32_to_cpu(((u32 *)firmware->data)[i]); + virt[i] = le32_to_cpu(((__le32 *)firmware->data)[i]); } static int falcon_parse_firmware_image(struct falcon *falcon) @@ -183,6 +204,11 @@ int falcon_boot(struct falcon *falcon) falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset, offset, FALCON_MEMORY_IMEM); + /* wait for DMA to complete */ + err = falcon_dma_wait_idle(falcon); + if (err < 0) + return err; + /* setup falcon interrupts */ falcon_writel(falcon, FALCON_IRQMSET_EXT(0xff) | FALCON_IRQMSET_SWGEN1 | |