diff options
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-etm.h')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-etm.h | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index 79e1ad860d8a..1d753cca2943 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -208,7 +208,6 @@ struct etm_config { /** * struct etm_drvdata - specifics associated to an ETM component * @base: memory mapped base address for this component. - * @dev: the device entity associated to this component. * @atclk: optional clock for the core parts of the ETM. * @csdev: component vitals needed by the framework. * @spinlock: only one at a time pls. @@ -216,7 +215,6 @@ struct etm_config { * @port_size: port size as reported by ETMCR bit 4-6 and 21. * @arch: ETM/PTM version number. * @use_cpu14: true if management registers need to be accessed via CP14. - * @mode: this tracer's mode, i.e sysFS, Perf or disabled. * @sticky_enable: true if ETM base configuration has been done. * @boot_enable:true if we should start tracing at boot time. * @os_unlock: true if access to management registers is allowed. @@ -231,8 +229,7 @@ struct etm_config { * @config: structure holding configuration parameters. */ struct etm_drvdata { - void __iomem *base; - struct device *dev; + struct csdev_access csa; struct clk *atclk; struct coresight_device *csdev; spinlock_t spinlock; @@ -240,7 +237,6 @@ struct etm_drvdata { int port_size; u8 arch; bool use_cp14; - local_t mode; bool sticky_enable; bool boot_enable; bool os_unlock; @@ -260,11 +256,11 @@ static inline void etm_writel(struct etm_drvdata *drvdata, { if (drvdata->use_cp14) { if (etm_writel_cp14(off, val)) { - dev_err(drvdata->dev, + dev_err(&drvdata->csdev->dev, "invalid CP14 access to ETM reg: %#x", off); } } else { - writel_relaxed(val, drvdata->base + off); + writel_relaxed(val, drvdata->csa.base + off); } } @@ -274,19 +270,19 @@ static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off) if (drvdata->use_cp14) { if (etm_readl_cp14(off, &val)) { - dev_err(drvdata->dev, + dev_err(&drvdata->csdev->dev, "invalid CP14 access to ETM reg: %#x", off); } } else { - val = readl_relaxed(drvdata->base + off); + val = readl_relaxed(drvdata->csa.base + off); } return val; } extern const struct attribute_group *coresight_etm_groups[]; -int etm_get_trace_id(struct etm_drvdata *drvdata); void etm_set_default(struct etm_config *config); void etm_config_trace_mode(struct etm_config *config); struct etm_config *get_etm_config(struct etm_drvdata *drvdata); +void etm_release_trace_id(struct etm_drvdata *drvdata); #endif |