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path: root/drivers/irqchip/irq-mvebu-icu.c
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Diffstat (limited to 'drivers/irqchip/irq-mvebu-icu.c')
-rw-r--r--drivers/irqchip/irq-mvebu-icu.c276
1 files changed, 118 insertions, 158 deletions
diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-icu.c
index 3c77acc7ec6a..4eebed39880a 100644
--- a/drivers/irqchip/irq-mvebu-icu.c
+++ b/drivers/irqchip/irq-mvebu-icu.c
@@ -20,6 +20,8 @@
#include <linux/of_platform.h>
#include <linux/platform_device.h>
+#include "irq-msi-lib.h"
+
#include <dt-bindings/interrupt-controller/mvebu-icu.h>
/* ICU registers */
@@ -60,99 +62,14 @@ struct mvebu_icu_msi_data {
const struct mvebu_icu_subset_data *subset_data;
};
-struct mvebu_icu_irq_data {
- struct mvebu_icu *icu;
- unsigned int icu_group;
- unsigned int type;
-};
-
static DEFINE_STATIC_KEY_FALSE(legacy_bindings);
-static void mvebu_icu_init(struct mvebu_icu *icu,
- struct mvebu_icu_msi_data *msi_data,
- struct msi_msg *msg)
-{
- const struct mvebu_icu_subset_data *subset = msi_data->subset_data;
-
- if (atomic_cmpxchg(&msi_data->initialized, false, true))
- return;
-
- /* Set 'SET' ICU SPI message address in AP */
- writel_relaxed(msg[0].address_hi, icu->base + subset->offset_set_ah);
- writel_relaxed(msg[0].address_lo, icu->base + subset->offset_set_al);
-
- if (subset->icu_group != ICU_GRP_NSR)
- return;
-
- /* Set 'CLEAR' ICU SPI message address in AP (level-MSI only) */
- writel_relaxed(msg[1].address_hi, icu->base + subset->offset_clr_ah);
- writel_relaxed(msg[1].address_lo, icu->base + subset->offset_clr_al);
-}
-
-static void mvebu_icu_write_msg(struct msi_desc *desc, struct msi_msg *msg)
-{
- struct irq_data *d = irq_get_irq_data(desc->irq);
- struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(d->domain);
- struct mvebu_icu_irq_data *icu_irqd = d->chip_data;
- struct mvebu_icu *icu = icu_irqd->icu;
- unsigned int icu_int;
-
- if (msg->address_lo || msg->address_hi) {
- /* One off initialization per domain */
- mvebu_icu_init(icu, msi_data, msg);
- /* Configure the ICU with irq number & type */
- icu_int = msg->data | ICU_INT_ENABLE;
- if (icu_irqd->type & IRQ_TYPE_EDGE_RISING)
- icu_int |= ICU_IS_EDGE;
- icu_int |= icu_irqd->icu_group << ICU_GROUP_SHIFT;
- } else {
- /* De-configure the ICU */
- icu_int = 0;
- }
-
- writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
-
- /*
- * The SATA unit has 2 ports, and a dedicated ICU entry per
- * port. The ahci sata driver supports only one irq interrupt
- * per SATA unit. To solve this conflict, we configure the 2
- * SATA wired interrupts in the south bridge into 1 GIC
- * interrupt in the north bridge. Even if only a single port
- * is enabled, if sata node is enabled, both interrupts are
- * configured (regardless of which port is actually in use).
- */
- if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
- writel_relaxed(icu_int,
- icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
- writel_relaxed(icu_int,
- icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
- }
-}
-
-static struct irq_chip mvebu_icu_nsr_chip = {
- .name = "ICU-NSR",
- .irq_mask = irq_chip_mask_parent,
- .irq_unmask = irq_chip_unmask_parent,
- .irq_eoi = irq_chip_eoi_parent,
- .irq_set_type = irq_chip_set_type_parent,
- .irq_set_affinity = irq_chip_set_affinity_parent,
-};
-
-static struct irq_chip mvebu_icu_sei_chip = {
- .name = "ICU-SEI",
- .irq_ack = irq_chip_ack_parent,
- .irq_mask = irq_chip_mask_parent,
- .irq_unmask = irq_chip_unmask_parent,
- .irq_set_type = irq_chip_set_type_parent,
- .irq_set_affinity = irq_chip_set_affinity_parent,
-};
-
-static int
-mvebu_icu_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
+static int mvebu_icu_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
unsigned long *hwirq, unsigned int *type)
{
unsigned int param_count = static_branch_unlikely(&legacy_bindings) ? 3 : 2;
- struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(d);
+ struct msi_domain_info *info = d->host_data;
+ struct mvebu_icu_msi_data *msi_data = info->chip_data;
struct mvebu_icu *icu = msi_data->icu;
/* Check the count of the parameters in dt */
@@ -192,81 +109,126 @@ mvebu_icu_irq_domain_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
return 0;
}
-static int
-mvebu_icu_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
- unsigned int nr_irqs, void *args)
+static void mvebu_icu_init(struct mvebu_icu *icu,
+ struct mvebu_icu_msi_data *msi_data,
+ struct msi_msg *msg)
{
- int err;
- unsigned long hwirq;
- struct irq_fwspec *fwspec = args;
- struct mvebu_icu_msi_data *msi_data = platform_msi_get_host_data(domain);
- struct mvebu_icu *icu = msi_data->icu;
- struct mvebu_icu_irq_data *icu_irqd;
- struct irq_chip *chip = &mvebu_icu_nsr_chip;
+ const struct mvebu_icu_subset_data *subset = msi_data->subset_data;
- icu_irqd = kmalloc(sizeof(*icu_irqd), GFP_KERNEL);
- if (!icu_irqd)
- return -ENOMEM;
+ if (atomic_cmpxchg(&msi_data->initialized, false, true))
+ return;
- err = mvebu_icu_irq_domain_translate(domain, fwspec, &hwirq,
- &icu_irqd->type);
- if (err) {
- dev_err(icu->dev, "failed to translate ICU parameters\n");
- goto free_irqd;
- }
+ /* Set 'SET' ICU SPI message address in AP */
+ writel_relaxed(msg[0].address_hi, icu->base + subset->offset_set_ah);
+ writel_relaxed(msg[0].address_lo, icu->base + subset->offset_set_al);
- if (static_branch_unlikely(&legacy_bindings))
- icu_irqd->icu_group = fwspec->param[0];
- else
- icu_irqd->icu_group = msi_data->subset_data->icu_group;
- icu_irqd->icu = icu;
+ if (subset->icu_group != ICU_GRP_NSR)
+ return;
- err = platform_msi_device_domain_alloc(domain, virq, nr_irqs);
- if (err) {
- dev_err(icu->dev, "failed to allocate ICU interrupt in parent domain\n");
- goto free_irqd;
- }
+ /* Set 'CLEAR' ICU SPI message address in AP (level-MSI only) */
+ writel_relaxed(msg[1].address_hi, icu->base + subset->offset_clr_ah);
+ writel_relaxed(msg[1].address_lo, icu->base + subset->offset_clr_al);
+}
- /* Make sure there is no interrupt left pending by the firmware */
- err = irq_set_irqchip_state(virq, IRQCHIP_STATE_PENDING, false);
- if (err)
- goto free_msi;
+static int mvebu_icu_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
+ unsigned int virq, irq_hw_number_t hwirq, msi_alloc_info_t *arg)
+{
+ irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip, info->chip_data);
+ return irq_set_irqchip_state(virq, IRQCHIP_STATE_PENDING, false);
+}
- if (icu_irqd->icu_group == ICU_GRP_SEI)
- chip = &mvebu_icu_sei_chip;
+static void mvebu_icu_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
+{
+ arg->desc = desc;
+ arg->hwirq = (u32)desc->data.icookie.value;
+}
- err = irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
- chip, icu_irqd);
- if (err) {
- dev_err(icu->dev, "failed to set the data to IRQ domain\n");
- goto free_msi;
+static void mvebu_icu_write_msi_msg(struct irq_data *d, struct msi_msg *msg)
+{
+ struct mvebu_icu_msi_data *msi_data = d->chip_data;
+ unsigned int icu_group = msi_data->subset_data->icu_group;
+ struct msi_desc *desc = irq_data_get_msi_desc(d);
+ struct mvebu_icu *icu = msi_data->icu;
+ unsigned int type;
+ u32 icu_int;
+
+ if (msg->address_lo || msg->address_hi) {
+ /* One off initialization per domain */
+ mvebu_icu_init(icu, msi_data, msg);
+ /* Configure the ICU with irq number & type */
+ icu_int = msg->data | ICU_INT_ENABLE;
+ type = (unsigned int)(desc->data.icookie.value >> 32);
+ if (type & IRQ_TYPE_EDGE_RISING)
+ icu_int |= ICU_IS_EDGE;
+ icu_int |= icu_group << ICU_GROUP_SHIFT;
+ } else {
+ /* De-configure the ICU */
+ icu_int = 0;
}
- return 0;
+ writel_relaxed(icu_int, icu->base + ICU_INT_CFG(d->hwirq));
-free_msi:
- platform_msi_device_domain_free(domain, virq, nr_irqs);
-free_irqd:
- kfree(icu_irqd);
- return err;
+ /*
+ * The SATA unit has 2 ports, and a dedicated ICU entry per
+ * port. The ahci sata driver supports only one irq interrupt
+ * per SATA unit. To solve this conflict, we configure the 2
+ * SATA wired interrupts in the south bridge into 1 GIC
+ * interrupt in the north bridge. Even if only a single port
+ * is enabled, if sata node is enabled, both interrupts are
+ * configured (regardless of which port is actually in use).
+ */
+ if (d->hwirq == ICU_SATA0_ICU_ID || d->hwirq == ICU_SATA1_ICU_ID) {
+ writel_relaxed(icu_int, icu->base + ICU_INT_CFG(ICU_SATA0_ICU_ID));
+ writel_relaxed(icu_int, icu->base + ICU_INT_CFG(ICU_SATA1_ICU_ID));
+ }
}
-static void
-mvebu_icu_irq_domain_free(struct irq_domain *domain, unsigned int virq,
- unsigned int nr_irqs)
-{
- struct irq_data *d = irq_get_irq_data(virq);
- struct mvebu_icu_irq_data *icu_irqd = d->chip_data;
+static const struct msi_domain_template mvebu_icu_nsr_msi_template = {
+ .chip = {
+ .name = "ICU-NSR",
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_set_type = irq_chip_set_type_parent,
+ .irq_write_msi_msg = mvebu_icu_write_msi_msg,
+ .flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
+ },
- kfree(icu_irqd);
+ .ops = {
+ .msi_translate = mvebu_icu_translate,
+ .msi_init = mvebu_icu_msi_init,
+ .set_desc = mvebu_icu_set_desc,
+ },
- platform_msi_device_domain_free(domain, virq, nr_irqs);
-}
+ .info = {
+ .bus_token = DOMAIN_BUS_WIRED_TO_MSI,
+ .flags = MSI_FLAG_LEVEL_CAPABLE |
+ MSI_FLAG_USE_DEV_FWNODE,
+ },
+};
+
+static const struct msi_domain_template mvebu_icu_sei_msi_template = {
+ .chip = {
+ .name = "ICU-SEI",
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_ack = irq_chip_ack_parent,
+ .irq_set_type = irq_chip_set_type_parent,
+ .irq_write_msi_msg = mvebu_icu_write_msi_msg,
+ .flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
+ },
-static const struct irq_domain_ops mvebu_icu_domain_ops = {
- .translate = mvebu_icu_irq_domain_translate,
- .alloc = mvebu_icu_irq_domain_alloc,
- .free = mvebu_icu_irq_domain_free,
+ .ops = {
+ .msi_translate = mvebu_icu_translate,
+ .msi_init = mvebu_icu_msi_init,
+ .set_desc = mvebu_icu_set_desc,
+ },
+
+ .info = {
+ .bus_token = DOMAIN_BUS_WIRED_TO_MSI,
+ .flags = MSI_FLAG_LEVEL_CAPABLE |
+ MSI_FLAG_USE_DEV_FWNODE,
+ },
};
static const struct mvebu_icu_subset_data mvebu_icu_nsr_subset_data = {
@@ -297,10 +259,10 @@ static const struct of_device_id mvebu_icu_subset_of_match[] = {
static int mvebu_icu_subset_probe(struct platform_device *pdev)
{
+ const struct msi_domain_template *tmpl;
struct mvebu_icu_msi_data *msi_data;
- struct device_node *msi_parent_dn;
struct device *dev = &pdev->dev;
- struct irq_domain *irq_domain;
+ bool sei;
msi_data = devm_kzalloc(dev, sizeof(*msi_data), GFP_KERNEL);
if (!msi_data)
@@ -314,20 +276,18 @@ static int mvebu_icu_subset_probe(struct platform_device *pdev)
msi_data->subset_data = of_device_get_match_data(dev);
}
- dev->msi.domain = of_msi_get_domain(dev, dev->of_node,
- DOMAIN_BUS_PLATFORM_MSI);
+ dev->msi.domain = of_msi_get_domain(dev, dev->of_node, DOMAIN_BUS_PLATFORM_MSI);
if (!dev->msi.domain)
return -EPROBE_DEFER;
- msi_parent_dn = irq_domain_get_of_node(dev->msi.domain);
- if (!msi_parent_dn)
+ if (!irq_domain_get_of_node(dev->msi.domain))
return -ENODEV;
- irq_domain = platform_msi_create_device_tree_domain(dev, ICU_MAX_IRQS,
- mvebu_icu_write_msg,
- &mvebu_icu_domain_ops,
- msi_data);
- if (!irq_domain) {
+ sei = msi_data->subset_data->icu_group == ICU_GRP_SEI;
+ tmpl = sei ? &mvebu_icu_sei_msi_template : &mvebu_icu_nsr_msi_template;
+
+ if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, tmpl,
+ ICU_MAX_IRQS, NULL, msi_data)) {
dev_err(dev, "Failed to create ICU MSI domain\n");
return -ENOMEM;
}