diff options
Diffstat (limited to 'drivers/isdn/hardware/mISDN/hfcmulti.c')
| -rw-r--r-- | drivers/isdn/hardware/mISDN/hfcmulti.c | 80 |
1 files changed, 29 insertions, 51 deletions
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c index 4f7eaa17fb27..f6c27ca92c01 100644 --- a/drivers/isdn/hardware/mISDN/hfcmulti.c +++ b/drivers/isdn/hardware/mISDN/hfcmulti.c @@ -25,8 +25,8 @@ * Bit 8 = 0x00100 = uLaw (instead of aLaw) * Bit 9 = 0x00200 = Disable DTMF detect on all B-channels via hardware * Bit 10 = spare - * Bit 11 = 0x00800 = Force PCM bus into slave mode. (otherwhise auto) - * or Bit 12 = 0x01000 = Force PCM bus into master mode. (otherwhise auto) + * Bit 11 = 0x00800 = Force PCM bus into slave mode. (otherwise auto) + * or Bit 12 = 0x01000 = Force PCM bus into master mode. (otherwise auto) * Bit 13 = spare * Bit 14 = 0x04000 = Use external ram (128K) * Bit 15 = 0x08000 = Use external ram (512K) @@ -41,7 +41,7 @@ * port: (optional or required for all ports on all installed cards) * HFC-4S/HFC-8S only bits: * Bit 0 = 0x001 = Use master clock for this S/T interface - * (ony once per chip). + * (only once per chip). * Bit 1 = 0x002 = transmitter line setup (non capacitive mode) * Don't use this unless you know what you are doing! * Bit 2 = 0x004 = Disable E-channel. (No E-channel processing) @@ -82,7 +82,7 @@ * By default (0), the PCM bus id is 100 for the card that is PCM master. * If multiple cards are PCM master (because they are not interconnected), * each card with PCM master will have increasing PCM id. - * All PCM busses with the same ID are expected to be connected and have + * All PCM buses with the same ID are expected to be connected and have * common time slots slots. * Only one chip of the PCM bus must be master, the others slave. * -1 means no support of PCM bus not even. @@ -221,6 +221,7 @@ static uint hwid = HWID_NONE; static int HFC_cnt, E1_cnt, bmask_cnt, Port_cnt, PCM_cnt = 99; MODULE_AUTHOR("Andreas Eversberg"); +MODULE_DESCRIPTION("mISDN driver for hfc-4s/hfc-8s/hfc-e1 based cards"); MODULE_LICENSE("GPL"); MODULE_VERSION(HFC_MULTI_VERSION); module_param(debug, uint, S_IRUGO | S_IWUSR); @@ -639,23 +640,6 @@ cpld_write_reg(struct hfc_multi *hc, unsigned char reg, unsigned char val) return; } -static inline unsigned char -cpld_read_reg(struct hfc_multi *hc, unsigned char reg) -{ - unsigned char bytein; - - cpld_set_reg(hc, reg); - - /* Do data pin read low byte */ - HFC_outb(hc, R_GPIO_OUT1, reg); - - enablepcibridge(hc); - bytein = readpcibridge(hc, 1); - disablepcibridge(hc); - - return bytein; -} - static inline void vpm_write_address(struct hfc_multi *hc, unsigned short addr) { @@ -663,20 +647,6 @@ vpm_write_address(struct hfc_multi *hc, unsigned short addr) cpld_write_reg(hc, 1, 0x01 & (addr >> 8)); } -static inline unsigned short -vpm_read_address(struct hfc_multi *c) -{ - unsigned short addr; - unsigned short highbit; - - addr = cpld_read_reg(c, 0); - highbit = cpld_read_reg(c, 1); - - addr = addr | (highbit << 8); - - return addr & 0x1ff; -} - static inline unsigned char vpm_in(struct hfc_multi *c, int which, unsigned short addr) { @@ -960,7 +930,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm) if (newmaster) { hc = newmaster; if (debug & DEBUG_HFCMULTI_PLXSD) - printk(KERN_DEBUG "id=%d (0x%p) = syncronized with " + printk(KERN_DEBUG "id=%d (0x%p) = synchronized with " "interface.\n", hc->id, hc); /* Enable new sync master */ plx_acc_32 = hc->plx_membase + PLX_GPIOC; @@ -979,7 +949,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm) hc = pcmmaster; if (debug & DEBUG_HFCMULTI_PLXSD) printk(KERN_DEBUG - "id=%d (0x%p) = PCM master syncronized " + "id=%d (0x%p) = PCM master synchronized " "with QUARTZ\n", hc->id, hc); if (hc->ctype == HFC_TYPE_E1) { /* Use the crystal clock for the PCM @@ -1931,7 +1901,7 @@ hfcmulti_dtmf(struct hfc_multi *hc) static void hfcmulti_tx(struct hfc_multi *hc, int ch) { - int i, ii, temp, len = 0; + int i, ii, temp, tmp_len, len = 0; int Zspace, z1, z2; /* must be int for calculation */ int Fspace, f1, f2; u_char *d; @@ -2031,7 +2001,7 @@ next_frame: if (Zspace <= 0) Zspace += hc->Zlen; Zspace -= 4; /* keep not too full, so pointers will not overrun */ - /* fill transparent data only to maxinum transparent load (minus 4) */ + /* fill transparent data only to maximum transparent load (minus 4) */ if (bch && test_bit(FLG_TRANSPARENT, &bch->Flags)) Zspace = Zspace - hc->Zlen + hc->max_trans; if (Zspace <= 0) /* no space of 4 bytes */ @@ -2152,14 +2122,15 @@ next_frame: HFC_wait_nodebug(hc); } + tmp_len = (*sp)->len; dev_kfree_skb(*sp); /* check for next frame */ if (bch && get_next_bframe(bch)) { - len = (*sp)->len; + len = tmp_len; goto next_frame; } if (dch && get_next_dframe(dch)) { - len = (*sp)->len; + len = tmp_len; goto next_frame; } @@ -3217,6 +3188,7 @@ static int hfcm_l1callback(struct dchannel *dch, u_int cmd) { struct hfc_multi *hc = dch->hw; + struct sk_buff_head free_queue; u_long flags; switch (cmd) { @@ -3245,6 +3217,7 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd) l1_event(dch->l1, HW_POWERUP_IND); break; case HW_DEACT_REQ: + __skb_queue_head_init(&free_queue); /* start deactivation */ spin_lock_irqsave(&hc->lock, flags); if (hc->ctype == HFC_TYPE_E1) { @@ -3264,20 +3237,21 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd) plxsd_checksync(hc, 0); } } - skb_queue_purge(&dch->squeue); + skb_queue_splice_init(&dch->squeue, &free_queue); if (dch->tx_skb) { - dev_kfree_skb(dch->tx_skb); + __skb_queue_tail(&free_queue, dch->tx_skb); dch->tx_skb = NULL; } dch->tx_idx = 0; if (dch->rx_skb) { - dev_kfree_skb(dch->rx_skb); + __skb_queue_tail(&free_queue, dch->rx_skb); dch->rx_skb = NULL; } test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) - del_timer(&dch->timer); + timer_delete(&dch->timer); spin_unlock_irqrestore(&hc->lock, flags); + __skb_queue_purge(&free_queue); break; case HW_POWERUP_REQ: spin_lock_irqsave(&hc->lock, flags); @@ -3384,6 +3358,9 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb) case PH_DEACTIVATE_REQ: test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags); if (dch->dev.D.protocol != ISDN_P_TE_S0) { + struct sk_buff_head free_queue; + + __skb_queue_head_init(&free_queue); spin_lock_irqsave(&hc->lock, flags); if (debug & DEBUG_HFCMULTI_MSG) printk(KERN_DEBUG @@ -3405,25 +3382,26 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb) /* deactivate */ dch->state = 1; } - skb_queue_purge(&dch->squeue); + skb_queue_splice_init(&dch->squeue, &free_queue); if (dch->tx_skb) { - dev_kfree_skb(dch->tx_skb); + __skb_queue_tail(&free_queue, dch->tx_skb); dch->tx_skb = NULL; } dch->tx_idx = 0; if (dch->rx_skb) { - dev_kfree_skb(dch->rx_skb); + __skb_queue_tail(&free_queue, dch->rx_skb); dch->rx_skb = NULL; } test_and_clear_bit(FLG_TX_BUSY, &dch->Flags); if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags)) - del_timer(&dch->timer); + timer_delete(&dch->timer); #ifdef FIXME if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags)) dchannel_sched_event(&hc->dch, D_CLEARBUSY); #endif ret = 0; spin_unlock_irqrestore(&hc->lock, flags); + __skb_queue_purge(&free_queue); } else ret = l1_event(dch->l1, hh->prim); break; @@ -4544,7 +4522,7 @@ release_port(struct hfc_multi *hc, struct dchannel *dch) spin_lock_irqsave(&hc->lock, flags); if (dch->timer.function) { - del_timer(&dch->timer); + timer_delete(&dch->timer); dch->timer.function = NULL; } @@ -4694,7 +4672,7 @@ init_e1_port_hw(struct hfc_multi *hc, struct hm_map *m) if (debug & DEBUG_HFCMULTI_INIT) printk(KERN_DEBUG "%s: PORT set optical " - "interfacs: card(%d) " + "interface: card(%d) " "port(%d)\n", __func__, HFC_cnt + 1, 1); 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