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path: root/drivers/media/pci/cobalt/cobalt-driver.c
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Diffstat (limited to 'drivers/media/pci/cobalt/cobalt-driver.c')
-rw-r--r--drivers/media/pci/cobalt/cobalt-driver.c70
1 files changed, 32 insertions, 38 deletions
diff --git a/drivers/media/pci/cobalt/cobalt-driver.c b/drivers/media/pci/cobalt/cobalt-driver.c
index 4885e833c052..b7695705fdee 100644
--- a/drivers/media/pci/cobalt/cobalt-driver.c
+++ b/drivers/media/pci/cobalt/cobalt-driver.c
@@ -8,6 +8,7 @@
* All rights reserved.
*/
+#include <linux/bitfield.h>
#include <linux/delay.h>
#include <media/i2c/adv7604.h>
#include <media/i2c/adv7842.h>
@@ -43,7 +44,7 @@ module_param_named(ignore_err, cobalt_ignore_err, int, 0644);
MODULE_PARM_DESC(ignore_err,
"If set then ignore missing i2c adapters/receivers. Default: 0\n");
-MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com> & Morten Hestnes");
+MODULE_AUTHOR("Hans Verkuil <hverkuil@kernel.org> & Morten Hestnes");
MODULE_DESCRIPTION("cobalt driver");
MODULE_LICENSE("GPL");
@@ -56,19 +57,19 @@ static u8 edid[256] = {
0x45, 0x59, 0x61, 0x59, 0x81, 0x99, 0x01, 0x01,
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x3a,
0x80, 0x18, 0x71, 0x38, 0x2d, 0x40, 0x58, 0x2c,
- 0x46, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e,
+ 0x45, 0x00, 0xe0, 0x0e, 0x11, 0x00, 0x00, 0x1e,
0x00, 0x00, 0x00, 0xfd, 0x00, 0x18, 0x55, 0x18,
0x5e, 0x11, 0x00, 0x0a, 0x20, 0x20, 0x20, 0x20,
0x20, 0x20, 0x00, 0x00, 0x00, 0xfc, 0x00, 0x63,
0x6f, 0x62, 0x61, 0x6c, 0x74, 0x0a, 0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x10,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9c,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x9d,
- 0x02, 0x03, 0x1f, 0xf0, 0x4a, 0x90, 0x1f, 0x04,
+ 0x02, 0x03, 0x1f, 0xf1, 0x4a, 0x10, 0x1f, 0x04,
0x13, 0x22, 0x21, 0x20, 0x02, 0x11, 0x01, 0x23,
0x09, 0x07, 0x07, 0x68, 0x03, 0x0c, 0x00, 0x10,
- 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xea, 0x00,
+ 0x00, 0x00, 0x22, 0x0f, 0xe2, 0x00, 0xca, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -80,7 +81,7 @@ static u8 edid[256] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46,
};
static void cobalt_set_interrupt(struct cobalt *cobalt, bool enable)
@@ -186,20 +187,16 @@ void cobalt_pcie_status_show(struct cobalt *cobalt)
{
struct pci_dev *pci_dev = cobalt->pci_dev;
struct pci_dev *pci_bus_dev = cobalt->pci_dev->bus->self;
- int offset;
- int bus_offset;
u32 capa;
u16 stat, ctrl;
- offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
- bus_offset = pci_find_capability(pci_bus_dev, PCI_CAP_ID_EXP);
- if (!offset || !bus_offset)
+ if (!pci_is_pcie(pci_dev) || !pci_is_pcie(pci_bus_dev))
return;
/* Device */
- pci_read_config_dword(pci_dev, offset + PCI_EXP_DEVCAP, &capa);
- pci_read_config_word(pci_dev, offset + PCI_EXP_DEVCTL, &ctrl);
- pci_read_config_word(pci_dev, offset + PCI_EXP_DEVSTA, &stat);
+ pcie_capability_read_dword(pci_dev, PCI_EXP_DEVCAP, &capa);
+ pcie_capability_read_word(pci_dev, PCI_EXP_DEVCTL, &ctrl);
+ pcie_capability_read_word(pci_dev, PCI_EXP_DEVSTA, &stat);
cobalt_info("PCIe device capability 0x%08x: Max payload %d\n",
capa, get_payload_size(capa & PCI_EXP_DEVCAP_PAYLOAD));
cobalt_info("PCIe device control 0x%04x: Max payload %d. Max read request %d\n",
@@ -209,27 +206,27 @@ void cobalt_pcie_status_show(struct cobalt *cobalt)
cobalt_info("PCIe device status 0x%04x\n", stat);
/* Link */
- pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &capa);
- pci_read_config_word(pci_dev, offset + PCI_EXP_LNKCTL, &ctrl);
- pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &stat);
+ pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &capa);
+ pcie_capability_read_word(pci_dev, PCI_EXP_LNKCTL, &ctrl);
+ pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &stat);
cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n",
capa, get_link_speed(capa),
- (capa & PCI_EXP_LNKCAP_MLW) >> 4);
+ FIELD_GET(PCI_EXP_LNKCAP_MLW, capa));
cobalt_info("PCIe link control 0x%04x\n", ctrl);
cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n",
stat, get_link_speed(stat),
- (stat & PCI_EXP_LNKSTA_NLW) >> 4);
+ FIELD_GET(PCI_EXP_LNKSTA_NLW, stat));
/* Bus */
- pci_read_config_dword(pci_bus_dev, bus_offset + PCI_EXP_LNKCAP, &capa);
+ pcie_capability_read_dword(pci_bus_dev, PCI_EXP_LNKCAP, &capa);
cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n",
capa, get_link_speed(capa),
- (capa & PCI_EXP_LNKCAP_MLW) >> 4);
+ FIELD_GET(PCI_EXP_LNKCAP_MLW, capa));
/* Slot */
- pci_read_config_dword(pci_dev, offset + PCI_EXP_SLTCAP, &capa);
- pci_read_config_word(pci_dev, offset + PCI_EXP_SLTCTL, &ctrl);
- pci_read_config_word(pci_dev, offset + PCI_EXP_SLTSTA, &stat);
+ pcie_capability_read_dword(pci_dev, PCI_EXP_SLTCAP, &capa);
+ pcie_capability_read_word(pci_dev, PCI_EXP_SLTCTL, &ctrl);
+ pcie_capability_read_word(pci_dev, PCI_EXP_SLTSTA, &stat);
cobalt_info("PCIe slot capability 0x%08x\n", capa);
cobalt_info("PCIe slot control 0x%04x\n", ctrl);
cobalt_info("PCIe slot status 0x%04x\n", stat);
@@ -238,27 +235,23 @@ void cobalt_pcie_status_show(struct cobalt *cobalt)
static unsigned pcie_link_get_lanes(struct cobalt *cobalt)
{
struct pci_dev *pci_dev = cobalt->pci_dev;
- unsigned offset;
u16 link;
- offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
- if (!offset)
+ if (!pci_is_pcie(pci_dev))
return 0;
- pci_read_config_word(pci_dev, offset + PCI_EXP_LNKSTA, &link);
- return (link & PCI_EXP_LNKSTA_NLW) >> 4;
+ pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &link);
+ return FIELD_GET(PCI_EXP_LNKSTA_NLW, link);
}
static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt)
{
struct pci_dev *pci_dev = cobalt->pci_dev->bus->self;
- unsigned offset;
u32 link;
- offset = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
- if (!offset)
+ if (!pci_is_pcie(pci_dev))
return 0;
- pci_read_config_dword(pci_dev, offset + PCI_EXP_LNKCAP, &link);
- return (link & PCI_EXP_LNKCAP_MLW) >> 4;
+ pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &link);
+ return FIELD_GET(PCI_EXP_LNKCAP_MLW, link);
}
static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev)
@@ -340,8 +333,8 @@ static int cobalt_setup_pci(struct cobalt *cobalt, struct pci_dev *pci_dev,
}
}
- if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) {
- ret = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
+ if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(64))) {
+ ret = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32));
if (ret) {
cobalt_err("no suitable DMA available\n");
goto err_disable;
@@ -580,7 +573,7 @@ static int cobalt_subdevs_hsma_init(struct cobalt *cobalt)
.addr = 0x20,
.platform_data = &adv7842_pdata,
};
- static struct v4l2_subdev_format sd_fmt = {
+ struct v4l2_subdev_format sd_fmt = {
.pad = ADV7842_PAD_SOURCE,
.which = V4L2_SUBDEV_FORMAT_ACTIVE,
.format.code = MEDIA_BUS_FMT_YUYV8_1X16,
@@ -592,7 +585,7 @@ static int cobalt_subdevs_hsma_init(struct cobalt *cobalt)
.cec_clk = 12000000,
};
static struct i2c_board_info adv7511_info = {
- .type = "adv7511",
+ .type = "adv7511-v4l2",
.addr = 0x39, /* 0x39 or 0x3d */
.platform_data = &adv7511_pdata,
};
@@ -675,6 +668,7 @@ static int cobalt_probe(struct pci_dev *pci_dev,
return -ENOMEM;
cobalt->pci_dev = pci_dev;
cobalt->instance = i;
+ mutex_init(&cobalt->pci_lock);
retval = v4l2_device_register(&pci_dev->dev, &cobalt->v4l2_dev);
if (retval) {
generated by cgit (git 2.34.1) at 2025-12-25 11:23:54 +0000