diff options
Diffstat (limited to 'drivers/mmc/host/sdhci-of-at91.c')
-rw-r--r-- | drivers/mmc/host/sdhci-of-at91.c | 30 |
1 files changed, 9 insertions, 21 deletions
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index ab2bd314a390..c79bff5e2280 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -101,22 +101,6 @@ static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); } -/* - * In this specific implementation of the SDHCI controller, the power register - * needs to have a valid voltage set even when the power supply is managed by - * an external regulator. - */ -static void sdhci_at91_set_power(struct sdhci_host *host, unsigned char mode, - unsigned short vdd) -{ - if (!IS_ERR(host->mmc->supply.vmmc)) { - struct mmc_host *mmc = host->mmc; - - mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); - } - sdhci_set_power_noreg(host, mode, vdd); -} - static void sdhci_at91_set_uhs_signaling(struct sdhci_host *host, unsigned int timing) { @@ -132,7 +116,8 @@ static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) sdhci_reset(host, mask); - if (host->mmc->caps & MMC_CAP_NONREMOVABLE) + if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) + || mmc_gpio_get_cd(host->mmc) >= 0) sdhci_at91_set_force_card_detect(host); if (priv->cal_always_on && (mask & SDHCI_RESET_ALL)) @@ -145,7 +130,7 @@ static const struct sdhci_ops sdhci_at91_sama5d2_ops = { .set_bus_width = sdhci_set_bus_width, .reset = sdhci_at91_reset, .set_uhs_signaling = sdhci_at91_set_uhs_signaling, - .set_power = sdhci_at91_set_power, + .set_power = sdhci_set_power_and_bus_voltage, }; static const struct sdhci_pltfm_data sdhci_sama5d2_pdata = { @@ -204,8 +189,8 @@ static int sdhci_at91_set_clks_presets(struct device *dev) /* Set capabilities in ro mode. */ writel(0, host->ioaddr + SDMMC_CACR); - dev_info(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", - clk_mul, gck_rate, clk_base_rate); + dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", + clk_mul, gck_rate, clk_base_rate); /* * We have to set preset values because it depends on the clk_mul @@ -427,8 +412,11 @@ static int sdhci_at91_probe(struct platform_device *pdev) * detection procedure using the SDMCC_CD signal is bypassed. * This bit is reset when a software reset for all command is performed * so we need to implement our own reset function to set back this bit. + * + * WA: SAMA5D2 doesn't drive CMD if using CD GPIO line. */ - if (host->mmc->caps & MMC_CAP_NONREMOVABLE) + if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) + || mmc_gpio_get_cd(host->mmc) >= 0) sdhci_at91_set_force_card_detect(host); pm_runtime_put_autosuspend(&pdev->dev); |