diff options
Diffstat (limited to 'drivers/net/ethernet/brocade/bna/bna_hw_defs.h')
| -rw-r--r-- | drivers/net/ethernet/brocade/bna/bna_hw_defs.h | 109 |
1 files changed, 53 insertions, 56 deletions
diff --git a/drivers/net/ethernet/brocade/bna/bna_hw_defs.h b/drivers/net/ethernet/brocade/bna/bna_hw_defs.h index af3f7bb0b3b8..dc34e38f97c7 100644 --- a/drivers/net/ethernet/brocade/bna/bna_hw_defs.h +++ b/drivers/net/ethernet/brocade/bna/bna_hw_defs.h @@ -1,19 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* - * Linux network driver for Brocade Converged Network Adapter. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License (GPL) Version 2 as - * published by the Free Software Foundation - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. + * Linux network driver for QLogic BR-series Converged Network Adapter. */ /* - * Copyright (c) 2005-2011 Brocade Communications Systems, Inc. + * Copyright (c) 2005-2014 Brocade Communications Systems, Inc. + * Copyright (c) 2014-2015 QLogic Corporation * All rights reserved - * www.brocade.com + * www.qlogic.com */ /* File for interrupt macros and functions */ @@ -212,7 +205,7 @@ do { \ * 15 bits (32K) should be large enough to accumulate, anyways, and the max. * acked events to h/w can be (32K + max poll weight) (currently 64). */ -#define BNA_IB_MAX_ACK_EVENTS (1 << 15) +#define BNA_IB_MAX_ACK_EVENTS BIT(15) /* These macros build the data portion of the TxQ/RxQ doorbell */ #define BNA_DOORBELL_Q_PRD_IDX(_pi) (0x80000000 | (_pi)) @@ -225,17 +218,17 @@ do { \ /* Set the coalescing timer for the given ib */ #define bna_ib_coalescing_timer_set(_i_dbell, _cls_timer) \ - ((_i_dbell)->doorbell_ack = BNA_DOORBELL_IB_INT_ACK((_cls_timer), 0)); + ((_i_dbell)->doorbell_ack = BNA_DOORBELL_IB_INT_ACK((_cls_timer), 0)) /* Acks 'events' # of events for a given ib while disabling interrupts */ #define bna_ib_ack_disable_irq(_i_dbell, _events) \ - (writel(BNA_DOORBELL_IB_INT_ACK(0, (_events)), \ - (_i_dbell)->doorbell_addr)); + (writel(BNA_DOORBELL_IB_INT_ACK(0, (_events)), \ + (_i_dbell)->doorbell_addr)) /* Acks 'events' # of events for a given ib */ #define bna_ib_ack(_i_dbell, _events) \ - (writel(((_i_dbell)->doorbell_ack | (_events)), \ - (_i_dbell)->doorbell_addr)); + (writel(((_i_dbell)->doorbell_ack | (_events)), \ + (_i_dbell)->doorbell_addr)) #define bna_ib_start(_bna, _ib, _is_regular) \ { \ @@ -266,12 +259,12 @@ do { \ } #define bna_txq_prod_indx_doorbell(_tcb) \ - (writel(BNA_DOORBELL_Q_PRD_IDX((_tcb)->producer_index), \ - (_tcb)->q_dbell)); + (writel(BNA_DOORBELL_Q_PRD_IDX((_tcb)->producer_index), \ + (_tcb)->q_dbell)) #define bna_rxq_prod_indx_doorbell(_rcb) \ - (writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \ - (_rcb)->q_dbell)); + (writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \ + (_rcb)->q_dbell)) /* TxQ, RxQ, CQ related bits, offsets, macros */ @@ -281,13 +274,13 @@ do { \ #define BNA_TXQ_WI_EXTENSION (0x104) /* Extension WI */ /* TxQ Entry Control Flags */ -#define BNA_TXQ_WI_CF_FCOE_CRC (1 << 8) -#define BNA_TXQ_WI_CF_IPID_MODE (1 << 5) -#define BNA_TXQ_WI_CF_INS_PRIO (1 << 4) -#define BNA_TXQ_WI_CF_INS_VLAN (1 << 3) -#define BNA_TXQ_WI_CF_UDP_CKSUM (1 << 2) -#define BNA_TXQ_WI_CF_TCP_CKSUM (1 << 1) -#define BNA_TXQ_WI_CF_IP_CKSUM (1 << 0) +#define BNA_TXQ_WI_CF_FCOE_CRC BIT(8) +#define BNA_TXQ_WI_CF_IPID_MODE BIT(5) +#define BNA_TXQ_WI_CF_INS_PRIO BIT(4) +#define BNA_TXQ_WI_CF_INS_VLAN BIT(3) +#define BNA_TXQ_WI_CF_UDP_CKSUM BIT(2) +#define BNA_TXQ_WI_CF_TCP_CKSUM BIT(1) +#define BNA_TXQ_WI_CF_IP_CKSUM BIT(0) #define BNA_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \ (((_hdr_size) << 10) | ((_offset) & 0x3FF)) @@ -296,32 +289,36 @@ do { \ * Completion Q defines */ /* CQ Entry Flags */ -#define BNA_CQ_EF_MAC_ERROR (1 << 0) -#define BNA_CQ_EF_FCS_ERROR (1 << 1) -#define BNA_CQ_EF_TOO_LONG (1 << 2) -#define BNA_CQ_EF_FC_CRC_OK (1 << 3) - -#define BNA_CQ_EF_RSVD1 (1 << 4) -#define BNA_CQ_EF_L4_CKSUM_OK (1 << 5) -#define BNA_CQ_EF_L3_CKSUM_OK (1 << 6) -#define BNA_CQ_EF_HDS_HEADER (1 << 7) - -#define BNA_CQ_EF_UDP (1 << 8) -#define BNA_CQ_EF_TCP (1 << 9) -#define BNA_CQ_EF_IP_OPTIONS (1 << 10) -#define BNA_CQ_EF_IPV6 (1 << 11) - -#define BNA_CQ_EF_IPV4 (1 << 12) -#define BNA_CQ_EF_VLAN (1 << 13) -#define BNA_CQ_EF_RSS (1 << 14) -#define BNA_CQ_EF_RSVD2 (1 << 15) - -#define BNA_CQ_EF_MCAST_MATCH (1 << 16) -#define BNA_CQ_EF_MCAST (1 << 17) -#define BNA_CQ_EF_BCAST (1 << 18) -#define BNA_CQ_EF_REMOTE (1 << 19) - -#define BNA_CQ_EF_LOCAL (1 << 20) +#define BNA_CQ_EF_MAC_ERROR BIT(0) +#define BNA_CQ_EF_FCS_ERROR BIT(1) +#define BNA_CQ_EF_TOO_LONG BIT(2) +#define BNA_CQ_EF_FC_CRC_OK BIT(3) + +#define BNA_CQ_EF_RSVD1 BIT(4) +#define BNA_CQ_EF_L4_CKSUM_OK BIT(5) +#define BNA_CQ_EF_L3_CKSUM_OK BIT(6) +#define BNA_CQ_EF_HDS_HEADER BIT(7) + +#define BNA_CQ_EF_UDP BIT(8) +#define BNA_CQ_EF_TCP BIT(9) +#define BNA_CQ_EF_IP_OPTIONS BIT(10) +#define BNA_CQ_EF_IPV6 BIT(11) + +#define BNA_CQ_EF_IPV4 BIT(12) +#define BNA_CQ_EF_VLAN BIT(13) +#define BNA_CQ_EF_RSS BIT(14) +#define BNA_CQ_EF_RSVD2 BIT(15) + +#define BNA_CQ_EF_MCAST_MATCH BIT(16) +#define BNA_CQ_EF_MCAST BIT(17) +#define BNA_CQ_EF_BCAST BIT(18) +#define BNA_CQ_EF_REMOTE BIT(19) + +#define BNA_CQ_EF_LOCAL BIT(20) +/* CAT2 ASIC does not use bit 21 as per the SPEC. + * Bit 31 is set in every end of frame completion + */ +#define BNA_CQ_EF_EOP BIT(31) /* Data structures */ @@ -358,7 +355,7 @@ struct bna_txq_wi_vector { /* TxQ Entry Structure * - * BEWARE: Load values into this structure with correct endianess. + * BEWARE: Load values into this structure with correct endianness. */ struct bna_txq_entry { union { |