diff options
Diffstat (limited to 'drivers/net/wireless/ti/wl1251/reg.h')
| -rw-r--r-- | drivers/net/wireless/ti/wl1251/reg.h | 24 |
1 files changed, 5 insertions, 19 deletions
diff --git a/drivers/net/wireless/ti/wl1251/reg.h b/drivers/net/wireless/ti/wl1251/reg.h index a5809019c5c1..bfe35754f33a 100644 --- a/drivers/net/wireless/ti/wl1251/reg.h +++ b/drivers/net/wireless/ti/wl1251/reg.h @@ -1,23 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * This file is part of wl12xx * * Copyright (c) 1998-2007 Texas Instruments Incorporated * Copyright (C) 2008 Nokia Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * */ #ifndef __REG_H__ @@ -219,7 +205,7 @@ enum wl12xx_acx_int_reg { the burst read starts at EEPROM address 0. Otherwise, it starts at the address following the address of the previous access. - TheWlan hardware hardware clears this bit automatically. + TheWlan hardware clears this bit automatically. Default: 0x00000000 *================================================*/ @@ -231,7 +217,7 @@ enum wl12xx_acx_int_reg { Halt eCPU - 32bit RW ------------------------------------------ 0 HALT_ECPU Halt Embedded CPU - This bit is the - compliment of bit 1 (MDATA2) in the SOR_CFG register. + complement of bit 1 (MDATA2) in the SOR_CFG register. During a hardware reset, this bit holds the inverse of MDATA2. When downloading firmware from the host, @@ -367,13 +353,13 @@ enum wl12xx_acx_int_reg { loads a single byte of data into the EE_DATA register from the EEPROM location specified in the EE_ADDR register. - The Wlan hardware hardware clears this bit automatically. + The Wlan hardware clears this bit automatically. EE_DATA is valid when this bit is cleared. 0 EE_WRITE - EEPROM Write Request - Setting this bit writes a single byte of data from the EE_DATA register into the EEPROM location specified in the EE_ADDR register. - The Wlan hardware hardware clears this bit automatically. + The Wlan hardware clears this bit automatically. *===============================================*/ #define EE_CTL (REGISTERS_BASE + 0x2000) #define ACX_EE_CTL_REG EE_CTL |