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path: root/drivers/pinctrl/pinctrl-artpec6.c
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Diffstat (limited to 'drivers/pinctrl/pinctrl-artpec6.c')
-rw-r--r--drivers/pinctrl/pinctrl-artpec6.c99
1 files changed, 59 insertions, 40 deletions
diff --git a/drivers/pinctrl/pinctrl-artpec6.c b/drivers/pinctrl/pinctrl-artpec6.c
index 357516d524bd..af67057128ff 100644
--- a/drivers/pinctrl/pinctrl-artpec6.c
+++ b/drivers/pinctrl/pinctrl-artpec6.c
@@ -277,37 +277,61 @@ static const struct artpec6_pin_group artpec6_pin_groups[] = {
.config = ARTPEC6_CONFIG_3,
},
{
- .name = "uart0grp0",
+ .name = "uart0grp0", /* All pins. */
.pins = uart0_pins0,
.num_pins = ARRAY_SIZE(uart0_pins0),
.config = ARTPEC6_CONFIG_1,
},
{
- .name = "uart0grp1",
+ .name = "uart0grp1", /* RX/TX and RTS/CTS */
.pins = uart0_pins1,
.num_pins = ARRAY_SIZE(uart0_pins1),
.config = ARTPEC6_CONFIG_1,
},
{
- .name = "uart1grp0",
+ .name = "uart0grp2", /* Only RX/TX pins. */
+ .pins = uart0_pins1,
+ .num_pins = ARRAY_SIZE(uart0_pins1) - 2,
+ .config = ARTPEC6_CONFIG_1,
+ },
+ {
+ .name = "uart1grp0", /* RX/TX and RTS/CTS */
.pins = uart1_pins0,
.num_pins = ARRAY_SIZE(uart1_pins0),
.config = ARTPEC6_CONFIG_2,
},
{
- .name = "uart2grp0",
+ .name = "uart1grp1", /* Only RX/TX pins. */
+ .pins = uart1_pins0,
+ .num_pins = 2,
+ .config = ARTPEC6_CONFIG_2,
+ },
+ {
+ .name = "uart2grp0", /* Full pinout */
.pins = uart2_pins0,
.num_pins = ARRAY_SIZE(uart2_pins0),
.config = ARTPEC6_CONFIG_1,
},
{
- .name = "uart2grp1",
+ .name = "uart2grp1", /* RX/TX and RTS/CTS */
.pins = uart2_pins1,
.num_pins = ARRAY_SIZE(uart2_pins1),
.config = ARTPEC6_CONFIG_1,
},
{
- .name = "uart3grp0",
+ .name = "uart2grp2", /* Only RX/TX */
+ .pins = uart2_pins1,
+ .num_pins = 2,
+ .config = ARTPEC6_CONFIG_1,
+ },
+ {
+ .name = "uart3grp0", /* RX/TX and CTS/RTS */
+ .pins = uart3_pins0,
+ .num_pins = ARRAY_SIZE(uart3_pins0),
+ .config = ARTPEC6_CONFIG_0,
+ },
+ {
+ .name = "uart3grp1", /* Only RX/TX */
.pins = uart3_pins0,
.num_pins = ARRAY_SIZE(uart3_pins0),
.config = ARTPEC6_CONFIG_0,
@@ -319,13 +343,19 @@ static const struct artpec6_pin_group artpec6_pin_groups[] = {
.config = ARTPEC6_CONFIG_2,
},
{
- .name = "uart5grp0",
+ .name = "uart5grp0", /* TX/RX and RTS/CTS */
.pins = uart5_pins0,
.num_pins = ARRAY_SIZE(uart5_pins0),
.config = ARTPEC6_CONFIG_2,
},
{
- .name = "uart5nocts",
+ .name = "uart5grp1", /* Only TX/RX */
+ .pins = uart5_pins0,
+ .num_pins = 2,
+ .config = ARTPEC6_CONFIG_2,
+ },
+ {
+ .name = "uart5nocts", /* TX/RX/RTS */
.pins = uart5_pins0,
.num_pins = ARRAY_SIZE(uart5_pins0) - 1,
.config = ARTPEC6_CONFIG_2,
@@ -445,7 +475,7 @@ static unsigned int artpec6_pconf_drive_field_to_mA(int field)
}
}
-static struct pinctrl_ops artpec6_pctrl_ops = {
+static const struct pinctrl_ops artpec6_pctrl_ops = {
.get_group_pins = artpec6_get_group_pins,
.get_groups_count = artpec6_get_groups_count,
.get_group_name = artpec6_get_group_name,
@@ -457,8 +487,9 @@ static const char * const gpiogrps[] = {
"cpuclkoutgrp0", "udlclkoutgrp0", "i2c1grp0", "i2c2grp0",
"i2c3grp0", "i2s0grp0", "i2s1grp0", "i2srefclkgrp0",
"spi0grp0", "spi1grp0", "pciedebuggrp0", "uart0grp0",
- "uart0grp1", "uart1grp0", "uart2grp0", "uart2grp1",
- "uart4grp0", "uart5grp0",
+ "uart0grp1", "uart0grp2", "uart1grp0", "uart1grp1",
+ "uart2grp0", "uart2grp1", "uart2grp2", "uart4grp0", "uart5grp0",
+ "uart5grp1", "uart5nocts",
};
static const char * const cpuclkoutgrps[] = { "cpuclkoutgrp0" };
static const char * const udlclkoutgrps[] = { "udlclkoutgrp0" };
@@ -471,12 +502,15 @@ static const char * const i2srefclkgrps[] = { "i2srefclkgrp0" };
static const char * const spi0grps[] = { "spi0grp0" };
static const char * const spi1grps[] = { "spi1grp0" };
static const char * const pciedebuggrps[] = { "pciedebuggrp0" };
-static const char * const uart0grps[] = { "uart0grp0", "uart0grp1" };
-static const char * const uart1grps[] = { "uart1grp0" };
-static const char * const uart2grps[] = { "uart2grp0", "uart2grp1" };
+static const char * const uart0grps[] = { "uart0grp0", "uart0grp1",
+ "uart0grp2" };
+static const char * const uart1grps[] = { "uart1grp0", "uart1grp1" };
+static const char * const uart2grps[] = { "uart2grp0", "uart2grp1",
+ "uart2grp2" };
static const char * const uart3grps[] = { "uart3grp0" };
-static const char * const uart4grps[] = { "uart4grp0" };
-static const char * const uart5grps[] = { "uart5grp0", "uart5nocts" };
+static const char * const uart4grps[] = { "uart4grp0", "uart4grp1" };
+static const char * const uart5grps[] = { "uart5grp0", "uart5grp1",
+ "uart5nocts" };
static const char * const nandgrps[] = { "nandgrp0" };
static const char * const sdio0grps[] = { "sdio0grp0" };
static const char * const sdio1grps[] = { "sdio1grp0" };
@@ -601,7 +635,7 @@ static int artpec6_pmx_get_functions_count(struct pinctrl_dev *pctldev)
}
static const char *artpec6_pmx_get_fname(struct pinctrl_dev *pctldev,
- unsigned int function)
+ unsigned int function)
{
return artpec6_pmx_functions[function].name;
}
@@ -654,8 +688,9 @@ static void artpec6_pmx_select_func(struct pinctrl_dev *pctldev,
}
}
-int artpec6_pmx_enable(struct pinctrl_dev *pctldev, unsigned int function,
- unsigned int group)
+static int artpec6_pmx_set(struct pinctrl_dev *pctldev,
+ unsigned int function,
+ unsigned int group)
{
struct artpec6_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
@@ -668,18 +703,6 @@ int artpec6_pmx_enable(struct pinctrl_dev *pctldev, unsigned int function,
return 0;
}
-void artpec6_pmx_disable(struct pinctrl_dev *pctldev, unsigned int function,
- unsigned int group)
-{
- struct artpec6_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
-
- dev_dbg(pmx->dev, "disabling %s function for pin group %s\n",
- artpec6_pmx_get_fname(pctldev, function),
- artpec6_get_group_name(pctldev, group));
-
- artpec6_pmx_select_func(pctldev, function, group, false);
-}
-
static int artpec6_pmx_request_gpio(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned int pin)
@@ -703,7 +726,7 @@ static const struct pinmux_ops artpec6_pmx_ops = {
.get_functions_count = artpec6_pmx_get_functions_count,
.get_function_name = artpec6_pmx_get_fname,
.get_function_groups = artpec6_pmx_get_fgroups,
- .set_mux = artpec6_pmx_enable,
+ .set_mux = artpec6_pmx_set,
.gpio_request_enable = artpec6_pmx_request_gpio,
};
@@ -775,7 +798,7 @@ static int artpec6_pconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
enum pin_config_param param;
unsigned int arg;
unsigned int regval;
- unsigned int *reg;
+ void __iomem *reg;
int i;
/* Check for valid pin */
@@ -884,7 +907,7 @@ static const struct pinconf_ops artpec6_pconf_ops = {
.pin_config_group_set = artpec6_pconf_group_set,
};
-static struct pinctrl_desc artpec6_desc = {
+static const struct pinctrl_desc artpec6_desc = {
.name = "artpec6-pinctrl",
.owner = THIS_MODULE,
.pins = artpec6_pins,
@@ -913,7 +936,6 @@ static void artpec6_pmx_reset(struct artpec6_pmx *pmx)
static int artpec6_pmx_probe(struct platform_device *pdev)
{
struct artpec6_pmx *pmx;
- struct resource *res;
pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
if (!pmx)
@@ -921,8 +943,7 @@ static int artpec6_pmx_probe(struct platform_device *pdev)
pmx->dev = &pdev->dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- pmx->base = devm_ioremap_resource(&pdev->dev, res);
+ pmx->base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pmx->base))
return PTR_ERR(pmx->base);
@@ -949,13 +970,11 @@ static int artpec6_pmx_probe(struct platform_device *pdev)
return 0;
}
-static int artpec6_pmx_remove(struct platform_device *pdev)
+static void artpec6_pmx_remove(struct platform_device *pdev)
{
struct artpec6_pmx *pmx = platform_get_drvdata(pdev);
pinctrl_unregister(pmx->pctl);
-
- return 0;
}
static const struct of_device_id artpec6_pinctrl_match[] = {
generated by cgit (git 2.34.1) at 2025-12-27 08:52:52 +0000