diff options
Diffstat (limited to 'drivers/pinctrl/pinctrl-pic32.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-pic32.c | 51 |
1 files changed, 32 insertions, 19 deletions
diff --git a/drivers/pinctrl/pinctrl-pic32.c b/drivers/pinctrl/pinctrl-pic32.c index 37acfdfc2cae..e8b481e87c77 100644 --- a/drivers/pinctrl/pinctrl-pic32.c +++ b/drivers/pinctrl/pinctrl-pic32.c @@ -11,12 +11,12 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/of.h> -#include <linux/of_device.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> #include <linux/platform_device.h> +#include <linux/seq_file.h> #include <linux/slab.h> #include <linux/spinlock.h> @@ -60,8 +60,8 @@ struct pic32_desc_function { struct pic32_gpio_bank { void __iomem *reg_base; + int instance; struct gpio_chip gpio_chip; - struct irq_chip irq_chip; struct clk *clk; }; @@ -1828,8 +1828,8 @@ static int pic32_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(readl(bank->reg_base + PORT_REG) & BIT(offset)); } -static void pic32_gpio_set(struct gpio_chip *chip, unsigned offset, - int value) +static int pic32_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) { struct pic32_gpio_bank *bank = gpiochip_get_data(chip); u32 mask = BIT(offset); @@ -1838,6 +1838,8 @@ static void pic32_gpio_set(struct gpio_chip *chip, unsigned offset, writel(mask, bank->reg_base + PIC32_SET(PORT_REG)); else writel(mask, bank->reg_base + PIC32_CLR(PORT_REG)); + + return 0; } static int pic32_gpio_direction_output(struct gpio_chip *chip, @@ -1903,7 +1905,7 @@ static int pic32_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, case PIN_CONFIG_INPUT_ENABLE: arg = !!(readl(bank->reg_base + TRIS_REG) & mask); break; - case PIN_CONFIG_OUTPUT: + case PIN_CONFIG_LEVEL: arg = !(readl(bank->reg_base + TRIS_REG) & mask); break; default: @@ -1958,7 +1960,7 @@ static int pic32_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, case PIN_CONFIG_INPUT_ENABLE: pic32_gpio_direction_input(&bank->gpio_chip, offset); break; - case PIN_CONFIG_OUTPUT: + case PIN_CONFIG_LEVEL: pic32_gpio_direction_output(&bank->gpio_chip, offset, arg); break; @@ -2008,12 +2010,14 @@ static void pic32_gpio_irq_mask(struct irq_data *data) struct pic32_gpio_bank *bank = irqd_to_bank(data); writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG)); + gpiochip_disable_irq(&bank->gpio_chip, irqd_to_hwirq(data)); } static void pic32_gpio_irq_unmask(struct irq_data *data) { struct pic32_gpio_bank *bank = irqd_to_bank(data); + gpiochip_enable_irq(&bank->gpio_chip, irqd_to_hwirq(data)); writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG)); } @@ -2030,7 +2034,7 @@ static unsigned int pic32_gpio_irq_startup(struct irq_data *data) static int pic32_gpio_irq_set_type(struct irq_data *data, unsigned int type) { struct pic32_gpio_bank *bank = irqd_to_bank(data); - u32 mask = BIT(data->hwirq); + u32 mask = irqd_to_hwirq(data); switch (type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_EDGE_RISING: @@ -2122,14 +2126,7 @@ static void pic32_gpio_irq_handler(struct irq_desc *desc) .owner = THIS_MODULE, \ .can_sleep = 0, \ }, \ - .irq_chip = { \ - .name = "GPIO" #_bank, \ - .irq_startup = pic32_gpio_irq_startup, \ - .irq_ack = pic32_gpio_irq_ack, \ - .irq_mask = pic32_gpio_irq_mask, \ - .irq_unmask = pic32_gpio_irq_unmask, \ - .irq_set_type = pic32_gpio_irq_set_type, \ - }, \ + .instance = (_bank), \ } static struct pic32_gpio_bank pic32_gpio_banks[] = { @@ -2145,10 +2142,27 @@ static struct pic32_gpio_bank pic32_gpio_banks[] = { GPIO_BANK(9, PINS_PER_BANK), }; +static void pic32_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p) +{ + struct pic32_gpio_bank *bank = irqd_to_bank(data); + + seq_printf(p, "GPIO%d", bank->instance); +} + +static const struct irq_chip pic32_gpio_irq_chip = { + .irq_startup = pic32_gpio_irq_startup, + .irq_ack = pic32_gpio_irq_ack, + .irq_mask = pic32_gpio_irq_mask, + .irq_unmask = pic32_gpio_irq_unmask, + .irq_set_type = pic32_gpio_irq_set_type, + .irq_print_chip = pic32_gpio_irq_print_chip, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + static int pic32_pinctrl_probe(struct platform_device *pdev) { struct pic32_pinctrl *pctl; - struct resource *res; int ret; pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); @@ -2157,8 +2171,7 @@ static int pic32_pinctrl_probe(struct platform_device *pdev) pctl->dev = &pdev->dev; dev_set_drvdata(&pdev->dev, pctl); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - pctl->reg_base = devm_ioremap_resource(&pdev->dev, res); + pctl->reg_base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(pctl->reg_base)) return PTR_ERR(pctl->reg_base); @@ -2243,7 +2256,7 @@ static int pic32_gpio_probe(struct platform_device *pdev) bank->gpio_chip.parent = &pdev->dev; girq = &bank->gpio_chip.irq; - girq->chip = &bank->irq_chip; + gpio_irq_chip_set_chip(girq, &pic32_gpio_irq_chip); girq->parent_handler = pic32_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), |