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path: root/drivers/pinctrl/qcom/pinctrl-sm6115.c
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Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-sm6115.c')
-rw-r--r--drivers/pinctrl/qcom/pinctrl-sm6115.c175
1 files changed, 89 insertions, 86 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-sm6115.c b/drivers/pinctrl/qcom/pinctrl-sm6115.c
index b3a0161ca377..06700685ea2a 100644
--- a/drivers/pinctrl/qcom/pinctrl-sm6115.c
+++ b/drivers/pinctrl/qcom/pinctrl-sm6115.c
@@ -6,7 +6,6 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
-#include <linux/pinctrl/pinctrl.h>
#include "pinctrl-msm.h"
@@ -22,18 +21,11 @@ enum {
WEST
};
-#define FUNCTION(fname) \
- [msm_mux_##fname] = { \
- .name = #fname, \
- .groups = fname##_groups, \
- .ngroups = ARRAY_SIZE(fname##_groups), \
- }
-
#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
{ \
- .name = "gpio" #id, \
- .pins = gpio##id##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
+ .grp = PINCTRL_PINGROUP("gpio" #id, \
+ gpio##id##_pins, \
+ ARRAY_SIZE(gpio##id##_pins)), \
.funcs = (int[]){ \
msm_mux_gpio, /* gpio mode */ \
msm_mux_##f1, \
@@ -71,9 +63,9 @@ enum {
#define SDC_QDSD_PINGROUP(pg_name, _tile, ctl, pull, drv) \
{ \
- .name = #pg_name, \
- .pins = pg_name##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
+ .grp = PINCTRL_PINGROUP(#pg_name, \
+ pg_name##_pins, \
+ ARRAY_SIZE(pg_name##_pins)), \
.ctl_reg = ctl, \
.io_reg = 0, \
.intr_cfg_reg = 0, \
@@ -97,9 +89,9 @@ enum {
#define UFS_RESET(pg_name, offset) \
{ \
- .name = #pg_name, \
- .pins = pg_name##_pins, \
- .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
+ .grp = PINCTRL_PINGROUP(#pg_name, \
+ pg_name##_pins, \
+ ARRAY_SIZE(pg_name##_pins)), \
.ctl_reg = offset, \
.io_reg = offset + 0x4, \
.intr_cfg_reg = 0, \
@@ -676,74 +668,74 @@ static const char * const ddr_pxi3_groups[] = {
"gpio104", "gpio105",
};
-static const struct msm_function sm6115_functions[] = {
- FUNCTION(adsp_ext),
- FUNCTION(agera_pll),
- FUNCTION(atest),
- FUNCTION(cam_mclk),
- FUNCTION(cci_async),
- FUNCTION(cci_i2c),
- FUNCTION(cci_timer),
- FUNCTION(cri_trng),
- FUNCTION(dac_calib),
- FUNCTION(dbg_out),
- FUNCTION(ddr_bist),
- FUNCTION(ddr_pxi0),
- FUNCTION(ddr_pxi1),
- FUNCTION(ddr_pxi2),
- FUNCTION(ddr_pxi3),
- FUNCTION(gcc_gp1),
- FUNCTION(gcc_gp2),
- FUNCTION(gcc_gp3),
- FUNCTION(gpio),
- FUNCTION(gp_pdm0),
- FUNCTION(gp_pdm1),
- FUNCTION(gp_pdm2),
- FUNCTION(gsm0_tx),
- FUNCTION(gsm1_tx),
- FUNCTION(jitter_bist),
- FUNCTION(mdp_vsync),
- FUNCTION(mdp_vsync_out_0),
- FUNCTION(mdp_vsync_out_1),
- FUNCTION(mpm_pwr),
- FUNCTION(mss_lte),
- FUNCTION(m_voc),
- FUNCTION(nav_gpio),
- FUNCTION(pa_indicator),
- FUNCTION(pbs),
- FUNCTION(pbs_out),
- FUNCTION(phase_flag),
- FUNCTION(pll_bist),
- FUNCTION(pll_bypassnl),
- FUNCTION(pll_reset),
- FUNCTION(prng_rosc),
- FUNCTION(qdss_cti),
- FUNCTION(qdss_gpio),
- FUNCTION(qup0),
- FUNCTION(qup1),
- FUNCTION(qup2),
- FUNCTION(qup3),
- FUNCTION(qup4),
- FUNCTION(qup5),
- FUNCTION(sdc1_tb),
- FUNCTION(sdc2_tb),
- FUNCTION(sd_write),
- FUNCTION(ssbi_wtr1),
- FUNCTION(tgu),
- FUNCTION(tsense_pwm),
- FUNCTION(uim1_clk),
- FUNCTION(uim1_data),
- FUNCTION(uim1_present),
- FUNCTION(uim1_reset),
- FUNCTION(uim2_clk),
- FUNCTION(uim2_data),
- FUNCTION(uim2_present),
- FUNCTION(uim2_reset),
- FUNCTION(usb_phy),
- FUNCTION(vfr_1),
- FUNCTION(vsense_trigger),
- FUNCTION(wlan1_adc0),
- FUNCTION(wlan1_adc1),
+static const struct pinfunction sm6115_functions[] = {
+ MSM_PIN_FUNCTION(adsp_ext),
+ MSM_PIN_FUNCTION(agera_pll),
+ MSM_PIN_FUNCTION(atest),
+ MSM_PIN_FUNCTION(cam_mclk),
+ MSM_PIN_FUNCTION(cci_async),
+ MSM_PIN_FUNCTION(cci_i2c),
+ MSM_PIN_FUNCTION(cci_timer),
+ MSM_PIN_FUNCTION(cri_trng),
+ MSM_PIN_FUNCTION(dac_calib),
+ MSM_PIN_FUNCTION(dbg_out),
+ MSM_PIN_FUNCTION(ddr_bist),
+ MSM_PIN_FUNCTION(ddr_pxi0),
+ MSM_PIN_FUNCTION(ddr_pxi1),
+ MSM_PIN_FUNCTION(ddr_pxi2),
+ MSM_PIN_FUNCTION(ddr_pxi3),
+ MSM_PIN_FUNCTION(gcc_gp1),
+ MSM_PIN_FUNCTION(gcc_gp2),
+ MSM_PIN_FUNCTION(gcc_gp3),
+ MSM_GPIO_PIN_FUNCTION(gpio),
+ MSM_PIN_FUNCTION(gp_pdm0),
+ MSM_PIN_FUNCTION(gp_pdm1),
+ MSM_PIN_FUNCTION(gp_pdm2),
+ MSM_PIN_FUNCTION(gsm0_tx),
+ MSM_PIN_FUNCTION(gsm1_tx),
+ MSM_PIN_FUNCTION(jitter_bist),
+ MSM_PIN_FUNCTION(mdp_vsync),
+ MSM_PIN_FUNCTION(mdp_vsync_out_0),
+ MSM_PIN_FUNCTION(mdp_vsync_out_1),
+ MSM_PIN_FUNCTION(mpm_pwr),
+ MSM_PIN_FUNCTION(mss_lte),
+ MSM_PIN_FUNCTION(m_voc),
+ MSM_PIN_FUNCTION(nav_gpio),
+ MSM_PIN_FUNCTION(pa_indicator),
+ MSM_PIN_FUNCTION(pbs),
+ MSM_PIN_FUNCTION(pbs_out),
+ MSM_PIN_FUNCTION(phase_flag),
+ MSM_PIN_FUNCTION(pll_bist),
+ MSM_PIN_FUNCTION(pll_bypassnl),
+ MSM_PIN_FUNCTION(pll_reset),
+ MSM_PIN_FUNCTION(prng_rosc),
+ MSM_PIN_FUNCTION(qdss_cti),
+ MSM_PIN_FUNCTION(qdss_gpio),
+ MSM_PIN_FUNCTION(qup0),
+ MSM_PIN_FUNCTION(qup1),
+ MSM_PIN_FUNCTION(qup2),
+ MSM_PIN_FUNCTION(qup3),
+ MSM_PIN_FUNCTION(qup4),
+ MSM_PIN_FUNCTION(qup5),
+ MSM_PIN_FUNCTION(sdc1_tb),
+ MSM_PIN_FUNCTION(sdc2_tb),
+ MSM_PIN_FUNCTION(sd_write),
+ MSM_PIN_FUNCTION(ssbi_wtr1),
+ MSM_PIN_FUNCTION(tgu),
+ MSM_PIN_FUNCTION(tsense_pwm),
+ MSM_PIN_FUNCTION(uim1_clk),
+ MSM_PIN_FUNCTION(uim1_data),
+ MSM_PIN_FUNCTION(uim1_present),
+ MSM_PIN_FUNCTION(uim1_reset),
+ MSM_PIN_FUNCTION(uim2_clk),
+ MSM_PIN_FUNCTION(uim2_data),
+ MSM_PIN_FUNCTION(uim2_present),
+ MSM_PIN_FUNCTION(uim2_reset),
+ MSM_PIN_FUNCTION(usb_phy),
+ MSM_PIN_FUNCTION(vfr_1),
+ MSM_PIN_FUNCTION(vsense_trigger),
+ MSM_PIN_FUNCTION(wlan1_adc0),
+ MSM_PIN_FUNCTION(wlan1_adc1),
};
/* Every pin is maintained as a single group, and missing or non-existing pin
@@ -875,6 +867,16 @@ static const struct msm_pingroup sm6115_groups[] = {
[120] = SDC_QDSD_PINGROUP(sdc2_data, SOUTH, 0x73000, 9, 0),
};
+static const struct msm_gpio_wakeirq_map sm6115_mpm_map[] = {
+ { 0, 84 }, { 3, 75 }, { 4, 16 }, { 6, 59 }, { 8, 63 }, { 11, 17 }, { 13, 18 },
+ { 14, 51 }, { 17, 20 }, { 18, 52 }, { 19, 53 }, { 24, 6 }, { 25, 71 }, { 27, 73 },
+ { 28, 41 }, { 31, 27 }, { 32, 54 }, { 33, 55 }, { 34, 56 }, { 35, 57 }, { 36, 58 },
+ { 39, 28 }, { 46, 29 }, { 62, 60 }, { 63, 61 }, { 64, 62 }, { 65, 30 }, { 66, 31 },
+ { 67, 32 }, { 69, 33 }, { 70, 34 }, { 72, 72 }, { 75, 35 }, { 79, 36 }, { 80, 21 },
+ { 81, 38 }, { 83, 9 }, { 84, 39 }, { 85, 40 }, { 86, 19 }, { 87, 42 }, { 88, 43 },
+ { 89, 45 }, { 91, 74 }, { 93, 46 }, { 94, 47 }, { 95, 48 }, { 96, 49 }, { 97, 50 },
+};
+
static const struct msm_pinctrl_soc_data sm6115_tlmm = {
.pins = sm6115_pins,
.npins = ARRAY_SIZE(sm6115_pins),
@@ -885,6 +887,8 @@ static const struct msm_pinctrl_soc_data sm6115_tlmm = {
.ngpios = 114,
.tiles = sm6115_tiles,
.ntiles = ARRAY_SIZE(sm6115_tiles),
+ .wakeirq_map = sm6115_mpm_map,
+ .nwakeirq_map = ARRAY_SIZE(sm6115_mpm_map),
};
static int sm6115_tlmm_probe(struct platform_device *pdev)
@@ -903,7 +907,6 @@ static struct platform_driver sm6115_tlmm_driver = {
.of_match_table = sm6115_tlmm_of_match,
},
.probe = sm6115_tlmm_probe,
- .remove = msm_pinctrl_remove,
};
static int __init sm6115_tlmm_init(void)