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path: root/drivers/pinctrl/renesas/pinctrl-rza1.c
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Diffstat (limited to 'drivers/pinctrl/renesas/pinctrl-rza1.c')
-rw-r--r--drivers/pinctrl/renesas/pinctrl-rza1.c92
1 files changed, 36 insertions, 56 deletions
diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renesas/pinctrl-rza1.c
index c1d6e9512c7a..3cfa4c8be80e 100644
--- a/drivers/pinctrl/renesas/pinctrl-rza1.c
+++ b/drivers/pinctrl/renesas/pinctrl-rza1.c
@@ -19,11 +19,12 @@
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
#include <linux/slab.h>
#include "../core.h"
@@ -525,7 +526,6 @@ static inline int rza1_pinmux_get_swio(unsigned int port,
const struct rza1_swio_pin *swio_pin;
unsigned int i;
-
for (i = 0; i < table->npins; ++i) {
swio_pin = &table->pins[i];
if (swio_pin->port == port && swio_pin->pin == pin &&
@@ -668,7 +668,7 @@ static inline int rza1_pin_get(struct rza1_port *port, unsigned int pin)
* @mux_conf: pin multiplexing descriptor
*/
static int rza1_pin_mux_single(struct rza1_pinctrl *rza1_pctl,
- struct rza1_mux_conf *mux_conf)
+ const struct rza1_mux_conf *mux_conf)
{
struct rza1_port *port = &rza1_pctl->ports[mux_conf->port];
unsigned int pin = mux_conf->pin;
@@ -750,6 +750,11 @@ static int rza1_pin_mux_single(struct rza1_pinctrl *rza1_pctl,
static int rza1_gpio_request(struct gpio_chip *chip, unsigned int gpio)
{
struct rza1_port *port = gpiochip_get_data(chip);
+ int ret;
+
+ ret = pinctrl_gpio_request(chip, gpio);
+ if (ret)
+ return ret;
rza1_pin_reset(port, gpio);
@@ -771,6 +776,7 @@ static void rza1_gpio_free(struct gpio_chip *chip, unsigned int gpio)
struct rza1_port *port = gpiochip_get_data(chip);
rza1_pin_reset(port, gpio);
+ pinctrl_gpio_free(chip, gpio);
}
static int rza1_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio)
@@ -823,12 +829,13 @@ static int rza1_gpio_get(struct gpio_chip *chip, unsigned int gpio)
return rza1_pin_get(port, gpio);
}
-static void rza1_gpio_set(struct gpio_chip *chip, unsigned int gpio,
- int value)
+static int rza1_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
{
struct rza1_port *port = gpiochip_get_data(chip);
rza1_pin_set(port, gpio, value);
+
+ return 0;
}
static const struct gpio_chip rza1_gpiochip_template = {
@@ -852,7 +859,6 @@ static const struct gpio_chip rza1_gpiochip_template = {
*/
static int rza1_dt_node_pin_count(struct device_node *np)
{
- struct device_node *child;
struct property *of_pins;
unsigned int npins;
@@ -861,12 +867,10 @@ static int rza1_dt_node_pin_count(struct device_node *np)
return of_pins->length / sizeof(u32);
npins = 0;
- for_each_child_of_node(np, child) {
+ for_each_child_of_node_scoped(np, child) {
of_pins = of_find_property(child, "pinmux", NULL);
- if (!of_pins) {
- of_node_put(child);
+ if (!of_pins)
return -EINVAL;
- }
npins += of_pins->length / sizeof(u32);
}
@@ -928,7 +932,7 @@ static int rza1_parse_pinmux_node(struct rza1_pinctrl *rza1_pctl,
case PIN_CONFIG_INPUT_ENABLE:
pinmux_flags |= MUX_FLAGS_SWIO_INPUT;
break;
- case PIN_CONFIG_OUTPUT: /* for DT backwards compatibility */
+ case PIN_CONFIG_LEVEL: /* for DT backwards compatibility */
case PIN_CONFIG_OUTPUT_ENABLE:
pinmux_flags |= MUX_FLAGS_SWIO_OUTPUT;
break;
@@ -986,7 +990,6 @@ static int rza1_dt_node_to_map(struct pinctrl_dev *pctldev,
struct rza1_pinctrl *rza1_pctl = pinctrl_dev_get_drvdata(pctldev);
struct rza1_mux_conf *mux_confs, *mux_conf;
unsigned int *grpins, *grpin;
- struct device_node *child;
const char *grpname;
const char **fngrps;
int ret, npins;
@@ -1023,13 +1026,11 @@ static int rza1_dt_node_to_map(struct pinctrl_dev *pctldev,
ret = rza1_parse_pinmux_node(rza1_pctl, np, mux_conf, grpin);
if (ret == -ENOENT)
- for_each_child_of_node(np, child) {
+ for_each_child_of_node_scoped(np, child) {
ret = rza1_parse_pinmux_node(rza1_pctl, child, mux_conf,
grpin);
- if (ret < 0) {
- of_node_put(child);
+ if (ret < 0)
return ret;
- }
grpin += ret;
mux_conf += ret;
@@ -1117,8 +1118,8 @@ static int rza1_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,
unsigned int group)
{
struct rza1_pinctrl *rza1_pctl = pinctrl_dev_get_drvdata(pctldev);
- struct rza1_mux_conf *mux_confs;
- struct function_desc *func;
+ const struct rza1_mux_conf *mux_confs;
+ const struct function_desc *func;
struct group_desc *grp;
int i;
@@ -1130,8 +1131,8 @@ static int rza1_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,
if (!func)
return -EINVAL;
- mux_confs = (struct rza1_mux_conf *)func->data;
- for (i = 0; i < grp->num_pins; ++i) {
+ mux_confs = (const struct rza1_mux_conf *)func->data;
+ for (i = 0; i < grp->grp.npins; ++i) {
int ret;
ret = rza1_pin_mux_single(rza1_pctl, &mux_confs[i]);
@@ -1154,21 +1155,6 @@ static const struct pinmux_ops rza1_pinmux_ops = {
* RZ/A1 pin controller driver operations
*/
-static unsigned int rza1_count_gpio_chips(struct device_node *np)
-{
- struct device_node *child;
- unsigned int count = 0;
-
- for_each_child_of_node(np, child) {
- if (!of_property_read_bool(child, "gpio-controller"))
- continue;
-
- count++;
- }
-
- return count;
-}
-
/**
* rza1_parse_gpiochip() - parse and register a gpio chip and pin range
*
@@ -1176,22 +1162,22 @@ static unsigned int rza1_count_gpio_chips(struct device_node *np)
* defined by gpio device tree binding documentation.
*
* @rza1_pctl: RZ/A1 pin controller device
- * @np: of gpio-controller node
+ * @fwnode: gpio-controller firmware node
* @chip: gpio chip to register to gpiolib
* @range: pin range to register to pinctrl core
*/
static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
- struct device_node *np,
+ struct fwnode_handle *fwnode,
struct gpio_chip *chip,
struct pinctrl_gpio_range *range)
{
const char *list_name = "gpio-ranges";
- struct of_phandle_args of_args;
+ struct fwnode_reference_args args;
unsigned int gpioport;
u32 pinctrl_base;
int ret;
- ret = of_parse_phandle_with_fixed_args(np, list_name, 3, 0, &of_args);
+ ret = fwnode_property_get_reference_args(fwnode, list_name, NULL, 3, 0, &args);
if (ret) {
dev_err(rza1_pctl->dev, "Unable to parse %s list property\n",
list_name);
@@ -1202,7 +1188,7 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
* Find out on which port this gpio-chip maps to by inspecting the
* second argument of the "gpio-ranges" property.
*/
- pinctrl_base = of_args.args[1];
+ pinctrl_base = args.args[1];
gpioport = RZA1_PIN_ID_TO_PORT(pinctrl_base);
if (gpioport >= RZA1_NPORTS) {
dev_err(rza1_pctl->dev,
@@ -1212,19 +1198,18 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
*chip = rza1_gpiochip_template;
chip->base = -1;
- chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pOFn",
- np);
+ chip->ngpio = args.args[2];
+ chip->label = devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pfwP", fwnode);
if (!chip->label)
return -ENOMEM;
- chip->ngpio = of_args.args[2];
- chip->of_node = np;
+ chip->fwnode = fwnode;
chip->parent = rza1_pctl->dev;
range->id = gpioport;
range->name = chip->label;
range->pin_base = range->base = pinctrl_base;
- range->npins = of_args.args[2];
+ range->npins = args.args[2];
range->gc = chip;
ret = devm_gpiochip_add_data(rza1_pctl->dev, chip,
@@ -1247,15 +1232,14 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl,
*/
static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl)
{
- struct device_node *np = rza1_pctl->dev->of_node;
struct pinctrl_gpio_range *gpio_ranges;
struct gpio_chip *gpio_chips;
- struct device_node *child;
+ struct fwnode_handle *child;
unsigned int ngpiochips;
unsigned int i;
int ret;
- ngpiochips = rza1_count_gpio_chips(np);
+ ngpiochips = gpiochip_node_count(rza1_pctl->dev);
if (ngpiochips == 0) {
dev_dbg(rza1_pctl->dev, "No gpiochip registered\n");
return 0;
@@ -1269,14 +1253,11 @@ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl)
return -ENOMEM;
i = 0;
- for_each_child_of_node(np, child) {
- if (!of_property_read_bool(child, "gpio-controller"))
- continue;
-
+ for_each_gpiochip_node(rza1_pctl->dev, child) {
ret = rza1_parse_gpiochip(rza1_pctl, child, &gpio_chips[i],
&gpio_ranges[i]);
if (ret) {
- of_node_put(child);
+ fwnode_handle_put(child);
return ret;
}
@@ -1407,7 +1388,7 @@ static const struct of_device_id rza1_pinctrl_of_match[] = {
.compatible = "renesas,r7s72102-ports",
.data = &rza1l_pmx_conf,
},
- { }
+ { /* sentinel */ }
};
static struct platform_driver rza1_pinctrl_driver = {
@@ -1426,4 +1407,3 @@ core_initcall(rza1_pinctrl_init);
MODULE_AUTHOR("Jacopo Mondi <jacopo+renesas@jmondi.org");
MODULE_DESCRIPTION("Pin and gpio controller driver for Reneas RZ/A1 SoC");
-MODULE_LICENSE("GPL v2");
generated by cgit (git 2.34.1) at 2025-12-27 23:24:35 +0000