summaryrefslogtreecommitdiff
path: root/drivers/platform/mellanox/mlxbf-pmc.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/platform/mellanox/mlxbf-pmc.c')
-rw-r--r--drivers/platform/mellanox/mlxbf-pmc.c300
1 files changed, 279 insertions, 21 deletions
diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
index 4ed9c7fd2b62..4776013e0764 100644
--- a/drivers/platform/mellanox/mlxbf-pmc.c
+++ b/drivers/platform/mellanox/mlxbf-pmc.c
@@ -15,6 +15,7 @@
#include <linux/hwmon.h>
#include <linux/platform_device.h>
#include <linux/string.h>
+#include <linux/string_helpers.h>
#include <uapi/linux/psci.h>
#define MLXBF_PMC_WRITE_REG_32 0x82000009
@@ -33,7 +34,7 @@
#define MLXBF_PMC_EVENT_SET_BF3 2
#define MLXBF_PMC_EVENT_INFO_LEN 100
-#define MLXBF_PMC_MAX_BLOCKS 30
+#define MLXBF_PMC_MAX_BLOCKS 40
#define MLXBF_PMC_MAX_ATTRS 70
#define MLXBF_PMC_INFO_SZ 4
#define MLXBF_PMC_REG_SIZE 8
@@ -88,6 +89,7 @@
#define MLXBF_PMC_CRSPACE_PERFMON_CTL(n) (n * MLXBF_PMC_CRSPACE_PERFMON_REG0_SZ)
#define MLXBF_PMC_CRSPACE_PERFMON_EN BIT(30)
#define MLXBF_PMC_CRSPACE_PERFMON_CLR BIT(28)
+#define MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(n) (MLXBF_PMC_CRSPACE_PERFMON_CTL(n) + 0x4)
#define MLXBF_PMC_CRSPACE_PERFMON_VAL0(n) (MLXBF_PMC_CRSPACE_PERFMON_CTL(n) + 0xc)
/**
@@ -114,6 +116,7 @@ struct mlxbf_pmc_attribute {
* @attr_event: Attributes for "event" sysfs files
* @attr_event_list: Attributes for "event_list" sysfs files
* @attr_enable: Attributes for "enable" sysfs files
+ * @attr_count_clock: Attributes for "count_clock" sysfs files
* @block_attr: All attributes needed for the block
* @block_attr_grp: Attribute group for the block
*/
@@ -126,6 +129,7 @@ struct mlxbf_pmc_block_info {
struct mlxbf_pmc_attribute *attr_event;
struct mlxbf_pmc_attribute attr_event_list;
struct mlxbf_pmc_attribute attr_enable;
+ struct mlxbf_pmc_attribute attr_count_clock;
struct attribute *block_attr[MLXBF_PMC_MAX_ATTRS];
struct attribute_group block_attr_grp;
};
@@ -136,6 +140,7 @@ struct mlxbf_pmc_block_info {
* @pdev: The kernel structure representing the device
* @total_blocks: Total number of blocks
* @tile_count: Number of tiles in the system
+ * @apt_enable: Info on enabled APTs
* @llt_enable: Info on enabled LLTs
* @mss_enable: Info on enabled MSSs
* @group_num: Group number assigned to each valid block
@@ -151,6 +156,7 @@ struct mlxbf_pmc_context {
struct platform_device *pdev;
u32 total_blocks;
u32 tile_count;
+ u8 apt_enable;
u8 llt_enable;
u8 mss_enable;
u32 group_num;
@@ -710,7 +716,7 @@ static const struct mlxbf_pmc_events mlxbf_pmc_llt_events[] = {
{101, "GDC_BANK0_HIT_DCL_PARTIAL"},
{102, "GDC_BANK0_EVICT_DCL"},
{103, "GDC_BANK0_G_RSE_PIPE_CACHE_DATA0"},
- {103, "GDC_BANK0_G_RSE_PIPE_CACHE_DATA1"},
+ {104, "GDC_BANK0_G_RSE_PIPE_CACHE_DATA1"},
{105, "GDC_BANK0_ARB_STRB"},
{106, "GDC_BANK0_ARB_WAIT"},
{107, "GDC_BANK0_GGA_STRB"},
@@ -859,6 +865,138 @@ static const struct mlxbf_pmc_events mlxbf_pmc_llt_miss_events[] = {
{75, "HISTOGRAM_HISTOGRAM_BIN9"},
};
+static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = {
+ { 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" },
+ { 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" },
+ { 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" },
+ { 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" },
+ { 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" },
+ { 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" },
+ { 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" },
+ { 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" },
+ { 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" },
+ { 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" },
+ { 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" },
+ { 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" },
+ { 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" },
+ { 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" },
+ { 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" },
+ { 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" },
+ { 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" },
+ { 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" },
+ { 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" },
+ { 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" },
+ { 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" },
+ { 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" },
+ { 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" },
+ { 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" },
+ { 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" },
+ { 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" },
+ { 0x68, "FMON_CLK_LAST_COUNT_REF_156" },
+ { 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" },
+};
+
+static const struct mlxbf_pmc_events mlxbf_pmc_gga_events[] = {
+ { 0, "GGA_PERF_DESC_WQE_STRB" },
+ { 5, "GGA_PERF_DESC_CQE_STRB" },
+ { 8, "GGA_PERF_DESC_TPT_REQUEST_STRB" },
+ { 17, "GGA_PERF_DESC_TPT_RESPONSESTRB" },
+ { 120, "GGA_PERF_DESC_ENGINE0_IN_DATA_STRB" },
+ { 121, "GGA_PERF_DESC_ENGINE1_IN_DATA_STRB" },
+ { 122, "GGA_PERF_DESC_ENGINE2_IN_DATA_STRB" },
+ { 123, "GGA_PERF_DESC_ENGINE3_IN_DATA_STRB" },
+ { 124, "GGA_PERF_DESC_ENGINE4_IN_DATA_STRB" },
+ { 125, "GGA_PERF_DESC_ENGINE5_IN_DATA_STRB" },
+ { 126, "GGA_PERF_DESC_ENGINE6_IN_DATA_STRB" },
+ { 127, "GGA_PERF_DESC_ENGINE7_IN_DATA_STRB" },
+ { 128, "GGA_PERF_DESC_ENGINE8_IN_DATA_STRB" },
+ { 129, "GGA_PERF_DESC_ENGINE9_IN_DATA_STRB" },
+ { 130, "GGA_PERF_DESC_ENGINE10_IN_DATA_STRB" },
+ { 131, "GGA_PERF_DESC_ENGINE11_IN_DATA_STRB" },
+ { 132, "GGA_PERF_DESC_ENGINE12_IN_DATA_STRB" },
+ { 133, "GGA_PERF_DESC_ENGINE13_IN_DATA_STRB" },
+ { 134, "GGA_PERF_DESC_ENGINE14_IN_DATA_STRB" },
+ { 195, "GGA_PERF_DESC_ENGINE0_OUT_DATA_STRB" },
+ { 196, "GGA_PERF_DESC_ENGINE1_OUT_DATA_STRB" },
+ { 197, "GGA_PERF_DESC_ENGINE2_OUT_DATA_STRB" },
+ { 198, "GGA_PERF_DESC_ENGINE3_OUT_DATA_STRB" },
+ { 199, "GGA_PERF_DESC_ENGINE4_OUT_DATA_STRB" },
+ { 200, "GGA_PERF_DESC_ENGINE5_OUT_DATA_STRB" },
+ { 201, "GGA_PERF_DESC_ENGINE6_OUT_DATA_STRB" },
+ { 202, "GGA_PERF_DESC_ENGINE7_OUT_DATA_STRB" },
+ { 203, "GGA_PERF_DESC_ENGINE8_OUT_DATA_STRB" },
+ { 204, "GGA_PERF_DESC_ENGINE9_OUT_DATA_STRB" },
+ { 205, "GGA_PERF_DESC_ENGINE10_OUT_DATA_STRB" },
+ { 206, "GGA_PERF_DESC_ENGINE11_OUT_DATA_STRB" },
+ { 207, "GGA_PERF_DESC_ENGINE12_OUT_DATA_STRB" },
+ { 208, "GGA_PERF_DESC_ENGINE13_OUT_DATA_STRB" },
+ { 209, "GGA_PERF_DESC_ENGINE14_OUT_DATA_STRB" },
+};
+
+static const struct mlxbf_pmc_events mlxbf_pmc_apt_events[] = {
+ { 0, "APT_DATA_0" },
+ { 1, "APT_DATA_1" },
+ { 2, "APT_DATA_2" },
+ { 3, "APT_DATA_3" },
+ { 4, "APT_DATA_4" },
+ { 5, "APT_DATA_5" },
+ { 6, "APT_DATA_6" },
+ { 7, "APT_DATA_7" },
+ { 8, "APT_DATA_8" },
+ { 9, "APT_DATA_9" },
+ { 10, "APT_DATA_10" },
+ { 11, "APT_DATA_11" },
+ { 12, "APT_DATA_12" },
+ { 13, "APT_DATA_13" },
+ { 14, "APT_DATA_14" },
+ { 15, "APT_DATA_15" },
+ { 16, "APT_DATA_16" },
+ { 17, "APT_DATA_17" },
+ { 18, "APT_DATA_18" },
+ { 19, "APT_DATA_19" },
+ { 20, "APT_DATA_20" },
+ { 21, "APT_DATA_21" },
+};
+
+static const struct mlxbf_pmc_events mlxbf_pmc_emi_events[] = {
+ { 0, "MCH_WR_IN_MCH_REQ_IN_STRB" },
+ { 10, "MCH_RD_IN_MCH_REQ_IN_STRB" },
+ { 20, "MCH_RD_RESP_DATA_MCH_RESP_OUT_STRB" },
+ { 98, "EMI_ARBITER_EARB2CTRL_STRB" },
+ { 99, "EMI_ARBITER_EARB2CTRL_RAS_STRB" },
+ { 100, "EMI_ARBITER_EARB2CTRL_CAS_STRB" },
+};
+
+static const struct mlxbf_pmc_events mlxbf_pmc_prnf_events[] = {
+ { 0, "PRNF_DMA_RD_TLP_REQ" },
+ { 1, "PRNF_DMA_RD_ICMC_BYPASS_REQ" },
+ { 8, "PRNF_DMA_RD_TLP_SENT_TO_CHI" },
+ { 11, "PRNF_DMA_RD_CHI_RES" },
+ { 17, "PRNF_DMA_RD_TLP_RES_SENT" },
+ { 18, "PRNF_DMA_WR_WR0_SLICE_ALLOC_RO" },
+ { 19, "PRNF_DMA_WR_WR0_SLICE_ALLOC_NRO" },
+ { 24, "PRNF_DMA_WR_WR1_SLICE_ALLOC_RO" },
+ { 25, "PRNF_DMA_WR_WR1_SLICE_ALLOC_NRO" },
+ { 30, "PRNF_PIO_POSTED_REQ_PUSH" },
+ { 31, "PRNF_PIO_POSTED_REQ_POP" },
+ { 32, "PRNF_PIO_NP_REQ_PUSH" },
+ { 33, "PRNF_PIO_NP_REQ_POP" },
+ { 34, "PRNF_PIO_COMP_RO_PUSH" },
+ { 35, "PRNF_PIO_COMP_RO_POP" },
+ { 36, "PRNF_PIO_COMP_NRO_PUSH" },
+ { 37, "PRNF_PIO_COMP_NRO_POP" },
+};
+
+static const struct mlxbf_pmc_events mlxbf_pmc_msn_events[] = {
+ { 46, "MSN_CORE_MMA_WQE_DONE_PUSH_STRB" },
+ { 116, "MSN_CORE_MSN2MMA_WQE_STRB" },
+ { 164, "MSN_CORE_WQE_TOP_TILE_WQE_STRB" },
+ { 168, "MSN_CORE_TPT_TOP_GGA_REQ_STRB" },
+ { 171, "MSN_CORE_TPT_TOP_MMA_REQ_STRB" },
+ { 174, "MSN_CORE_TPT_TOP_GGA_RES_STRB" },
+ { 177, "MSN_CORE_TPT_TOP_MMA_RES_STRB" },
+};
+
static struct mlxbf_pmc_context *pmc;
/* UUID used to probe ATF service. */
@@ -1032,6 +1170,24 @@ static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk, size
} else if (strstr(blk, "llt")) {
events = mlxbf_pmc_llt_events;
size = ARRAY_SIZE(mlxbf_pmc_llt_events);
+ } else if (strstr(blk, "clock_measure")) {
+ events = mlxbf_pmc_clock_events;
+ size = ARRAY_SIZE(mlxbf_pmc_clock_events);
+ } else if (strstr(blk, "gga")) {
+ events = mlxbf_pmc_gga_events;
+ size = ARRAY_SIZE(mlxbf_pmc_gga_events);
+ } else if (strstr(blk, "apt")) {
+ events = mlxbf_pmc_apt_events;
+ size = ARRAY_SIZE(mlxbf_pmc_apt_events);
+ } else if (strstr(blk, "emi")) {
+ events = mlxbf_pmc_emi_events;
+ size = ARRAY_SIZE(mlxbf_pmc_emi_events);
+ } else if (strstr(blk, "prnf")) {
+ events = mlxbf_pmc_prnf_events;
+ size = ARRAY_SIZE(mlxbf_pmc_prnf_events);
+ } else if (strstr(blk, "msn")) {
+ events = mlxbf_pmc_msn_events;
+ size = ARRAY_SIZE(mlxbf_pmc_msn_events);
} else {
events = NULL;
size = 0;
@@ -1067,7 +1223,7 @@ static int mlxbf_pmc_get_event_num(const char *blk, const char *evt)
return -ENODEV;
}
-/* Get the event number given the name */
+/* Get the event name given the number */
static char *mlxbf_pmc_get_event_name(const char *blk, u32 evt)
{
const struct mlxbf_pmc_events *events;
@@ -1168,7 +1324,7 @@ static int mlxbf_pmc_program_l3_counter(unsigned int blk_num, u32 cnt_num, u32 e
/* Method to handle crspace counter programming */
static int mlxbf_pmc_program_crspace_counter(unsigned int blk_num, u32 cnt_num, u32 evt)
{
- void *addr;
+ void __iomem *addr;
u32 word;
int ret;
@@ -1192,7 +1348,7 @@ static int mlxbf_pmc_program_crspace_counter(unsigned int blk_num, u32 cnt_num,
/* Method to clear crspace counter value */
static int mlxbf_pmc_clear_crspace_counter(unsigned int blk_num, u32 cnt_num)
{
- void *addr;
+ void __iomem *addr;
addr = pmc->block[blk_num].mmio_base +
MLXBF_PMC_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) +
@@ -1405,7 +1561,7 @@ static int mlxbf_pmc_read_l3_event(unsigned int blk_num, u32 cnt_num, u64 *resul
static int mlxbf_pmc_read_crspace_event(unsigned int blk_num, u32 cnt_num, u64 *result)
{
u32 word, evt;
- void *addr;
+ void __iomem *addr;
int ret;
addr = pmc->block[blk_num].mmio_base +
@@ -1466,14 +1622,15 @@ static int mlxbf_pmc_read_event(unsigned int blk_num, u32 cnt_num, bool is_l3, u
/* Method to read a register */
static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result)
{
- u32 ecc_out;
+ u32 reg;
- if (strstr(pmc->block_name[blk_num], "ecc")) {
+ if ((strstr(pmc->block_name[blk_num], "ecc")) ||
+ (strstr(pmc->block_name[blk_num], "clock_measure"))) {
if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset,
- &ecc_out))
+ &reg))
return -EFAULT;
- *result = ecc_out;
+ *result = reg;
return 0;
}
@@ -1487,6 +1644,9 @@ static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result)
/* Method to write to a register */
static int mlxbf_pmc_write_reg(unsigned int blk_num, u32 offset, u64 data)
{
+ if (strstr(pmc->block_name[blk_num], "clock_measure"))
+ return -EINVAL;
+
if (strstr(pmc->block_name[blk_num], "ecc")) {
return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset,
MLXBF_PMC_WRITE_REG_32, data);
@@ -1625,6 +1785,7 @@ static ssize_t mlxbf_pmc_event_store(struct device *dev,
attr, struct mlxbf_pmc_attribute, dev_attr);
unsigned int blk_num, cnt_num;
bool is_l3 = false;
+ char *evt_name;
int evt_num;
int err;
@@ -1632,14 +1793,23 @@ static ssize_t mlxbf_pmc_event_store(struct device *dev,
cnt_num = attr_event->index;
if (isalpha(buf[0])) {
+ /* Remove the trailing newline character if present */
+ evt_name = kstrdup_and_replace(buf, '\n', '\0', GFP_KERNEL);
+ if (!evt_name)
+ return -ENOMEM;
+
evt_num = mlxbf_pmc_get_event_num(pmc->block_name[blk_num],
- buf);
+ evt_name);
+ kfree(evt_name);
if (evt_num < 0)
return -EINVAL;
} else {
err = kstrtouint(buf, 0, &evt_num);
if (err < 0)
return err;
+
+ if (!mlxbf_pmc_get_event_name(pmc->block_name[blk_num], evt_num))
+ return -EINVAL;
}
if (strstr(pmc->block_name[blk_num], "l3cache"))
@@ -1720,13 +1890,14 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev,
{
struct mlxbf_pmc_attribute *attr_enable = container_of(
attr, struct mlxbf_pmc_attribute, dev_attr);
- unsigned int en, blk_num;
+ unsigned int blk_num;
u32 word;
int err;
+ bool en;
blk_num = attr_enable->nr;
- err = kstrtouint(buf, 0, &en);
+ err = kstrtobool(buf, &en);
if (err < 0)
return err;
@@ -1746,14 +1917,11 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev,
MLXBF_PMC_CRSPACE_PERFMON_CTL(pmc->block[blk_num].counters),
MLXBF_PMC_WRITE_REG_32, word);
} else {
- if (en && en != 1)
- return -EINVAL;
-
err = mlxbf_pmc_config_l3_counters(blk_num, false, !!en);
if (err)
return err;
- if (en == 1) {
+ if (en) {
err = mlxbf_pmc_config_l3_counters(blk_num, true, false);
if (err)
return err;
@@ -1763,6 +1931,49 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev,
return count;
}
+/* Show function for "count_clock" sysfs files - only for crspace */
+static ssize_t mlxbf_pmc_count_clock_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mlxbf_pmc_attribute *attr_count_clock = container_of(
+ attr, struct mlxbf_pmc_attribute, dev_attr);
+ unsigned int blk_num;
+ u32 reg;
+
+ blk_num = attr_count_clock->nr;
+
+ if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base +
+ MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(pmc->block[blk_num].counters),
+ &reg))
+ return -EINVAL;
+
+ return sysfs_emit(buf, "%u\n", reg);
+}
+
+/* Store function for "count_clock" sysfs files - only for crspace */
+static ssize_t mlxbf_pmc_count_clock_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct mlxbf_pmc_attribute *attr_count_clock = container_of(
+ attr, struct mlxbf_pmc_attribute, dev_attr);
+ unsigned int blk_num;
+ u32 reg;
+ int err;
+
+ blk_num = attr_count_clock->nr;
+
+ err = kstrtouint(buf, 0, &reg);
+ if (err < 0)
+ return err;
+
+ mlxbf_pmc_write(pmc->block[blk_num].mmio_base +
+ MLXBF_PMC_CRSPACE_PERFMON_COUNT_CLOCK(pmc->block[blk_num].counters),
+ MLXBF_PMC_WRITE_REG_32, reg);
+
+ return count;
+}
+
/* Populate attributes for blocks with counters to monitor performance */
static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_num)
{
@@ -1774,6 +1985,7 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
/* "event_list" sysfs to list events supported by the block */
attr = &pmc->block[blk_num].attr_event_list;
+ sysfs_attr_init(&attr->dev_attr.attr);
attr->dev_attr.attr.mode = 0444;
attr->dev_attr.show = mlxbf_pmc_event_list_show;
attr->nr = blk_num;
@@ -1787,6 +1999,7 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
if (strstr(pmc->block_name[blk_num], "l3cache") ||
((pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE))) {
attr = &pmc->block[blk_num].attr_enable;
+ sysfs_attr_init(&attr->dev_attr.attr);
attr->dev_attr.attr.mode = 0644;
attr->dev_attr.show = mlxbf_pmc_enable_show;
attr->dev_attr.store = mlxbf_pmc_enable_store;
@@ -1799,6 +2012,21 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
attr = NULL;
}
+ if (pmc->block[blk_num].type == MLXBF_PMC_TYPE_CRSPACE) {
+ /* Program crspace counters to count clock cycles using "count_clock" sysfs */
+ attr = &pmc->block[blk_num].attr_count_clock;
+ attr->dev_attr.attr.mode = 0644;
+ attr->dev_attr.show = mlxbf_pmc_count_clock_show;
+ attr->dev_attr.store = mlxbf_pmc_count_clock_store;
+ attr->nr = blk_num;
+ attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL,
+ "count_clock");
+ if (!attr->dev_attr.attr.name)
+ return -ENOMEM;
+ pmc->block[blk_num].block_attr[++i] = &attr->dev_attr.attr;
+ attr = NULL;
+ }
+
pmc->block[blk_num].attr_counter = devm_kcalloc(
dev, pmc->block[blk_num].counters,
sizeof(struct mlxbf_pmc_attribute), GFP_KERNEL);
@@ -1814,6 +2042,7 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
/* "eventX" and "counterX" sysfs to program and read counter values */
for (j = 0; j < pmc->block[blk_num].counters; ++j) {
attr = &pmc->block[blk_num].attr_counter[j];
+ sysfs_attr_init(&attr->dev_attr.attr);
attr->dev_attr.attr.mode = 0644;
attr->dev_attr.show = mlxbf_pmc_counter_show;
attr->dev_attr.store = mlxbf_pmc_counter_store;
@@ -1826,6 +2055,7 @@ static int mlxbf_pmc_init_perftype_counter(struct device *dev, unsigned int blk_
attr = NULL;
attr = &pmc->block[blk_num].attr_event[j];
+ sysfs_attr_init(&attr->dev_attr.attr);
attr->dev_attr.attr.mode = 0644;
attr->dev_attr.show = mlxbf_pmc_event_show;
attr->dev_attr.store = mlxbf_pmc_event_store;
@@ -1861,6 +2091,7 @@ static int mlxbf_pmc_init_perftype_reg(struct device *dev, unsigned int blk_num)
while (count > 0) {
--count;
attr = &pmc->block[blk_num].attr_event[count];
+ sysfs_attr_init(&attr->dev_attr.attr);
attr->dev_attr.attr.mode = 0644;
attr->dev_attr.show = mlxbf_pmc_counter_show;
attr->dev_attr.store = mlxbf_pmc_counter_store;
@@ -1952,6 +2183,18 @@ static int mlxbf_pmc_map_counters(struct device *dev)
continue;
}
+ /* Create sysfs only for enabled EMI blocks */
+ if (strstr(pmc->block_name[i], "emi") &&
+ pmc->event_set == MLXBF_PMC_EVENT_SET_BF3) {
+ unsigned int emi_num;
+
+ if (sscanf(pmc->block_name[i], "emi%u", &emi_num) != 1)
+ continue;
+
+ if (!((pmc->mss_enable >> (emi_num / 2)) & 0x1))
+ continue;
+ }
+
/* Create sysfs only for enabled LLT blocks */
if (strstr(pmc->block_name[i], "llt_miss")) {
unsigned int llt_num;
@@ -1971,6 +2214,17 @@ static int mlxbf_pmc_map_counters(struct device *dev)
continue;
}
+ /* Create sysfs only for enabled APT blocks */
+ if (strstr(pmc->block_name[i], "apt")) {
+ unsigned int apt_num;
+
+ if (sscanf(pmc->block_name[i], "apt%u", &apt_num) != 1)
+ continue;
+
+ if (!((pmc->apt_enable >> apt_num) & 0x1))
+ continue;
+ }
+
ret = device_property_read_u64_array(dev, pmc->block_name[i],
info, MLXBF_PMC_INFO_SZ);
if (ret)
@@ -2067,13 +2321,17 @@ static int mlxbf_pmc_probe(struct platform_device *pdev)
return -EFAULT;
if (device_property_read_u32(dev, "tile_num", &pmc->tile_count)) {
+ if (device_property_read_u8(dev, "apt_enable", &pmc->apt_enable)) {
+ dev_warn(dev, "Number of APTs undefined, ignoring blocks\n");
+ pmc->apt_enable = 0;
+ }
if (device_property_read_u8(dev, "llt_enable", &pmc->llt_enable)) {
- dev_err(dev, "Number of tiles/LLTs undefined\n");
- return -EINVAL;
+ dev_warn(dev, "Number of LLTs undefined, ignoring blocks\n");
+ pmc->llt_enable = 0;
}
if (device_property_read_u8(dev, "mss_enable", &pmc->mss_enable)) {
- dev_err(dev, "Number of tiles/MSSs undefined\n");
- return -EINVAL;
+ dev_warn(dev, "Number of MSSs undefined, ignoring blocks\n");
+ pmc->mss_enable = 0;
}
}
generated by cgit (git 2.34.1) at 2025-07-25 20:45:12 +0000